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@@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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- * Device Tree Source for the R-Car H3 (R8A77950) SoC
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+ * Device Tree Source for the R-Car H3 (R8A77951) SoC
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*
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* Copyright (C) 2015 Renesas Electronics Corp.
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*/
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@@ -155,6 +155,8 @@
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power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
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next-level-cache = <&L2_CA57>;
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enable-method = "psci";
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+ cpu-idle-states = <&CPU_SLEEP_0>;
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+ dynamic-power-coefficient = <854>;
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clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
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operating-points-v2 = <&cluster0_opp>;
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capacity-dmips-mhz = <1024>;
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@@ -168,6 +170,7 @@
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power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
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next-level-cache = <&L2_CA57>;
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enable-method = "psci";
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+ cpu-idle-states = <&CPU_SLEEP_0>;
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clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
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operating-points-v2 = <&cluster0_opp>;
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capacity-dmips-mhz = <1024>;
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@@ -181,6 +184,7 @@
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power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
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next-level-cache = <&L2_CA57>;
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enable-method = "psci";
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+ cpu-idle-states = <&CPU_SLEEP_0>;
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clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
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operating-points-v2 = <&cluster0_opp>;
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capacity-dmips-mhz = <1024>;
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@@ -194,6 +198,7 @@
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power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
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next-level-cache = <&L2_CA57>;
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enable-method = "psci";
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+ cpu-idle-states = <&CPU_SLEEP_0>;
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clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
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operating-points-v2 = <&cluster0_opp>;
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capacity-dmips-mhz = <1024>;
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@@ -207,6 +212,9 @@
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power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
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next-level-cache = <&L2_CA53>;
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enable-method = "psci";
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+ cpu-idle-states = <&CPU_SLEEP_1>;
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+ #cooling-cells = <2>;
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+ dynamic-power-coefficient = <277>;
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clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
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operating-points-v2 = <&cluster1_opp>;
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capacity-dmips-mhz = <535>;
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@@ -219,6 +227,7 @@
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power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
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next-level-cache = <&L2_CA53>;
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enable-method = "psci";
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+ cpu-idle-states = <&CPU_SLEEP_1>;
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clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
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operating-points-v2 = <&cluster1_opp>;
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capacity-dmips-mhz = <535>;
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@@ -231,6 +240,7 @@
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power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
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next-level-cache = <&L2_CA53>;
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enable-method = "psci";
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+ cpu-idle-states = <&CPU_SLEEP_1>;
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clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
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operating-points-v2 = <&cluster1_opp>;
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capacity-dmips-mhz = <535>;
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@@ -243,6 +253,7 @@
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power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
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next-level-cache = <&L2_CA53>;
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enable-method = "psci";
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+ cpu-idle-states = <&CPU_SLEEP_1>;
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clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
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operating-points-v2 = <&cluster1_opp>;
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capacity-dmips-mhz = <535>;
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@@ -261,6 +272,28 @@
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cache-unified;
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cache-level = <2>;
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};
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+
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+ idle-states {
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+ entry-method = "psci";
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+
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+ CPU_SLEEP_0: cpu-sleep-0 {
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+ compatible = "arm,idle-state";
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+ arm,psci-suspend-param = <0x0010000>;
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+ local-timer-stop;
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+ entry-latency-us = <400>;
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+ exit-latency-us = <500>;
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+ min-residency-us = <4000>;
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+ };
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+
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+ CPU_SLEEP_1: cpu-sleep-1 {
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+ compatible = "arm,idle-state";
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+ arm,psci-suspend-param = <0x0010000>;
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+ local-timer-stop;
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+ entry-latency-us = <700>;
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+ exit-latency-us = <700>;
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+ min-residency-us = <5000>;
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+ };
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+ };
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};
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extal_clk: extal {
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@@ -572,12 +605,12 @@
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0 0xe61c0000 0 0x200>;
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- interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 407>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 407>;
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@@ -812,7 +845,7 @@
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<&usb_dmac1 0>, <&usb_dmac1 1>;
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dma-names = "ch0", "ch1", "ch2", "ch3";
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renesas,buswait = <11>;
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- phys = <&usb2_phy0>;
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+ phys = <&usb2_phy0 3>;
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phy-names = "usb";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 704>, <&cpg 703>;
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@@ -829,7 +862,7 @@
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<&usb_dmac3 0>, <&usb_dmac3 1>;
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dma-names = "ch0", "ch1", "ch2", "ch3";
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renesas,buswait = <11>;
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- phys = <&usb2_phy3>;
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+ phys = <&usb2_phy3 3>;
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phy-names = "usb";
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 705>, <&cpg 700>;
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@@ -840,8 +873,8 @@
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compatible = "renesas,r8a7795-usb-dmac",
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"renesas,usb-dmac";
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reg = <0 0xe65a0000 0 0x100>;
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- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "ch0", "ch1";
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clocks = <&cpg CPG_MOD 330>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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@@ -854,8 +887,8 @@
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compatible = "renesas,r8a7795-usb-dmac",
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"renesas,usb-dmac";
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reg = <0 0xe65b0000 0 0x100>;
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- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "ch0", "ch1";
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clocks = <&cpg CPG_MOD 331>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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@@ -868,8 +901,8 @@
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compatible = "renesas,r8a7795-usb-dmac",
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"renesas,usb-dmac";
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reg = <0 0xe6460000 0 0x100>;
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- interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "ch0", "ch1";
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clocks = <&cpg CPG_MOD 326>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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@@ -882,8 +915,8 @@
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compatible = "renesas,r8a7795-usb-dmac",
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"renesas,usb-dmac";
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reg = <0 0xe6470000 0 0x100>;
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- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "ch0", "ch1";
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clocks = <&cpg CPG_MOD 329>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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@@ -918,23 +951,23 @@
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compatible = "renesas,dmac-r8a7795",
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"renesas,rcar-dmac";
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reg = <0 0xe6700000 0 0x10000>;
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- interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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@@ -960,23 +993,23 @@
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compatible = "renesas,dmac-r8a7795",
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"renesas,rcar-dmac";
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reg = <0 0xe7300000 0 0x10000>;
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- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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@@ -1002,23 +1035,23 @@
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compatible = "renesas,dmac-r8a7795",
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"renesas,rcar-dmac";
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reg = <0 0xe7310000 0 0x10000>;
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- interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
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- GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
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+ <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5", "ch6", "ch7",
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@@ -1450,6 +1483,17 @@
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status = "disabled";
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};
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+ tpu: pwm@e6e80000 {
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+ compatible = "renesas,tpu-r8a7795", "renesas,tpu";
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+ reg = <0 0xe6e80000 0 0x148>;
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+ interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&cpg CPG_MOD 304>;
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+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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+ resets = <&cpg 304>;
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+ #pwm-cells = <3>;
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+ status = "disabled";
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+ };
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+
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msiof0: spi@e6e90000 {
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compatible = "renesas,msiof-r8a7795",
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"renesas,rcar-gen3-msiof";
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@@ -2299,23 +2343,23 @@
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compatible = "renesas,dmac-r8a7795",
|
|
|
"renesas,rcar-dmac";
|
|
|
reg = <0 0xec700000 0 0x10000>;
|
|
|
- interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
+ interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
interrupt-names = "error",
|
|
|
"ch0", "ch1", "ch2", "ch3",
|
|
|
"ch4", "ch5", "ch6", "ch7",
|
|
@@ -2341,23 +2385,23 @@
|
|
|
compatible = "renesas,dmac-r8a7795",
|
|
|
"renesas,rcar-dmac";
|
|
|
reg = <0 0xec720000 0 0x10000>;
|
|
|
- interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
|
|
|
- GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
+ interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
|
|
|
+ <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
interrupt-names = "error",
|
|
|
"ch0", "ch1", "ch2", "ch3",
|
|
|
"ch4", "ch5", "ch6", "ch7",
|
|
@@ -2405,7 +2449,7 @@
|
|
|
reg = <0 0xee080000 0 0x100>;
|
|
|
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
|
|
- phys = <&usb2_phy0>;
|
|
|
+ phys = <&usb2_phy0 1>;
|
|
|
phy-names = "usb";
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
resets = <&cpg 703>, <&cpg 704>;
|
|
@@ -2417,7 +2461,7 @@
|
|
|
reg = <0 0xee0a0000 0 0x100>;
|
|
|
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
clocks = <&cpg CPG_MOD 702>;
|
|
|
- phys = <&usb2_phy1>;
|
|
|
+ phys = <&usb2_phy1 1>;
|
|
|
phy-names = "usb";
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
resets = <&cpg 702>;
|
|
@@ -2429,7 +2473,7 @@
|
|
|
reg = <0 0xee0c0000 0 0x100>;
|
|
|
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
clocks = <&cpg CPG_MOD 701>;
|
|
|
- phys = <&usb2_phy2>;
|
|
|
+ phys = <&usb2_phy2 1>;
|
|
|
phy-names = "usb";
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
resets = <&cpg 701>;
|
|
@@ -2441,7 +2485,7 @@
|
|
|
reg = <0 0xee0e0000 0 0x100>;
|
|
|
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
|
|
|
- phys = <&usb2_phy3>;
|
|
|
+ phys = <&usb2_phy3 1>;
|
|
|
phy-names = "usb";
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
resets = <&cpg 700>, <&cpg 705>;
|
|
@@ -2453,7 +2497,7 @@
|
|
|
reg = <0 0xee080100 0 0x100>;
|
|
|
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
|
|
- phys = <&usb2_phy0>;
|
|
|
+ phys = <&usb2_phy0 2>;
|
|
|
phy-names = "usb";
|
|
|
companion = <&ohci0>;
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
@@ -2466,7 +2510,7 @@
|
|
|
reg = <0 0xee0a0100 0 0x100>;
|
|
|
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
clocks = <&cpg CPG_MOD 702>;
|
|
|
- phys = <&usb2_phy1>;
|
|
|
+ phys = <&usb2_phy1 2>;
|
|
|
phy-names = "usb";
|
|
|
companion = <&ohci1>;
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
@@ -2479,7 +2523,7 @@
|
|
|
reg = <0 0xee0c0100 0 0x100>;
|
|
|
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
clocks = <&cpg CPG_MOD 701>;
|
|
|
- phys = <&usb2_phy2>;
|
|
|
+ phys = <&usb2_phy2 2>;
|
|
|
phy-names = "usb";
|
|
|
companion = <&ohci2>;
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
@@ -2492,7 +2536,7 @@
|
|
|
reg = <0 0xee0e0100 0 0x100>;
|
|
|
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
|
|
|
- phys = <&usb2_phy3>;
|
|
|
+ phys = <&usb2_phy3 2>;
|
|
|
phy-names = "usb";
|
|
|
companion = <&ohci3>;
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
@@ -2508,7 +2552,7 @@
|
|
|
clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
resets = <&cpg 703>, <&cpg 704>;
|
|
|
- #phy-cells = <0>;
|
|
|
+ #phy-cells = <1>;
|
|
|
status = "disabled";
|
|
|
};
|
|
|
|
|
@@ -2519,7 +2563,7 @@
|
|
|
clocks = <&cpg CPG_MOD 702>;
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
resets = <&cpg 702>;
|
|
|
- #phy-cells = <0>;
|
|
|
+ #phy-cells = <1>;
|
|
|
status = "disabled";
|
|
|
};
|
|
|
|
|
@@ -2530,7 +2574,7 @@
|
|
|
clocks = <&cpg CPG_MOD 701>;
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
resets = <&cpg 701>;
|
|
|
- #phy-cells = <0>;
|
|
|
+ #phy-cells = <1>;
|
|
|
status = "disabled";
|
|
|
};
|
|
|
|
|
@@ -2542,7 +2586,7 @@
|
|
|
clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
resets = <&cpg 700>, <&cpg 705>;
|
|
|
- #phy-cells = <0>;
|
|
|
+ #phy-cells = <1>;
|
|
|
status = "disabled";
|
|
|
};
|
|
|
|
|
@@ -2555,6 +2599,7 @@
|
|
|
max-frequency = <200000000>;
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
resets = <&cpg 314>;
|
|
|
+ iommus = <&ipmmu_ds1 32>;
|
|
|
status = "disabled";
|
|
|
};
|
|
|
|
|
@@ -2567,6 +2612,7 @@
|
|
|
max-frequency = <200000000>;
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
resets = <&cpg 313>;
|
|
|
+ iommus = <&ipmmu_ds1 33>;
|
|
|
status = "disabled";
|
|
|
};
|
|
|
|
|
@@ -2579,6 +2625,7 @@
|
|
|
max-frequency = <200000000>;
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
resets = <&cpg 312>;
|
|
|
+ iommus = <&ipmmu_ds1 34>;
|
|
|
status = "disabled";
|
|
|
};
|
|
|
|
|
@@ -2591,6 +2638,7 @@
|
|
|
max-frequency = <200000000>;
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
resets = <&cpg 311>;
|
|
|
+ iommus = <&ipmmu_ds1 35>;
|
|
|
status = "disabled";
|
|
|
};
|
|
|
|
|
@@ -2631,10 +2679,10 @@
|
|
|
#size-cells = <2>;
|
|
|
bus-range = <0x00 0xff>;
|
|
|
device_type = "pci";
|
|
|
- ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
|
|
|
- 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
|
|
|
- 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
|
|
|
- 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
|
|
+ ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
|
|
|
+ <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
|
|
|
+ <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
|
|
|
+ <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
|
|
|
/* Map all possible DDR as inbound ranges */
|
|
|
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
|
|
|
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
|
|
@@ -2658,10 +2706,10 @@
|
|
|
#size-cells = <2>;
|
|
|
bus-range = <0x00 0xff>;
|
|
|
device_type = "pci";
|
|
|
- ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
|
|
|
- 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
|
|
|
- 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
|
|
|
- 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
|
|
|
+ ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
|
|
|
+ <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
|
|
|
+ <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
|
|
|
+ <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
|
|
|
/* Map all possible DDR as inbound ranges */
|
|
|
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
|
|
|
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
|
|
@@ -2717,6 +2765,83 @@
|
|
|
resets = <&cpg 820>;
|
|
|
};
|
|
|
|
|
|
+ vspbc: vsp@fe920000 {
|
|
|
+ compatible = "renesas,vsp2";
|
|
|
+ reg = <0 0xfe920000 0 0x8000>;
|
|
|
+ interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
+ clocks = <&cpg CPG_MOD 624>;
|
|
|
+ power-domains = <&sysc R8A7795_PD_A3VP>;
|
|
|
+ resets = <&cpg 624>;
|
|
|
+
|
|
|
+ renesas,fcp = <&fcpvb1>;
|
|
|
+ };
|
|
|
+
|
|
|
+ vspbd: vsp@fe960000 {
|
|
|
+ compatible = "renesas,vsp2";
|
|
|
+ reg = <0 0xfe960000 0 0x8000>;
|
|
|
+ interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
+ clocks = <&cpg CPG_MOD 626>;
|
|
|
+ power-domains = <&sysc R8A7795_PD_A3VP>;
|
|
|
+ resets = <&cpg 626>;
|
|
|
+
|
|
|
+ renesas,fcp = <&fcpvb0>;
|
|
|
+ };
|
|
|
+
|
|
|
+ vspd0: vsp@fea20000 {
|
|
|
+ compatible = "renesas,vsp2";
|
|
|
+ reg = <0 0xfea20000 0 0x5000>;
|
|
|
+ interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
+ clocks = <&cpg CPG_MOD 623>;
|
|
|
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
+ resets = <&cpg 623>;
|
|
|
+
|
|
|
+ renesas,fcp = <&fcpvd0>;
|
|
|
+ };
|
|
|
+
|
|
|
+ vspd1: vsp@fea28000 {
|
|
|
+ compatible = "renesas,vsp2";
|
|
|
+ reg = <0 0xfea28000 0 0x5000>;
|
|
|
+ interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
+ clocks = <&cpg CPG_MOD 622>;
|
|
|
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
+ resets = <&cpg 622>;
|
|
|
+
|
|
|
+ renesas,fcp = <&fcpvd1>;
|
|
|
+ };
|
|
|
+
|
|
|
+ vspd2: vsp@fea30000 {
|
|
|
+ compatible = "renesas,vsp2";
|
|
|
+ reg = <0 0xfea30000 0 0x5000>;
|
|
|
+ interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
+ clocks = <&cpg CPG_MOD 621>;
|
|
|
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
+ resets = <&cpg 621>;
|
|
|
+
|
|
|
+ renesas,fcp = <&fcpvd2>;
|
|
|
+ };
|
|
|
+
|
|
|
+ vspi0: vsp@fe9a0000 {
|
|
|
+ compatible = "renesas,vsp2";
|
|
|
+ reg = <0 0xfe9a0000 0 0x8000>;
|
|
|
+ interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
+ clocks = <&cpg CPG_MOD 631>;
|
|
|
+ power-domains = <&sysc R8A7795_PD_A3VP>;
|
|
|
+ resets = <&cpg 631>;
|
|
|
+
|
|
|
+ renesas,fcp = <&fcpvi0>;
|
|
|
+ };
|
|
|
+
|
|
|
+ vspi1: vsp@fe9b0000 {
|
|
|
+ compatible = "renesas,vsp2";
|
|
|
+ reg = <0 0xfe9b0000 0 0x8000>;
|
|
|
+ interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
+ clocks = <&cpg CPG_MOD 630>;
|
|
|
+ power-domains = <&sysc R8A7795_PD_A3VP>;
|
|
|
+ resets = <&cpg 630>;
|
|
|
+
|
|
|
+ renesas,fcp = <&fcpvi1>;
|
|
|
+ };
|
|
|
+
|
|
|
fdp1@fe940000 {
|
|
|
compatible = "renesas,fdp1";
|
|
|
reg = <0 0xfe940000 0 0x2400>;
|
|
@@ -2818,81 +2943,40 @@
|
|
|
iommus = <&ipmmu_vi1 10>;
|
|
|
};
|
|
|
|
|
|
- vspbd: vsp@fe960000 {
|
|
|
- compatible = "renesas,vsp2";
|
|
|
- reg = <0 0xfe960000 0 0x8000>;
|
|
|
- interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
- clocks = <&cpg CPG_MOD 626>;
|
|
|
- power-domains = <&sysc R8A7795_PD_A3VP>;
|
|
|
- resets = <&cpg 626>;
|
|
|
-
|
|
|
- renesas,fcp = <&fcpvb0>;
|
|
|
- };
|
|
|
-
|
|
|
- vspbc: vsp@fe920000 {
|
|
|
- compatible = "renesas,vsp2";
|
|
|
- reg = <0 0xfe920000 0 0x8000>;
|
|
|
- interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
- clocks = <&cpg CPG_MOD 624>;
|
|
|
- power-domains = <&sysc R8A7795_PD_A3VP>;
|
|
|
- resets = <&cpg 624>;
|
|
|
-
|
|
|
- renesas,fcp = <&fcpvb1>;
|
|
|
- };
|
|
|
-
|
|
|
- vspd0: vsp@fea20000 {
|
|
|
- compatible = "renesas,vsp2";
|
|
|
- reg = <0 0xfea20000 0 0x5000>;
|
|
|
- interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
- clocks = <&cpg CPG_MOD 623>;
|
|
|
+ cmm0: cmm@fea40000 {
|
|
|
+ compatible = "renesas,r8a7795-cmm",
|
|
|
+ "renesas,rcar-gen3-cmm";
|
|
|
+ reg = <0 0xfea40000 0 0x1000>;
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
- resets = <&cpg 623>;
|
|
|
-
|
|
|
- renesas,fcp = <&fcpvd0>;
|
|
|
+ clocks = <&cpg CPG_MOD 711>;
|
|
|
+ resets = <&cpg 711>;
|
|
|
};
|
|
|
|
|
|
- vspd1: vsp@fea28000 {
|
|
|
- compatible = "renesas,vsp2";
|
|
|
- reg = <0 0xfea28000 0 0x5000>;
|
|
|
- interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
- clocks = <&cpg CPG_MOD 622>;
|
|
|
+ cmm1: cmm@fea50000 {
|
|
|
+ compatible = "renesas,r8a7795-cmm",
|
|
|
+ "renesas,rcar-gen3-cmm";
|
|
|
+ reg = <0 0xfea50000 0 0x1000>;
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
- resets = <&cpg 622>;
|
|
|
-
|
|
|
- renesas,fcp = <&fcpvd1>;
|
|
|
+ clocks = <&cpg CPG_MOD 710>;
|
|
|
+ resets = <&cpg 710>;
|
|
|
};
|
|
|
|
|
|
- vspd2: vsp@fea30000 {
|
|
|
- compatible = "renesas,vsp2";
|
|
|
- reg = <0 0xfea30000 0 0x5000>;
|
|
|
- interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
- clocks = <&cpg CPG_MOD 621>;
|
|
|
+ cmm2: cmm@fea60000 {
|
|
|
+ compatible = "renesas,r8a7795-cmm",
|
|
|
+ "renesas,rcar-gen3-cmm";
|
|
|
+ reg = <0 0xfea60000 0 0x1000>;
|
|
|
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
- resets = <&cpg 621>;
|
|
|
-
|
|
|
- renesas,fcp = <&fcpvd2>;
|
|
|
+ clocks = <&cpg CPG_MOD 709>;
|
|
|
+ resets = <&cpg 709>;
|
|
|
};
|
|
|
|
|
|
- vspi0: vsp@fe9a0000 {
|
|
|
- compatible = "renesas,vsp2";
|
|
|
- reg = <0 0xfe9a0000 0 0x8000>;
|
|
|
- interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
- clocks = <&cpg CPG_MOD 631>;
|
|
|
- power-domains = <&sysc R8A7795_PD_A3VP>;
|
|
|
- resets = <&cpg 631>;
|
|
|
-
|
|
|
- renesas,fcp = <&fcpvi0>;
|
|
|
- };
|
|
|
-
|
|
|
- vspi1: vsp@fe9b0000 {
|
|
|
- compatible = "renesas,vsp2";
|
|
|
- reg = <0 0xfe9b0000 0 0x8000>;
|
|
|
- interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
- clocks = <&cpg CPG_MOD 630>;
|
|
|
- power-domains = <&sysc R8A7795_PD_A3VP>;
|
|
|
- resets = <&cpg 630>;
|
|
|
-
|
|
|
- renesas,fcp = <&fcpvi1>;
|
|
|
+ cmm3: cmm@fea70000 {
|
|
|
+ compatible = "renesas,r8a7795-cmm",
|
|
|
+ "renesas,rcar-gen3-cmm";
|
|
|
+ reg = <0 0xfea70000 0 0x1000>;
|
|
|
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
|
|
|
+ clocks = <&cpg CPG_MOD 708>;
|
|
|
+ resets = <&cpg 708>;
|
|
|
};
|
|
|
|
|
|
csi20: csi2@fea80000 {
|
|
@@ -3098,7 +3182,10 @@
|
|
|
<&cpg CPG_MOD 722>,
|
|
|
<&cpg CPG_MOD 721>;
|
|
|
clock-names = "du.0", "du.1", "du.2", "du.3";
|
|
|
- vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>;
|
|
|
+
|
|
|
+ renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
|
|
|
+ vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;
|
|
|
+
|
|
|
status = "disabled";
|
|
|
|
|
|
ports {
|
|
@@ -3168,58 +3255,30 @@
|
|
|
polling-delay-passive = <250>;
|
|
|
polling-delay = <1000>;
|
|
|
thermal-sensors = <&tsc 0>;
|
|
|
+ sustainable-power = <6313>;
|
|
|
|
|
|
trips {
|
|
|
- sensor1_passive: sensor1-passive {
|
|
|
- temperature = <95000>;
|
|
|
- hysteresis = <1000>;
|
|
|
- type = "passive";
|
|
|
- };
|
|
|
sensor1_crit: sensor1-crit {
|
|
|
temperature = <120000>;
|
|
|
hysteresis = <1000>;
|
|
|
type = "critical";
|
|
|
};
|
|
|
};
|
|
|
-
|
|
|
- cooling-maps {
|
|
|
- map0 {
|
|
|
- trip = <&sensor1_passive>;
|
|
|
- cooling-device = <&a57_0 4 4>,
|
|
|
- <&a57_1 4 4>,
|
|
|
- <&a57_2 4 4>,
|
|
|
- <&a57_3 4 4>;
|
|
|
- };
|
|
|
- };
|
|
|
};
|
|
|
|
|
|
sensor_thermal2: sensor-thermal2 {
|
|
|
polling-delay-passive = <250>;
|
|
|
polling-delay = <1000>;
|
|
|
thermal-sensors = <&tsc 1>;
|
|
|
+ sustainable-power = <6313>;
|
|
|
|
|
|
trips {
|
|
|
- sensor2_passive: sensor2-passive {
|
|
|
- temperature = <95000>;
|
|
|
- hysteresis = <1000>;
|
|
|
- type = "passive";
|
|
|
- };
|
|
|
sensor2_crit: sensor2-crit {
|
|
|
temperature = <120000>;
|
|
|
hysteresis = <1000>;
|
|
|
type = "critical";
|
|
|
};
|
|
|
};
|
|
|
-
|
|
|
- cooling-maps {
|
|
|
- map0 {
|
|
|
- trip = <&sensor2_passive>;
|
|
|
- cooling-device = <&a57_0 4 4>,
|
|
|
- <&a57_1 4 4>,
|
|
|
- <&a57_2 4 4>,
|
|
|
- <&a57_3 4 4>;
|
|
|
- };
|
|
|
- };
|
|
|
};
|
|
|
|
|
|
sensor_thermal3: sensor-thermal3 {
|
|
@@ -3228,11 +3287,12 @@
|
|
|
thermal-sensors = <&tsc 2>;
|
|
|
|
|
|
trips {
|
|
|
- sensor3_passive: sensor3-passive {
|
|
|
- temperature = <95000>;
|
|
|
+ target: trip-point1 {
|
|
|
+ temperature = <100000>;
|
|
|
hysteresis = <1000>;
|
|
|
type = "passive";
|
|
|
};
|
|
|
+
|
|
|
sensor3_crit: sensor3-crit {
|
|
|
temperature = <120000>;
|
|
|
hysteresis = <1000>;
|
|
@@ -3242,11 +3302,15 @@
|
|
|
|
|
|
cooling-maps {
|
|
|
map0 {
|
|
|
- trip = <&sensor3_passive>;
|
|
|
- cooling-device = <&a57_0 4 4>,
|
|
|
- <&a57_1 4 4>,
|
|
|
- <&a57_2 4 4>,
|
|
|
- <&a57_3 4 4>;
|
|
|
+ trip = <&target>;
|
|
|
+ cooling-device = <&a57_0 2 4>;
|
|
|
+ contribution = <1024>;
|
|
|
+ };
|
|
|
+
|
|
|
+ map1 {
|
|
|
+ trip = <&target>;
|
|
|
+ cooling-device = <&a53_0 0 2>;
|
|
|
+ contribution = <1024>;
|
|
|
};
|
|
|
};
|
|
|
};
|