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@@ -61,8 +61,6 @@
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#define CPLD_DONE_ADR ((vu_char *)0xA4050132)
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#define CPLD_DONE_DAT 0x20
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-#define HIZCRB ((vu_short *)0xA405015A)
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-
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/* data */
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#define CPLD_NOMAL_START 0xA0A80000
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#define CPLD_SAFE_START 0xA0AC0000
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@@ -191,7 +189,7 @@ void init_cpld(void)
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if (*CPLD_DONE_ADR & CPLD_DONE_DAT) /* Already DONE */
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return;
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- *HIZCRB = 0x0000;
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+ *((vu_short *)HIZCRB) = 0x0000;
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*CPLD_PFC_ADR = 0x7c00; /* FPGA PROG = OUTPUT */
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/* write CPLD data from NOR flash to device */
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