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@@ -0,0 +1,506 @@
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+/*
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+ * Device tree file for Phytec phyCORE-RK3288 SoM
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+ * Copyright (C) 2017 PHYTEC Messtechnik GmbH
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+ * Author: Wadim Egorov <w.egorov@phytec.de>
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+ *
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+ * This file is dual-licensed: you can use it either under the terms
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+ * of the GPL or the X11 license, at your option. Note that this dual
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+ * licensing only applies to this file, and not this project as a
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+ * whole.
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+ *
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+ * a) This file is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of the
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+ * License, or (at your option) any later version.
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+ *
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+ * This file is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * Or, alternatively,
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+ *
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+ * b) Permission is hereby granted, free of charge, to any person
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+ * obtaining a copy of this software and associated documentation
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+ * files (the "Software"), to deal in the Software without
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+ * restriction, including without limitation the rights to use,
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+ * copy, modify, merge, publish, distribute, sublicense, and/or
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+ * sell copies of the Software, and to permit persons to whom the
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+ * Software is furnished to do so, subject to the following
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+ * conditions:
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+ *
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+ * The above copyright notice and this permission notice shall be
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+ * included in all copies or substantial portions of the Software.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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+ * OTHER DEALINGS IN THE SOFTWARE.
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+ */
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+
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+#include <dt-bindings/net/ti-dp83867.h>
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+#include "rk3288.dtsi"
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+
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+/ {
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+ model = "Phytec RK3288 phyCORE";
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+ compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
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+
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+ /*
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+ * Set the minimum memory size here and
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+ * let the bootloader set the real size.
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+ */
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+ memory {
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+ device_type = "memory";
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+ reg = <0 0x8000000>;
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+ };
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+
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+ aliases {
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+ rtc0 = &i2c_rtc;
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+ rtc1 = &rk818;
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+ };
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+
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+ ext_gmac: external-gmac-clock {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <125000000>;
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+ clock-output-names = "ext_gmac";
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+ };
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+
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+ io_domains: io_domains {
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+ compatible = "rockchip,rk3288-io-voltage-domain";
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+
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+ status = "okay";
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+ sdcard-supply = <&vdd_io_sd>;
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+ flash0-supply = <&vdd_emmc_io>;
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+ flash1-supply = <&vdd_misc_1v8>;
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+ gpio1830-supply = <&vdd_3v3_io>;
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+ gpio30-supply = <&vdd_3v3_io>;
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+ bb-supply = <&vdd_3v3_io>;
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+ dvp-supply = <&vdd_3v3_io>;
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+ lcdc-supply = <&vdd_3v3_io>;
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+ wifi-supply = <&vdd_3v3_io>;
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+ audio-supply = <&vdd_3v3_io>;
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+ };
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+
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+ leds: user-leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&user_led>;
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+
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+ user {
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+ label = "green_led";
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+ gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "heartbeat";
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+ default-state = "keep";
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+ };
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+ };
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+
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+ vdd_emmc_io: vdd-emmc-io {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vdd_emmc_io";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vdd_3v3_io>;
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+ };
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+
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+ vdd_in_otg_out: vdd-in-otg-out {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vdd_in_otg_out";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ vdd_misc_1v8: vdd-misc-1v8 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vdd_misc_1v8";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ };
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+};
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+
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+&cpu0 {
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+ cpu0-supply = <&vdd_cpu>;
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+ operating-points = <
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+ /* KHz uV */
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+ 1800000 1400000
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+ 1608000 1350000
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+ 1512000 1300000
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+ 1416000 1200000
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+ 1200000 1100000
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+ 1008000 1050000
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+ 816000 1000000
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+ 696000 950000
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+ 600000 900000
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+ 408000 900000
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+ 312000 900000
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+ 216000 900000
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+ 126000 900000
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+ >;
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+};
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+
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+&emmc {
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+ status = "okay";
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+ u-boot,dm-pre-reloc;
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+
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+ bus-width = <8>;
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+ cap-mmc-highspeed;
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+ disable-wp;
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+ non-removable;
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+ num-slots = <1>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
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+ vmmc-supply = <&vdd_3v3_io>;
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+ vqmmc-supply = <&vdd_emmc_io>;
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+};
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+
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+&gmac {
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+ assigned-clocks = <&cru SCLK_MAC>;
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+ assigned-clock-parents = <&ext_gmac>;
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+ clock_in_out = "input";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&rgmii_pins &phy_rst &phy_int>;
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+ phy-handle = <&phy0>;
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+ phy-supply = <&vdd_eth_2v5>;
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+ phy-mode = "rgmii-id";
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+ snps,reset-active-low;
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+ snps,reset-delays-us = <0 10000 1000000>;
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+ snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
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+ tx_delay = <0x0>;
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+ rx_delay = <0x0>;
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+
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+ mdio0 {
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+ compatible = "snps,dwmac-mdio";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ phy0: ethernet-phy@0 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <0>;
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+ interrupt-parent = <&gpio4>;
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+ interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
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+ ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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+ ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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+ ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
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+ enet-phy-lane-no-swap;
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+ };
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+ };
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+};
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+
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+&hdmi {
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+ ddc-i2c-bus = <&i2c5>;
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+};
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+
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+&i2c0 {
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+ status = "okay";
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+ u-boot,dm-pre-reloc;
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+
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+ clock-frequency = <400000>;
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+
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+ rk818: pmic@1c {
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+ status = "okay";
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+ compatible = "rockchip,rk818";
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+ reg = <0x1c>;
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+ interrupt-parent = <&gpio0>;
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+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pmic_int>;
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+ rockchip,system-power-controller;
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+ wakeup-source;
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+ #clock-cells = <1>;
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+ u-boot,dm-pre-reloc;
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+
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+ vcc1-supply = <&vdd_sys>;
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+ vcc2-supply = <&vdd_sys>;
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+ vcc3-supply = <&vdd_sys>;
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+ vcc4-supply = <&vdd_sys>;
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+ boost-supply = <&vdd_in_otg_out>;
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+ vcc6-supply = <&vdd_sys>;
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+ vcc7-supply = <&vdd_misc_1v8>;
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+ vcc8-supply = <&vdd_misc_1v8>;
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+ vcc9-supply = <&vdd_3v3_io>;
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+ vddio-supply = <&vdd_3v3_io>;
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+
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+ regulators {
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+ u-boot,dm-pre-reloc;
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+ vdd_log: DCDC_REG1 {
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+ regulator-name = "vdd_log";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1100000>;
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+ regulator-max-microvolt = <1100000>;
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdd_gpu: DCDC_REG2 {
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+ regulator-name = "vdd_gpu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <800000>;
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+ regulator-max-microvolt = <1250000>;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1000000>;
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+ };
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+ };
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+
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+ vcc_ddr: DCDC_REG3 {
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+ regulator-name = "vcc_ddr";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ vdd_3v3_io: DCDC_REG4 {
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+ regulator-name = "vdd_3v3_io";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+
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+ vdd_sys: DCDC_BOOST {
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+ regulator-name = "vdd_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <5000000>;
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+ };
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+ };
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+
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+ /* vcc9 */
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+ vdd_sd: SWITCH_REG {
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+ regulator-name = "vdd_sd";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ /* vcc6 */
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+ vdd_eth_2v5: LDO_REG2 {
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+ regulator-name = "vdd_eth_2v5";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <2500000>;
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+ regulator-max-microvolt = <2500000>;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <2500000>;
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+ };
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+ };
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+
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+ /* vcc7 */
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+ vdd_1v0: LDO_REG3 {
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+ regulator-name = "vdd_1v0";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1000000>;
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+ regulator-max-microvolt = <1000000>;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1000000>;
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+ };
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+ };
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+
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+ /* vcc8 */
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+ vdd_1v8_lcd_ldo: LDO_REG4 {
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+ regulator-name = "vdd_1v8_lcd_ldo";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1800000>;
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+ };
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+ };
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+
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+ /* vcc8 */
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+ vdd_1v0_lcd: LDO_REG6 {
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+ regulator-name = "vdd_1v0_lcd";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1000000>;
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+ regulator-max-microvolt = <1000000>;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1000000>;
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+ };
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+ };
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+
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+ /* vcc7 */
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+ vdd_1v8_ldo: LDO_REG7 {
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+ regulator-name = "vdd_1v8_ldo";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ regulator-suspend-microvolt = <1800000>;
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+ };
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+ };
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+
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+ /* vcc9 */
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+ vdd_io_sd: LDO_REG9 {
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+ regulator-name = "vdd_io_sd";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+ };
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+ };
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+
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+ /* M24C32-D */
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+ i2c_eeprom: eeprom@50 {
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+ compatible = "atmel,24c32";
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+ reg = <0x50>;
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+ pagesize = <32>;
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+ };
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+
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+ vdd_cpu: regulator@60 {
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+ compatible = "fcs,fan53555";
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+ reg = <0x60>;
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+ fcs,suspend-voltage-selector = <1>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-enable-ramp-delay = <300>;
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+ regulator-name = "vdd_cpu";
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+ regulator-min-microvolt = <800000>;
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+ regulator-max-microvolt = <1430000>;
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+ regulator-ramp-delay = <8000>;
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+ vin-supply = <&vdd_sys>;
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+ };
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+};
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+
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+&pinctrl {
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+ pcfg_output_high: pcfg-output-high {
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+ output-high;
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+ };
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+
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+ emmc {
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+ /*
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+ * We run eMMC at max speed; bump up drive strength.
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+ * We also have external pulls, so disable the internal ones.
|
|
|
+ */
|
|
|
+ emmc_clk: emmc-clk {
|
|
|
+ rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_12ma>;
|
|
|
+ };
|
|
|
+
|
|
|
+ emmc_cmd: emmc-cmd {
|
|
|
+ rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_12ma>;
|
|
|
+ };
|
|
|
+
|
|
|
+ emmc_bus8: emmc-bus8 {
|
|
|
+ rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_12ma>,
|
|
|
+ <3 1 RK_FUNC_2 &pcfg_pull_none_12ma>,
|
|
|
+ <3 2 RK_FUNC_2 &pcfg_pull_none_12ma>,
|
|
|
+ <3 3 RK_FUNC_2 &pcfg_pull_none_12ma>,
|
|
|
+ <3 4 RK_FUNC_2 &pcfg_pull_none_12ma>,
|
|
|
+ <3 5 RK_FUNC_2 &pcfg_pull_none_12ma>,
|
|
|
+ <3 6 RK_FUNC_2 &pcfg_pull_none_12ma>,
|
|
|
+ <3 7 RK_FUNC_2 &pcfg_pull_none_12ma>;
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ gmac {
|
|
|
+ phy_int: phy-int {
|
|
|
+ rockchip,pins = <4 2 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
|
+ };
|
|
|
+
|
|
|
+ phy_rst: phy-rst {
|
|
|
+ rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ leds {
|
|
|
+ user_led: user-led {
|
|
|
+ rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_output_high>;
|
|
|
+ };
|
|
|
+ };
|
|
|
+
|
|
|
+ pmic {
|
|
|
+ pmic_int: pmic-int {
|
|
|
+ rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
|
+ };
|
|
|
+
|
|
|
+ /* Pin for switching state between sleep and non-sleep state */
|
|
|
+ pmic_sleep: pmic-sleep {
|
|
|
+ rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
|
+ };
|
|
|
+ };
|
|
|
+};
|
|
|
+
|
|
|
+&pwm1 {
|
|
|
+ status = "okay";
|
|
|
+};
|
|
|
+
|
|
|
+&saradc {
|
|
|
+ status = "okay";
|
|
|
+ vref-supply = <&vdd_1v8_ldo>;
|
|
|
+};
|
|
|
+
|
|
|
+&spi2 {
|
|
|
+ status = "okay";
|
|
|
+
|
|
|
+ serial_flash: flash@0 {
|
|
|
+ compatible = "micron,n25q128a13", "jedec,spi-nor";
|
|
|
+ reg = <0x0>;
|
|
|
+ spi-max-frequency = <50000000>;
|
|
|
+ m25p,fast-read;
|
|
|
+ #address-cells = <1>;
|
|
|
+ #size-cells = <1>;
|
|
|
+ status = "okay";
|
|
|
+ };
|
|
|
+};
|
|
|
+
|
|
|
+&tsadc {
|
|
|
+ status = "okay";
|
|
|
+ rockchip,hw-tshut-mode = <0>;
|
|
|
+ rockchip,hw-tshut-polarity = <0>;
|
|
|
+};
|
|
|
+
|
|
|
+&vopb {
|
|
|
+ status = "okay";
|
|
|
+};
|
|
|
+
|
|
|
+&vopb_mmu {
|
|
|
+ status = "okay";
|
|
|
+};
|
|
|
+
|
|
|
+&vopl {
|
|
|
+ status = "okay";
|
|
|
+};
|
|
|
+
|
|
|
+&vopl_mmu {
|
|
|
+ status = "okay";
|
|
|
+};
|
|
|
+
|
|
|
+&wdt {
|
|
|
+ status = "okay";
|
|
|
+};
|