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@@ -8,6 +8,7 @@
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#include <common.h>
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#include <dm.h>
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+#include <fdtdec.h>
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#include <init.h>
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#include <ram.h>
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#include <regmap.h>
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@@ -39,9 +40,6 @@
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#define DENALI_PHY_1152 1152
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#define DENALI_PHY_1214 1214
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-#define PAYLOAD_DEST 0x80000000
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-#define DDR_MEM_SIZE (8UL * 1024UL * 1024UL * 1024UL)
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-
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#define DRAM_CLASS_OFFSET 8
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#define DRAM_CLASS_DDR4 0xA
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#define OPTIMAL_RMODW_EN_OFFSET 0
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@@ -65,6 +63,8 @@
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#define PHY_RX_CAL_DQ0_0_OFFSET 0
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#define PHY_RX_CAL_DQ1_0_OFFSET 16
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+DECLARE_GLOBAL_DATA_PTR;
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+
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struct fu540_ddrctl {
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volatile u32 denali_ctl[265];
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};
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@@ -235,8 +235,8 @@ static int fu540_ddr_setup(struct udevice *dev)
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struct fu540_ddr_params *params = &plat->ddr_params;
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volatile u32 *denali_ctl = priv->ctl->denali_ctl;
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volatile u32 *denali_phy = priv->phy->denali_phy;
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- const u64 ddr_size = DDR_MEM_SIZE;
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- const u64 ddr_end = PAYLOAD_DEST + ddr_size;
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+ const u64 ddr_size = priv->info.size;
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+ const u64 ddr_end = priv->info.base + ddr_size;
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int ret, i;
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u32 physet;
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@@ -302,7 +302,7 @@ static int fu540_ddr_setup(struct udevice *dev)
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| (1 << MULTIPLE_OUT_OF_RANGE_OFFSET));
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/* set up range protection */
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- fu540_ddr_setup_range_protection(denali_ctl, DDR_MEM_SIZE);
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+ fu540_ddr_setup_range_protection(denali_ctl, priv->info.size);
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/* Mask off port command error interrupt DENALI_CTL_136 */
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setbits_le32(DENALI_CTL_136 + denali_ctl,
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@@ -314,14 +314,14 @@ static int fu540_ddr_setup(struct udevice *dev)
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/* check size */
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priv->info.size = get_ram_size((long *)priv->info.base,
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- DDR_MEM_SIZE);
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+ ddr_size);
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debug("%s : %lx\n", __func__, priv->info.size);
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/* check memory access for all memory */
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- if (priv->info.size != DDR_MEM_SIZE) {
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+ if (priv->info.size != ddr_size) {
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printf("DDR invalid size : 0x%lx, expected 0x%lx\n",
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- priv->info.size, DDR_MEM_SIZE);
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+ priv->info.size, (uintptr_t)ddr_size);
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return -EINVAL;
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}
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@@ -333,6 +333,11 @@ static int fu540_ddr_probe(struct udevice *dev)
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{
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struct fu540_ddr_info *priv = dev_get_priv(dev);
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+ /* Read memory base and size from DT */
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+ fdtdec_setup_mem_size_base();
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+ priv->info.base = gd->ram_base;
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+ priv->info.size = gd->ram_size;
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+
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#if defined(CONFIG_SPL_BUILD)
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struct regmap *map;
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int ret;
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@@ -368,14 +373,9 @@ static int fu540_ddr_probe(struct udevice *dev)
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priv->phy = regmap_get_range(map, 1);
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priv->physical_filter_ctrl = regmap_get_range(map, 2);
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- priv->info.base = CONFIG_SYS_SDRAM_BASE;
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-
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- priv->info.size = 0;
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return fu540_ddr_setup(dev);
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-#else
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- priv->info.base = CONFIG_SYS_SDRAM_BASE;
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- priv->info.size = DDR_MEM_SIZE;
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#endif
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+
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return 0;
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}
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