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@@ -0,0 +1,222 @@
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+/dts-v1/;
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+
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+#include <dt-bindings/clock/boston-clock.h>
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/interrupt-controller/irq.h>
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+#include <dt-bindings/interrupt-controller/mips-gic.h>
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+
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+/ {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ compatible = "img,boston";
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+
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+ chosen {
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+ stdout-path = &uart0;
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+ };
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+
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+ cpus {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ cpu@0 {
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+ device_type = "cpu";
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+ compatible = "img,mips";
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+ reg = <0>;
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+ clocks = <&clk_boston BOSTON_CLK_CPU>;
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+ };
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+ };
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+
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+ memory@0 {
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+ device_type = "memory";
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+ reg = <0x00000000 0x10000000>;
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+ };
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+
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+ gic: interrupt-controller {
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+ compatible = "mti,gic";
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+
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+ interrupt-controller;
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+ #interrupt-cells = <3>;
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+
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+ timer {
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+ compatible = "mti,gic-timer";
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+ interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
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+ clocks = <&clk_boston BOSTON_CLK_CPU>;
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+ };
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+ };
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+
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+ pci0: pci@10000000 {
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+ status = "disabled";
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+ compatible = "xlnx,axi-pcie-host-1.00.a";
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+ device_type = "pci";
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+ reg = <0x10000000 0x2000000>;
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+
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ #interrupt-cells = <1>;
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+
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+ interrupt-parent = <&gic>;
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+ interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>;
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+
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+ ranges = <0x02000000 0 0x40000000
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+ 0x40000000 0 0x40000000>;
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+
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+ interrupt-map-mask = <0 0 0 7>;
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+ interrupt-map = <0 0 0 1 &pci0_intc 0>,
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+ <0 0 0 2 &pci0_intc 1>,
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+ <0 0 0 3 &pci0_intc 2>,
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+ <0 0 0 4 &pci0_intc 3>;
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+
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+ pci0_intc: interrupt-controller {
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+ interrupt-controller;
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+ #address-cells = <0>;
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+ #interrupt-cells = <1>;
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+ };
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+ };
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+
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+ pci1: pci@12000000 {
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+ status = "disabled";
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+ compatible = "xlnx,axi-pcie-host-1.00.a";
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+ device_type = "pci";
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+ reg = <0x12000000 0x2000000>;
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+
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ #interrupt-cells = <1>;
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+
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+ interrupt-parent = <&gic>;
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+ interrupts = <GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH>;
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+
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+ ranges = <0x02000000 0 0x20000000
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+ 0x20000000 0 0x20000000>;
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+
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+ interrupt-map-mask = <0 0 0 7>;
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+ interrupt-map = <0 0 0 1 &pci1_intc 0>,
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+ <0 0 0 2 &pci1_intc 1>,
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+ <0 0 0 3 &pci1_intc 2>,
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+ <0 0 0 4 &pci1_intc 3>;
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+
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+ pci1_intc: interrupt-controller {
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+ interrupt-controller;
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+ #address-cells = <0>;
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+ #interrupt-cells = <1>;
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+ };
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+ };
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+
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+ pci2: pci@14000000 {
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+ compatible = "xlnx,axi-pcie-host-1.00.a";
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+ device_type = "pci";
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+ reg = <0x14000000 0x2000000>;
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+
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ #interrupt-cells = <1>;
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+
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+ interrupt-parent = <&gic>;
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+ interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>;
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+
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+ ranges = <0x02000000 0 0x16000000
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+ 0x16000000 0 0x100000>;
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+
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+ interrupt-map-mask = <0 0 0 7>;
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+ interrupt-map = <0 0 0 1 &pci2_intc 0>,
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+ <0 0 0 2 &pci2_intc 1>,
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+ <0 0 0 3 &pci2_intc 2>,
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+ <0 0 0 4 &pci2_intc 3>;
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+
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+ pci2_intc: interrupt-controller {
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+ interrupt-controller;
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+ #address-cells = <0>;
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+ #interrupt-cells = <1>;
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+ };
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+
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+ pci2_root@0,0,0 {
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+ compatible = "pci10ee,7021";
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+ reg = <0x00000000 0 0 0 0>;
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+
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ #interrupt-cells = <1>;
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+
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+ eg20t_bridge@1,0,0 {
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+ compatible = "pci8086,8800";
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+ reg = <0x00010000 0 0 0 0>;
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+
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+ #address-cells = <3>;
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+ #size-cells = <2>;
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+ #interrupt-cells = <1>;
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+
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+ eg20t_mac@2,0,1 {
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+ compatible = "pci8086,8802";
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+ reg = <0x00020100 0 0 0 0>;
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+ phy-reset-gpios = <&eg20t_gpio 6 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ eg20t_gpio: eg20t_gpio@2,0,2 {
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+ compatible = "pci8086,8803";
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+ reg = <0x00020200 0 0 0 0>;
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+
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+ };
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+
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+ eg20t_i2c@2,12,2 {
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+ compatible = "pci8086,8817";
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+ reg = <0x00026200 0 0 0 0>;
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+
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ rtc@0x68 {
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+ compatible = "st,m41t81s";
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+ reg = <0x68>;
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+ };
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+ };
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+ };
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+ };
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+ };
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+
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+ plat_regs: system-controller@17ffd000 {
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+ compatible = "img,boston-platform-regs", "syscon";
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+ reg = <0x17ffd000 0x1000>;
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+ u-boot,dm-pre-reloc;
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+ };
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+
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+ clk_boston: clock {
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+ compatible = "img,boston-clock";
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+ #clock-cells = <1>;
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+ regmap = <&plat_regs>;
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+ u-boot,dm-pre-reloc;
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+ };
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+
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+ reboot: syscon-reboot {
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+ compatible = "syscon-reboot";
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+ regmap = <&plat_regs>;
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+ offset = <0x10>;
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+ mask = <0x10>;
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+ };
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+
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+ uart0: uart@17ffe000 {
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+ compatible = "ns16550a";
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+ reg = <0x17ffe000 0x1000>;
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+ reg-shift = <2>;
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+ reg-io-width = <4>;
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+
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+ interrupt-parent = <&gic>;
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+ interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
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+
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+ clocks = <&clk_boston BOSTON_CLK_SYS>;
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+
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+ u-boot,dm-pre-reloc;
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+ };
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+
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+ lcd: lcd@17fff000 {
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+ compatible = "img,boston-lcd";
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+ reg = <0x17fff000 0x8>;
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+ };
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+
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+ flash@18000000 {
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+ compatible = "cfi-flash";
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+ reg = <0x18000000 0x8000000>;
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+ bank-width = <2>;
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+ };
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+};
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