Upon further review, not all code authors are in favour of this change. This reverts commit ee3556bcafbb05e59aabdc31368984e76acaabc4. Signed-off-by: Tom Rini <trini@konsulko.com>
@@ -1,7 +1,7 @@
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
- * SPDX-License-Identifier: GPL-2.0+ BSD-3-Clause
+ * SPDX-License-Identifier: GPL-2.0+
* Derived from mpc85xx_ddr_gen3.c, removed all workarounds
*/
@@ -2,7 +2,7 @@
* Copyright 2008-2016 Freescale Semiconductor, Inc.
* Copyright 2017-2018 NXP Semiconductor
* Copyright 2008 Freescale Semiconductor, Inc.
- * SPDX-License-Identifier: GPL-2.0 BSD-3-Clause
+ * SPDX-License-Identifier: GPL-2.0
#include <common.h>
@@ -6,7 +6,7 @@
* from ddr3 spd, please refer to the spec
* JEDEC standard No.21-C 4_01_02_11R18.pdf
* Copyright 2014-2016 Freescale Semiconductor, Inc.
* calculate the organization and timing parameter
* Copyright 2014-2015 Freescale Semiconductor, Inc.
* Copyright 2016 Freescale Semiconductor, Inc.
* Copyright 2010-2016 Freescale Semiconductor, Inc.
* Copyright 2008-2014 Freescale Semiconductor, Inc.
* Copyright 2008-2011 Freescale Semiconductor, Inc.
* Copyright 2008-2012 Freescale Semiconductor, Inc.
* Copyright 2008, 2010-2016 Freescale Semiconductor, Inc.
#ifndef COMMON_TIMING_PARAMS_H
#ifndef FSL_DDR_MAIN_H
#ifndef DDR2_DIMM_PARAMS_H
* Copyright 2014 Freescale Semiconductor, Inc.
#ifndef __FSL_DDRC_VER_H
@@ -3,7 +3,7 @@
* Copyright 2013-2014 Freescale Semiconductor, Inc.
#ifndef __FSL_IMMAP_H
#ifndef FSL_MMDC_H