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ARC: HSDK: Enable on-chip reset controller

As the driver of on-chip reset controller became available
we are ready to enable it.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev 4 年之前
父節點
當前提交
a6a0b0244b
共有 2 個文件被更改,包括 8 次插入0 次删除
  1. 7 0
      arch/arc/dts/hsdk.dts
  2. 1 0
      configs/hsdk_defconfig

+ 7 - 0
arch/arc/dts/hsdk.dts

@@ -6,6 +6,7 @@
 
 #include "skeleton.dtsi"
 #include "dt-bindings/clock/snps,hsdk-cgu.h"
+#include "dt-bindings/reset/snps,hsdk-reset.h"
 
 / {
 	model = "snps,hsdk";
@@ -62,6 +63,12 @@
 		#clock-cells = <1>;
 	};
 
+	cgu_rst: reset-controller@f00008a0 {
+		compatible = "snps,hsdk-reset";
+		#reset-cells = <1>;
+		reg = <0xf00008a0 0x4>, <0xf0000ff0 0x4>;
+	};
+
 	uart0: serial0@f0005000 {
 		compatible = "snps,dw-apb-uart";
 		reg = <0xf0005000 0x1000>;

+ 1 - 0
configs/hsdk_defconfig

@@ -47,6 +47,7 @@ CONFIG_SPI_FLASH_SST=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
+CONFIG_DM_RESET=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_ANNOUNCE=y