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@@ -2100,7 +2100,7 @@ static struct eqos_ops eqos_tegra186_ops = {
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.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_tegra186
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};
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-static const struct eqos_config eqos_tegra186_config = {
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+static const struct eqos_config __maybe_unused eqos_tegra186_config = {
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.reg_access_always_ok = false,
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.mdio_wait = 10,
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.swr_wait = 10,
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@@ -2127,7 +2127,7 @@ static struct eqos_ops eqos_stm32_ops = {
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.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_stm32
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};
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-static const struct eqos_config eqos_stm32_config = {
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+static const struct eqos_config __maybe_unused eqos_stm32_config = {
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.reg_access_always_ok = false,
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.mdio_wait = 10000,
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.swr_wait = 50,
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@@ -2154,7 +2154,7 @@ static struct eqos_ops eqos_imx_ops = {
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.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_imx
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};
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-struct eqos_config eqos_imx_config = {
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+struct eqos_config __maybe_unused eqos_imx_config = {
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.reg_access_always_ok = false,
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.mdio_wait = 10000,
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.swr_wait = 50,
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@@ -2165,18 +2165,24 @@ struct eqos_config eqos_imx_config = {
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};
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static const struct udevice_id eqos_ids[] = {
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+#if IS_ENABLED(CONFIG_DWC_ETH_QOS_TEGRA186)
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{
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.compatible = "nvidia,tegra186-eqos",
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.data = (ulong)&eqos_tegra186_config
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},
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+#endif
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+#if IS_ENABLED(CONFIG_DWC_ETH_QOS_STM32)
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{
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.compatible = "st,stm32mp1-dwmac",
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.data = (ulong)&eqos_stm32_config
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},
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+#endif
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+#if IS_ENABLED(CONFIG_DWC_ETH_QOS_IMX)
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{
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.compatible = "fsl,imx-eqos",
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.data = (ulong)&eqos_imx_config
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},
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+#endif
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{ }
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};
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