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@@ -43,7 +43,10 @@ _start:
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csrr a0, CSR_MHARTID
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#endif
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- /* save hart id and dtb pointer */
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+ /*
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+ * Save hart id and dtb pointer. The thread pointer register is not
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+ * modified by C code. It is used by secondary_hart_loop.
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+ */
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mv tp, a0
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mv s1, a1
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@@ -54,10 +57,18 @@ _start:
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*/
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mv gp, zero
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+ /*
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+ * Set the trap handler. This must happen after initializing gp because
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+ * the handler may use it.
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+ */
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la t0, trap_entry
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csrw MODE_PREFIX(tvec), t0
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- /* mask all interrupts */
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+ /*
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+ * Mask all interrupts. Interrupts are disabled globally (in m/sstatus)
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+ * for U-Boot, but we will need to read m/sip to determine if we get an
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+ * IPI
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+ */
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csrw MODE_PREFIX(ie), zero
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#if CONFIG_IS_ENABLED(SMP)
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@@ -412,6 +423,10 @@ secondary_hart_relocate:
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mv gp, a2
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#endif
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+/*
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+ * Interrupts are disabled globally, but they can still be read from m/sip. The
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+ * wfi function will wake us up if we get an IPI, even if we do not trap.
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+ */
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secondary_hart_loop:
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wfi
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