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ARM: socfpga: Enable DM RTC bootcount on ABB SECU1

Add and enable RTC-backed boot counter on ABB SECU1 platform.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Marek Vasut 4 years ago
parent
commit
8876f89640
2 changed files with 11 additions and 0 deletions
  1. 6 0
      arch/arm/dts/socfpga_arria5_secu1.dts
  2. 5 0
      configs/socfpga_secu1_defconfig

+ 6 - 0
arch/arm/dts/socfpga_arria5_secu1.dts

@@ -31,6 +31,12 @@
 		spi0 = &spi1;
 	};
 
+	bootcount@0 {
+		compatible = "u-boot,bootcount-rtc";
+		rtc = <&rtc>;
+		offset = <0x9e>;
+	};
+
 	i2c_gpio: i2c@0 {
 		compatible = "i2c-gpio";
 		#address-cells = <1>;

+ 5 - 0
configs/socfpga_secu1_defconfig

@@ -48,6 +48,9 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 # CONFIG_SPL_BLK is not set
+CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_DM_BOOTCOUNT=y
+CONFIG_DM_BOOTCOUNT_RTC=y
 CONFIG_DWAPB_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
@@ -76,6 +79,8 @@ CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_DM_RESET=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_M41T62=y
 CONFIG_SPI=y
 CONFIG_SPI_MEM=y
 CONFIG_DESIGNWARE_SPI=y