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@@ -174,17 +174,14 @@ static u32 get_ipg_per_clk(void)
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u32 pdr4 = readl(&ccm->pdr4);
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u32 div;
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if (pdr0 & MXC_CCM_PDR0_PER_SEL) {
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- div = (CCM_GET_DIVIDER(pdr4,
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- MXC_CCM_PDR4_PER0_PRDF_MASK,
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- MXC_CCM_PDR4_PER0_PODF_OFFSET) + 1) *
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- (CCM_GET_DIVIDER(pdr4,
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+ div = CCM_GET_DIVIDER(pdr4,
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MXC_CCM_PDR4_PER0_PODF_MASK,
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- MXC_CCM_PDR4_PER0_PODF_OFFSET) + 1);
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+ MXC_CCM_PDR4_PER0_PODF_OFFSET) + 1;
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} else {
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div = CCM_GET_DIVIDER(pdr0,
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MXC_CCM_PDR0_PER_PODF_MASK,
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MXC_CCM_PDR0_PER_PODF_OFFSET) + 1;
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- freq /= get_ahb_div(pdr0);
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+ div *= get_ahb_div(pdr0);
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}
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return freq / div;
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}
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@@ -202,19 +199,16 @@ u32 imx_get_uartclk(void)
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freq = decode_pll(readl(&ccm->ppctl),
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CONFIG_MX35_HCLK_FREQ);
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}
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- freq /= ((CCM_GET_DIVIDER(pdr4,
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- MXC_CCM_PDR4_UART_PRDF_MASK,
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- MXC_CCM_PDR4_UART_PRDF_OFFSET) + 1) *
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- (CCM_GET_DIVIDER(pdr4,
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+ freq /= CCM_GET_DIVIDER(pdr4,
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MXC_CCM_PDR4_UART_PODF_MASK,
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- MXC_CCM_PDR4_UART_PODF_OFFSET) + 1));
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+ MXC_CCM_PDR4_UART_PODF_OFFSET) + 1;
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return freq;
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}
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unsigned int mxc_get_main_clock(enum mxc_main_clock clk)
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{
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u32 nfc_pdf, hsp_podf;
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- u32 pll, ret_val = 0, usb_prdf, usb_podf;
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+ u32 pll, ret_val = 0, usb_podf;
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struct ccm_regs *ccm =
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(struct ccm_regs *)IMX_CCM_BASE;
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@@ -258,8 +252,7 @@ unsigned int mxc_get_main_clock(enum mxc_main_clock clk)
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ret_val = pll / (nfc_pdf + 1);
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break;
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case USB_CLK:
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- usb_prdf = (reg4 >> 25) & 0x7;
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- usb_podf = (reg4 >> 22) & 0x7;
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+ usb_podf = (reg4 >> 22) & 0x3F;
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if (reg4 & 0x200) {
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pll = get_mcu_main_clk();
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} else {
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@@ -267,7 +260,7 @@ unsigned int mxc_get_main_clock(enum mxc_main_clock clk)
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CONFIG_MX35_HCLK_FREQ);
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}
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- ret_val = pll / ((usb_prdf + 1) * (usb_podf + 1));
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+ ret_val = pll / (usb_podf + 1);
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break;
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default:
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printf("Unknown clock: %d\n", clk);
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@@ -290,11 +283,10 @@ unsigned int mxc_get_peri_clock(enum mxc_peri_clock clk)
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case UART2_BAUD:
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case UART3_BAUD:
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clk_sel = mpdr3 & (1 << 14);
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- pre_pdf = (mpdr4 >> 13) & 0x7;
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- pdf = (mpdr4 >> 10) & 0x7;
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+ pdf = (mpdr4 >> 10) & 0x3F;
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ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
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decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) /
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- ((pre_pdf + 1) * (pdf + 1));
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+ (pdf + 1);
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break;
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case SSI1_BAUD:
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pre_pdf = (mpdr2 >> 24) & 0x7;
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@@ -314,11 +306,10 @@ unsigned int mxc_get_peri_clock(enum mxc_peri_clock clk)
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break;
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case CSI_BAUD:
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clk_sel = mpdr2 & (1 << 7);
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- pre_pdf = (mpdr2 >> 16) & 0x7;
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- pdf = (mpdr2 >> 19) & 0x7;
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+ pdf = (mpdr2 >> 16) & 0x3F;
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ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
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decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) /
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- ((pre_pdf + 1) * (pdf + 1));
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+ (pdf + 1);
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break;
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case MSHC_CLK:
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pre_pdf = readl(&ccm->pdr1);
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@@ -331,27 +322,24 @@ unsigned int mxc_get_peri_clock(enum mxc_peri_clock clk)
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break;
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case ESDHC1_CLK:
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clk_sel = mpdr3 & 0x40;
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- pre_pdf = mpdr3 & 0x7;
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- pdf = (mpdr3>>3) & 0x7;
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+ pdf = mpdr3 & 0x3F;
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ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
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decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) /
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- ((pre_pdf + 1) * (pdf + 1));
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+ (pdf + 1);
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break;
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case ESDHC2_CLK:
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clk_sel = mpdr3 & 0x40;
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- pre_pdf = (mpdr3 >> 8) & 0x7;
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- pdf = (mpdr3 >> 11) & 0x7;
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+ pdf = (mpdr3 >> 8) & 0x3F;
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ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
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decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) /
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- ((pre_pdf + 1) * (pdf + 1));
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+ (pdf + 1);
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break;
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case ESDHC3_CLK:
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clk_sel = mpdr3 & 0x40;
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- pre_pdf = (mpdr3 >> 16) & 0x7;
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- pdf = (mpdr3 >> 19) & 0x7;
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+ pdf = (mpdr3 >> 16) & 0x3F;
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ret_val = ((clk_sel != 0) ? mxc_get_main_clock(CPU_CLK) :
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decode_pll(readl(&ccm->ppctl), CONFIG_MX35_HCLK_FREQ)) /
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- ((pre_pdf + 1) * (pdf + 1));
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+ (pdf + 1);
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break;
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case SPDIF_CLK:
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clk_sel = mpdr3 & 0x400000;
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