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@@ -0,0 +1,347 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * (C) Copyright 2020
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+ * Arthur Li, Cortina Access, arthur.li@cortina-access.com.
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+ */
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+
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+#include <common.h>
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+#include <i2c.h>
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+#include <log.h>
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+#include <asm/io.h>
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+#include <dm.h>
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+#include <mapmem.h>
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+#include "i2c-cortina.h"
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+
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+static void set_speed(struct i2c_regs *regs, int i2c_spd)
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+{
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+ union ca_biw_cfg i2c_cfg;
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+
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+ i2c_cfg.wrd = readl(®s->i2c_cfg);
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+ i2c_cfg.bf.core_en = 0;
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+ writel(i2c_cfg.wrd, ®s->i2c_cfg);
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+
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+ switch (i2c_spd) {
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+ case IC_SPEED_MODE_FAST_PLUS:
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+ i2c_cfg.bf.prer = CORTINA_PER_IO_FREQ /
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+ (5 * I2C_SPEED_FAST_PLUS_RATE) - 1;
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+ break;
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+
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+ case IC_SPEED_MODE_STANDARD:
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+ i2c_cfg.bf.prer = CORTINA_PER_IO_FREQ /
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+ (5 * I2C_SPEED_STANDARD_RATE) - 1;
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+ break;
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+
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+ case IC_SPEED_MODE_FAST:
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+ default:
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+ i2c_cfg.bf.prer = CORTINA_PER_IO_FREQ /
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+ (5 * I2C_SPEED_FAST_RATE) - 1;
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+ break;
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+ }
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+
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+ i2c_cfg.bf.core_en = 1;
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+ writel(i2c_cfg.wrd, ®s->i2c_cfg);
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+}
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+
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+static int ca_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
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+{
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+ struct ca_i2c *priv = dev_get_priv(bus);
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+ int i2c_spd;
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+
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+ if (speed >= I2C_SPEED_FAST_PLUS_RATE) {
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+ i2c_spd = IC_SPEED_MODE_FAST_PLUS;
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+ priv->speed = I2C_SPEED_FAST_PLUS_RATE;
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+ } else if (speed >= I2C_SPEED_FAST_RATE) {
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+ i2c_spd = IC_SPEED_MODE_FAST;
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+ priv->speed = I2C_SPEED_FAST_RATE;
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+ } else {
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+ i2c_spd = IC_SPEED_MODE_STANDARD;
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+ priv->speed = I2C_SPEED_STANDARD_RATE;
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+ }
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+
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+ set_speed(priv->regs, i2c_spd);
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+
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+ return 0;
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+}
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+
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+static int ca_i2c_get_bus_speed(struct udevice *bus)
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+{
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+ struct ca_i2c *priv = dev_get_priv(bus);
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+
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+ return priv->speed;
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+}
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+
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+static void ca_i2c_init(struct i2c_regs *regs)
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+{
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+ union ca_biw_cfg i2c_cfg;
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+
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+ i2c_cfg.wrd = readl(®s->i2c_cfg);
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+ i2c_cfg.bf.core_en = 0;
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+ i2c_cfg.bf.biw_soft_reset = 1;
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+ writel(i2c_cfg.wrd, ®s->i2c_cfg);
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+ mdelay(10);
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+ i2c_cfg.bf.biw_soft_reset = 0;
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+ writel(i2c_cfg.wrd, ®s->i2c_cfg);
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+
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+ set_speed(regs, IC_SPEED_MODE_STANDARD);
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+
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+ i2c_cfg.wrd = readl(®s->i2c_cfg);
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+ i2c_cfg.bf.core_en = 1;
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+ writel(i2c_cfg.wrd, ®s->i2c_cfg);
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+}
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+
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+static int i2c_wait_complete(struct i2c_regs *regs)
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+{
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+ union ca_biw_ctrl i2c_ctrl;
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+ unsigned long start_time_bb = get_timer(0);
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+
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+ i2c_ctrl.wrd = readl(®s->i2c_ctrl);
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+
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+ while (i2c_ctrl.bf.biwdone == 0) {
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+ i2c_ctrl.wrd = readl(®s->i2c_ctrl);
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+
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+ if (get_timer(start_time_bb) >
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+ (unsigned long)(I2C_BYTE_TO_BB)) {
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+ printf("%s not done!!!\n", __func__);
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+ return -ETIMEDOUT;
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+ }
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+ }
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+
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+ /* Clear done bit */
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+ writel(i2c_ctrl.wrd, ®s->i2c_ctrl);
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+
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+ return 0;
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+}
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+
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+static void i2c_setaddress(struct i2c_regs *regs, unsigned int i2c_addr,
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+ int write_read)
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+{
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+ writel(i2c_addr | write_read, ®s->i2c_txr);
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+
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+ writel(BIW_CTRL_START | BIW_CTRL_WRITE,
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+ ®s->i2c_ctrl);
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+
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+ i2c_wait_complete(regs);
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+}
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+
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+static int i2c_wait_for_bus_busy(struct i2c_regs *regs)
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+{
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+ union ca_biw_ack i2c_ack;
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+ unsigned long start_time_bb = get_timer(0);
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+
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+ i2c_ack.wrd = readl(®s->i2c_ack);
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+
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+ while (i2c_ack.bf.biw_busy) {
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+ i2c_ack.wrd = readl(®s->i2c_ack);
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+
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+ if (get_timer(start_time_bb) >
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+ (unsigned long)(I2C_BYTE_TO_BB)) {
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+ printf("%s: timeout!\n", __func__);
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+ return -ETIMEDOUT;
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+ }
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+ }
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+
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+ return 0;
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+}
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+
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+static int i2c_xfer_init(struct i2c_regs *regs, uint8_t chip, uint addr,
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+ int alen, int write_read)
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+{
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+ int addr_len = alen;
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+
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+ if (i2c_wait_for_bus_busy(regs))
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+ return 1;
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+
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+ /* First cycle must write addr + offset */
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+ chip = ((chip & 0x7F) << 1);
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+ if (alen == 0 && write_read == I2C_CMD_RD)
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+ i2c_setaddress(regs, chip, I2C_CMD_RD);
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+ else
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+ i2c_setaddress(regs, chip, I2C_CMD_WT);
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+
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+ while (alen) {
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+ alen--;
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+ writel(addr, ®s->i2c_txr);
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+ if (write_read == I2C_CMD_RD)
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+ writel(BIW_CTRL_WRITE | BIW_CTRL_STOP,
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+ ®s->i2c_ctrl);
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+ else
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+ writel(BIW_CTRL_WRITE, ®s->i2c_ctrl);
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+ i2c_wait_complete(regs);
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+ }
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+
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+ /* Send address again with Read flag if it's read command */
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+ if (write_read == I2C_CMD_RD && addr_len > 0)
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+ i2c_setaddress(regs, chip, I2C_CMD_RD);
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+
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+ return 0;
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+}
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+
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+static int i2c_xfer_finish(struct i2c_regs *regs)
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+{
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+ /* Dummy read makes bus free */
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+ writel(BIW_CTRL_READ | BIW_CTRL_STOP, ®s->i2c_ctrl);
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+ i2c_wait_complete(regs);
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+
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+ if (i2c_wait_for_bus_busy(regs)) {
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+ printf("Timed out waiting for bus\n");
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+ return -ETIMEDOUT;
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+ }
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+
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+ return 0;
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+}
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+
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+static int ca_i2c_read(struct i2c_regs *regs, uint8_t chip, uint addr,
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+ int alen, uint8_t *buffer, int len)
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+{
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+ unsigned long start_time_rx;
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+ int rc = 0;
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+
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+ rc = i2c_xfer_init(regs, chip, addr, alen, I2C_CMD_RD);
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+ if (rc)
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+ return rc;
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+
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+ start_time_rx = get_timer(0);
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+ while (len) {
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+ /* ACK_IN is ack value to send during read.
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+ * ack high only on the very last byte!
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+ */
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+ if (len == 1)
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+ writel(BIW_CTRL_READ | BIW_CTRL_ACK_IN | BIW_CTRL_STOP,
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+ ®s->i2c_ctrl);
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+ else
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+ writel(BIW_CTRL_READ, ®s->i2c_ctrl);
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+
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+ rc = i2c_wait_complete(regs);
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+ udelay(1);
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+
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+ if (rc == 0) {
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+ *buffer++ =
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+ (uchar) readl(®s->i2c_rxr);
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+ len--;
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+ start_time_rx = get_timer(0);
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+
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+ } else if (get_timer(start_time_rx) > I2C_BYTE_TO) {
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+ return -ETIMEDOUT;
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+ }
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+ }
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+ i2c_xfer_finish(regs);
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+ return rc;
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+}
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+
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+static int ca_i2c_write(struct i2c_regs *regs, uint8_t chip, uint addr,
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+ int alen, uint8_t *buffer, int len)
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+{
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+ int rc, nb = len;
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+ unsigned long start_time_tx;
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+
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+ rc = i2c_xfer_init(regs, chip, addr, alen, I2C_CMD_WT);
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+ if (rc)
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+ return rc;
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+
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+ start_time_tx = get_timer(0);
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+ while (len) {
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+ writel(*buffer, ®s->i2c_txr);
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+ if (len == 1)
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+ writel(BIW_CTRL_WRITE | BIW_CTRL_STOP,
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+ ®s->i2c_ctrl);
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+ else
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+ writel(BIW_CTRL_WRITE, ®s->i2c_ctrl);
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+
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+ rc = i2c_wait_complete(regs);
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+
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+ if (rc == 0) {
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+ len--;
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+ buffer++;
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+ start_time_tx = get_timer(0);
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+ } else if (get_timer(start_time_tx) > (nb * I2C_BYTE_TO)) {
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+ return -ETIMEDOUT;
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+ }
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+ }
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+
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+ return 0;
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+}
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+
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+static int ca_i2c_probe_chip(struct udevice *bus, uint chip_addr,
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+ uint chip_flags)
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+{
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+ struct ca_i2c *priv = dev_get_priv(bus);
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+ int ret;
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+ u32 tmp;
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+
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+ /* Try to read the first location of the chip */
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+ ret = ca_i2c_read(priv->regs, chip_addr, 0, 1, (uchar *)&tmp, 1);
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+ if (ret)
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+ ca_i2c_init(priv->regs);
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+
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+ return ret;
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+}
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+
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+static int ca_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
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+{
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+ struct ca_i2c *priv = dev_get_priv(bus);
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+ int ret;
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+
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+ debug("i2c_xfer: %d messages\n", nmsgs);
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+ for (; nmsgs > 0; nmsgs--, msg++) {
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+ debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
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+ if (msg->flags & I2C_M_RD)
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+ ret = ca_i2c_read(priv->regs, msg->addr, 0, 0,
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+ msg->buf, msg->len);
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+ else
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+ ret = ca_i2c_write(priv->regs, msg->addr, 0, 0,
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+ msg->buf, msg->len);
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+
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+ if (ret) {
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+ printf("i2c_xfer: %s error\n",
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+ msg->flags & I2C_M_RD ? "read" : "write");
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+ return ret;
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+ }
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+ }
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+
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+ return 0;
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+}
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+
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+static const struct dm_i2c_ops ca_i2c_ops = {
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+ .xfer = ca_i2c_xfer,
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+ .probe_chip = ca_i2c_probe_chip,
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+ .set_bus_speed = ca_i2c_set_bus_speed,
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+ .get_bus_speed = ca_i2c_get_bus_speed,
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+};
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+
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+static const struct udevice_id ca_i2c_ids[] = {
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+ { .compatible = "cortina,ca-i2c", },
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+ { }
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+};
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+
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+static int ca_i2c_probe(struct udevice *bus)
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+{
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+ struct ca_i2c *priv = dev_get_priv(bus);
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+
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+ ca_i2c_init(priv->regs);
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+
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+ return 0;
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+}
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+
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+static int ca_i2c_ofdata_to_platdata(struct udevice *bus)
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+{
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+ struct ca_i2c *priv = dev_get_priv(bus);
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+
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+ priv->regs = map_sysmem(dev_read_addr(bus), sizeof(struct i2c_regs));
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+ if (!priv->regs) {
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+ printf("I2C: base address is invalid\n");
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+ return -EINVAL;
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+ }
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+
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+ return 0;
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+}
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+
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+U_BOOT_DRIVER(i2c_cortina) = {
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+ .name = "i2c_cortina",
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+ .id = UCLASS_I2C,
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+ .of_match = ca_i2c_ids,
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+ .ofdata_to_platdata = ca_i2c_ofdata_to_platdata,
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+ .probe = ca_i2c_probe,
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+ .priv_auto_alloc_size = sizeof(struct ca_i2c),
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+ .ops = &ca_i2c_ops,
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+ .flags = DM_FLAG_PRE_RELOC,
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+};
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