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@@ -375,3 +375,25 @@ void enable_caches(void)
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mmu_set_region_dcache_behaviour(IRAM_BASE_ADDR, IRAM_SIZE, option);
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}
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#endif
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+
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+#ifdef CONFIG_SYS_I2C_MXC
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+/* i2c_num can be from 0 - 3 */
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+int enable_i2c_clk(unsigned char enable, unsigned int i2c_num)
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+{
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+ struct ccm_reg *ccm = (struct ccm_reg *)CCM_BASE_ADDR;
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+
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+ switch (i2c_num) {
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+ case 0:
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+ clrsetbits_le32(&ccm->ccgr4, CCM_CCGR4_I2C0_CTRL_MASK,
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+ CCM_CCGR4_I2C0_CTRL_MASK);
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+ case 2:
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+ clrsetbits_le32(&ccm->ccgr10, CCM_CCGR10_I2C2_CTRL_MASK,
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+ CCM_CCGR10_I2C2_CTRL_MASK);
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+ break;
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+ default:
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+ return -EINVAL;
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+ }
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+
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+ return 0;
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+}
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+#endif
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