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@@ -162,7 +162,7 @@
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};
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};
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- ethernet0_rgmii_pins_b: rgmii-1 {
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+ ethernet0_rgmii_pins_c: rgmii-2 {
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pins1 {
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pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
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<STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
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@@ -193,7 +193,7 @@
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};
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};
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- ethernet0_rgmii_pins_sleep_b: rgmii-sleep-1 {
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+ ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
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pins1 {
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pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
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<STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
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