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@@ -1,43 +1,36 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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- * Copyright 2015 Toradex, Inc.
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+ * Copyright 2015-2019 Toradex, Inc.
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*
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* Based on vf610twr.c:
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* Copyright 2013 Freescale Semiconductor, Inc.
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*/
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#include <common.h>
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-#include <asm/io.h>
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+
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+#include <asm/arch/clock.h>
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+#include <asm/arch/crm_regs.h>
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+#include <asm/arch/ddrmc-vf610.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux-vf610.h>
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-#include <asm/arch/ddrmc-vf610.h>
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-#include <asm/arch/crm_regs.h>
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-#include <asm/arch/clock.h>
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-#include <mmc.h>
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+#include <asm/gpio.h>
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+#include <asm/io.h>
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#include <fdt_support.h>
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#include <fsl_esdhc.h>
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#include <fsl_dcu_fb.h>
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+#include <g_dnl.h>
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+#include <i2c.h>
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#include <jffs2/load_kernel.h>
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#include <miiphy.h>
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+#include <mmc.h>
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#include <mtd_node.h>
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#include <netdev.h>
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-#include <i2c.h>
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-#include <g_dnl.h>
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-#include <asm/gpio.h>
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#include <usb.h>
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+
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#include "../common/tdx-common.h"
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DECLARE_GLOBAL_DATA_PTR;
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-#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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- PAD_CTL_DSE_25ohm | PAD_CTL_OBE_IBE_ENABLE)
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-
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-#define ESDHC_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH | \
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- PAD_CTL_DSE_20ohm | PAD_CTL_OBE_IBE_ENABLE)
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-
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-#define ENET_PAD_CTRL (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \
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- PAD_CTL_DSE_50ohm | PAD_CTL_OBE_IBE_ENABLE)
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-
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#define USB_PEN_GPIO 83
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#define USB_CDET_GPIO 102
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#define PTC0_GPIO_45 45
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@@ -89,11 +82,6 @@ static struct ddrmc_cr_setting colibri_vf_cr_settings[] = {
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{ 0, -1 }
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};
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-static const iomux_v3_cfg_t usb_pads[] = {
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- VF610_PAD_PTD4__GPIO_83,
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- VF610_PAD_PTC29__GPIO_102,
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-};
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-
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int dram_init(void)
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{
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static const struct ddr3_jedec_timings timings = {
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@@ -147,92 +135,12 @@ int dram_init(void)
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.wldqsen = 25,
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};
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- ddrmc_setup_iomux(NULL, 0);
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-
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ddrmc_ctrl_init_ddr3(&timings, colibri_vf_cr_settings, NULL, 1, 2);
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gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
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return 0;
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}
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-static void setup_iomux_uart(void)
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-{
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- static const iomux_v3_cfg_t uart_pads[] = {
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- NEW_PAD_CTRL(VF610_PAD_PTB4__UART1_TX, UART_PAD_CTRL),
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- NEW_PAD_CTRL(VF610_PAD_PTB5__UART1_RX, UART_PAD_CTRL),
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- NEW_PAD_CTRL(VF610_PAD_PTB10__UART0_TX, UART_PAD_CTRL),
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- NEW_PAD_CTRL(VF610_PAD_PTB11__UART0_RX, UART_PAD_CTRL),
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- };
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-
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- imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
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-}
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-
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-static void setup_iomux_enet(void)
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-{
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- static const iomux_v3_cfg_t enet0_pads[] = {
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- NEW_PAD_CTRL(VF610_PAD_PTA6__RMII0_CLKOUT, ENET_PAD_CTRL),
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- NEW_PAD_CTRL(VF610_PAD_PTC10__RMII1_MDIO, ENET_PAD_CTRL),
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- NEW_PAD_CTRL(VF610_PAD_PTC9__RMII1_MDC, ENET_PAD_CTRL),
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- NEW_PAD_CTRL(VF610_PAD_PTC11__RMII1_CRS_DV, ENET_PAD_CTRL),
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- NEW_PAD_CTRL(VF610_PAD_PTC12__RMII1_RD1, ENET_PAD_CTRL),
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- NEW_PAD_CTRL(VF610_PAD_PTC13__RMII1_RD0, ENET_PAD_CTRL),
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- NEW_PAD_CTRL(VF610_PAD_PTC14__RMII1_RXER, ENET_PAD_CTRL),
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- NEW_PAD_CTRL(VF610_PAD_PTC15__RMII1_TD1, ENET_PAD_CTRL),
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- NEW_PAD_CTRL(VF610_PAD_PTC16__RMII1_TD0, ENET_PAD_CTRL),
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- NEW_PAD_CTRL(VF610_PAD_PTC17__RMII1_TXEN, ENET_PAD_CTRL),
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- };
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-
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- imx_iomux_v3_setup_multiple_pads(enet0_pads, ARRAY_SIZE(enet0_pads));
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-}
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-
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-static void setup_iomux_i2c(void)
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-{
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- static const iomux_v3_cfg_t i2c0_pads[] = {
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- VF610_PAD_PTB14__I2C0_SCL,
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- VF610_PAD_PTB15__I2C0_SDA,
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- };
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-
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- imx_iomux_v3_setup_multiple_pads(i2c0_pads, ARRAY_SIZE(i2c0_pads));
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-}
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-
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-#ifdef CONFIG_NAND_VF610_NFC
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-static void setup_iomux_nfc(void)
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-{
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- static const iomux_v3_cfg_t nfc_pads[] = {
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- VF610_PAD_PTD23__NF_IO7,
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- VF610_PAD_PTD22__NF_IO6,
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- VF610_PAD_PTD21__NF_IO5,
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- VF610_PAD_PTD20__NF_IO4,
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- VF610_PAD_PTD19__NF_IO3,
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- VF610_PAD_PTD18__NF_IO2,
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- VF610_PAD_PTD17__NF_IO1,
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- VF610_PAD_PTD16__NF_IO0,
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- VF610_PAD_PTB24__NF_WE_B,
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- VF610_PAD_PTB25__NF_CE0_B,
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- VF610_PAD_PTB27__NF_RE_B,
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- VF610_PAD_PTC26__NF_RB_B,
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- VF610_PAD_PTC27__NF_ALE,
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- VF610_PAD_PTC28__NF_CLE
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- };
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-
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- imx_iomux_v3_setup_multiple_pads(nfc_pads, ARRAY_SIZE(nfc_pads));
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-}
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-#endif
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-
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-#ifdef CONFIG_FSL_DSPI
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-static void setup_iomux_dspi(void)
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-{
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- static const iomux_v3_cfg_t dspi1_pads[] = {
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- VF610_PAD_PTD5__DSPI1_CS0,
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- VF610_PAD_PTD6__DSPI1_SIN,
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- VF610_PAD_PTD7__DSPI1_SOUT,
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- VF610_PAD_PTD8__DSPI1_SCK,
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- };
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-
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- imx_iomux_v3_setup_multiple_pads(dspi1_pads, ARRAY_SIZE(dspi1_pads));
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-}
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-#endif
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-
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#ifdef CONFIG_VYBRID_GPIO
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static void setup_iomux_gpio(void)
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{
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@@ -344,20 +252,8 @@ int board_mmc_getcd(struct mmc *mmc)
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int board_mmc_init(bd_t *bis)
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{
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- static const iomux_v3_cfg_t esdhc1_pads[] = {
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- NEW_PAD_CTRL(VF610_PAD_PTA24__ESDHC1_CLK, ESDHC_PAD_CTRL),
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- NEW_PAD_CTRL(VF610_PAD_PTA25__ESDHC1_CMD, ESDHC_PAD_CTRL),
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- NEW_PAD_CTRL(VF610_PAD_PTA26__ESDHC1_DAT0, ESDHC_PAD_CTRL),
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- NEW_PAD_CTRL(VF610_PAD_PTA27__ESDHC1_DAT1, ESDHC_PAD_CTRL),
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- NEW_PAD_CTRL(VF610_PAD_PTA28__ESDHC1_DAT2, ESDHC_PAD_CTRL),
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- NEW_PAD_CTRL(VF610_PAD_PTA29__ESDHC1_DAT3, ESDHC_PAD_CTRL),
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- };
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-
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esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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- imx_iomux_v3_setup_multiple_pads(
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- esdhc1_pads, ARRAY_SIZE(esdhc1_pads));
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-
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return fsl_esdhc_initialize(bis, &esdhc_cfg[0]);
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}
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#endif
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@@ -496,21 +392,10 @@ int board_early_init_f(void)
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clock_init();
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mscm_init();
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- setup_iomux_uart();
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- setup_iomux_enet();
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- setup_iomux_i2c();
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-#ifdef CONFIG_NAND_VF610_NFC
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- setup_iomux_nfc();
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-#endif
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-
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#ifdef CONFIG_VYBRID_GPIO
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setup_iomux_gpio();
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#endif
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-#ifdef CONFIG_FSL_DSPI
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- setup_iomux_dspi();
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-#endif
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-
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#ifdef CONFIG_VIDEO_FSL_DCU_FB
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setup_tcon();
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setup_iomux_fsl_dcu();
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@@ -594,8 +479,6 @@ int ft_board_setup(void *blob, bd_t *bd)
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#ifdef CONFIG_USB_EHCI_VF
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int board_ehci_hcd_init(int port)
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{
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- imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads));
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-
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switch (port) {
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case 0:
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/* USBC does not have PEN, also configured as USB client only */
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