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@@ -1,9 +1,9 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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- * Copyright (C) 2015 Marek Vasut <marex@denx.de>
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+ * Copyright (C) 2015-2019 Marek Vasut <marex@denx.de>
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*/
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-#ifndef __CONFIG_SAMTEC_VINING_FPGA_H__
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-#define __CONFIG_SAMTEC_VINING_FPGA_H__
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+#ifndef __CONFIG_SOFTING_VINING_FPGA_H__
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+#define __CONFIG_SOFTING_VINING_FPGA_H__
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#include <asm/arch/base_addr_ac5.h>
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@@ -11,8 +11,9 @@
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#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */
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/* Booting Linux */
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-#define CONFIG_BOOTFILE "openwrt-socfpga-socfpga_cyclone5_vining_fpga-fit-uImage.itb"
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+#define CONFIG_BOOTFILE "fitImage"
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#define CONFIG_BOOTCOMMAND "run selboot"
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+#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MiB */
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#define CONFIG_LOADADDR 0x01000000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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@@ -30,8 +31,11 @@
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* B: GPIO 78 ... the button between USB A ports
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*
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* The logic:
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- * if button B is not pressed, boot normal Linux system immediatelly
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- * if button B is pressed, wait $bootdelay and boot recovery system
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+ * if button B is pressed, boot recovery system after 10 seconds
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+ * if force_boottype is set, boot system depending on the value in the
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+ * $force_boottype variable after 1 second
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+ * if button B is not pressed and force_boottype is not set, boot normal
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+ * Linux system after 5 seconds
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*/
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#define CONFIG_EXTRA_ENV_SETTINGS \
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@@ -41,21 +45,36 @@
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"bootscript=boot.scr\0" \
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"ubimtdnr=5\0" \
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"ubimtd=rootfs\0" \
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- "ubipart=ubi0:rootfs\0" \
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+ "ubipart=ubi0:vining-fpga-rootfs\0" \
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"ubisfcs=1\0" /* Default is flash at CS#1 */ \
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"netdev=eth0\0" \
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- "hostname=vining_fpga\0" \
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+ "hostname=vining_fpga\0" \
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"kernel_addr_r=0x10000000\0" \
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- "mtdparts_0=ff705000.spi.0:" \
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+ "fdt_addr_r=0x20000000\0" \
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+ "fdt_high=0xffffffff\0" \
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+ "initrd_high=0xffffffff\0" \
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+ "dfu_alt_info=qspi0 sf 0:0;qspi1 sf 0:1\0" \
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+ "mtdparts_0_16m=ff705000.spi.0:" /* 16MiB+128MiB SF config */ \
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"1m(u-boot)," \
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"64k(env1)," \
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"64k(env2)," \
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- "256k(samtec1)," \
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- "256k(samtec2)," \
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+ "256k(softing1)," \
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+ "256k(softing2)," \
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"-(rcvrfs)\0" /* Recovery */ \
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- "mtdparts_1=ff705000.spi.1:" \
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- "32m(rootfs)," \
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+ "mtdparts_0_256m=ff705000.spi.0:" /* 256MiB(+256MiB) config */ \
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+ "1m(u-boot)," \
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+ "64k(env1)," \
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+ "64k(env2)," \
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+ "256k(softing1)," \
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+ "256k(softing2)," \
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+ "14720k(rcvrfs)," /* Recovery */ \
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+ "64m(rootfs)," /* Root */ \
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+ "-(userfs)\0" /* User */ \
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+ "mtdparts_1_128m=ff705000.spi.1:" /* 16MiB+128MiB SF config */ \
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+ "64m(rootfs)," \
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"-(userfs)\0" \
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+ "mtdparts_1_256m=ff705000.spi.1:" /* 256MiB+256MiB SF config */ \
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+ "-(userfs2)\0" \
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"update_filename=u-boot-with-spl-dtb.sfp\0" \
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"update_qspi_offset=0x0\0" \
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"update_qspi=" /* Update the QSPI firmware */ \
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@@ -64,6 +83,23 @@
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"sf update ${loadaddr} ${update_qspi_offset} ${filesize} ; " \
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"fi ; " \
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"fi\0" \
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+ "sf_identify=" \
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+ "setenv sf_size_0 ; setenv sf_size_1 ; " \
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+ "sf probe 0:0 && setenv sf_size_0 ${sf_size} ; " \
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+ "sf probe 0:1 && setenv sf_size_1 ${sf_size} ; " \
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+ "if test -z \"${sf_size_1}\" ; then " \
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+ /* 1x256MiB SF */ \
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+ "setenv mtdparts_0 ${mtdparts_0_256m} ; " \
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+ "setenv mtdparts_1 ; " \
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+ "elif test \"${sf_size_0}\" = \"1000000\" ; then " \
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+ /* 16MiB+128MiB SF */ \
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+ "setenv mtdparts_0 ${mtdparts_0_16m} ; " \
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+ "setenv mtdparts_1 ${mtdparts_1_128m} ; " \
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+ "else " \
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+ /* 256MiB+256MiB SF */ \
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+ "setenv mtdparts_0 ${mtdparts_0_256m} ; " \
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+ "setenv mtdparts_1 ${mtdparts_1_256m} ; " \
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+ "fi\0" \
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"fpga_filename=output_file.rbf\0" \
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"load_fpga=" /* Load FPGA bitstream */ \
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"if tftp ${fpga_filename} ; then " \
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@@ -80,7 +116,11 @@
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"addmisc=" \
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"setenv bootargs ${bootargs} ${miscargs}\0" \
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"addmtd=" \
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- "setenv mtdparts \"${mtdparts_0};${mtdparts_1}\" ; " \
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+ "if test -z \"${sf_size_1}\" ; then " \
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+ "setenv mtdparts \"${mtdparts_0}\" ; " \
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+ "else " \
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+ "setenv mtdparts \"${mtdparts_0};${mtdparts_1}\" ; " \
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+ "fi ; " \
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"setenv bootargs ${bootargs} mtdparts=${mtdparts}\0" \
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"addargs=run addcons addmtd addmisc\0" \
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"ubiload=" \
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@@ -102,29 +142,47 @@
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"setenv ubimtdnr 5 ; " \
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"setenv mtdparts mtdparts=${mtdparts_0} ; " \
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"setenv mtdids nor0=ff705000.spi.0 ; " \
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- "setenv ubipart ubi0:rootfs ; " \
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+ "setenv ubipart ubi0:vining-fpga-rootfs ; " \
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"else " \
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- "setenv ubisfcs 1 ; " \
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- "setenv ubimtd rootfs ; " \
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- "setenv ubimtdnr 6 ; " \
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- "setenv mtdparts mtdparts=${mtdparts_1} ; " \
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- "setenv mtdids nor0=ff705000.spi.1 ; " \
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- "setenv ubipart ubi0:rootfs ; " \
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+ "if test \"${sf_size_0}\" = \"1000000\" ; then "\
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+ /* 16MiB+128MiB SF */ \
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+ "setenv ubisfcs 1 ; " \
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+ "setenv ubimtd rootfs ; " \
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+ "setenv ubimtdnr 6 ; " \
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+ "setenv mtdparts mtdparts=${mtdparts_1} ; " \
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+ "setenv mtdids nor0=ff705000.spi.1 ; " \
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+ "setenv ubipart ubi0:vining-fpga-rootfs ; " \
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+ "else " \
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+ /* 256MiB(+256MiB) SF */ \
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+ "setenv ubisfcs 0 ; " \
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+ "setenv ubimtd rootfs ; " \
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+ "setenv ubimtdnr 6 ; " \
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+ "setenv mtdparts mtdparts=${mtdparts_0} ; " \
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+ "setenv mtdids nor0=ff705000.spi.0 ; " \
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+ "setenv ubipart ubi0:vining-fpga-rootfs ; " \
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+ "fi ; " \
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"fi ; " \
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"sf probe 0:${ubisfcs}\0" \
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+ "boot_kernel=" \
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+ "if test -z \"${sf_size_1}\" ; then " /* 1x256MiB SF */ \
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+ "imxtract ${kernel_addr_r} fdt@1 ${fdt_addr_r} && " \
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+ "fdt addr ${fdt_addr_r} && " \
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+ "fdt resize && " \
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+ "fdt set /soc/spi@ff705000/n25q00@1 status disabled && " \
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+ "bootm ${kernel_addr_r}:kernel@1 - ${fdt_addr_r} ; " \
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+ "else " \
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+ "bootm ${kernel_addr_r} ; " \
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+ "fi\0" \
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"ubi_ubi=" \
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- "run ubi_sfsel ubiload ubiargs addargs ; " \
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- "bootm ${kernel_addr_r}\0" \
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+ "run ubi_sfsel ubiload ubiargs addargs boot_kernel\0" \
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"ubi_nfs=" \
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- "run ubiload nfsargs addip addargs ; " \
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- "bootm ${kernel_addr_r}\0" \
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+ "run ubiload nfsargs addip addargs boot_kernel\0" \
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"net_ubi=" \
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- "run netload ubiargs addargs ; " \
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- "bootm ${kernel_addr_r}\0" \
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+ "run netload ubiargs addargs boot_kernel\0" \
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"net_nfs=" \
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- "run netload nfsargs addip addargs ; " \
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- "bootm ${kernel_addr_r}\0" \
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+ "run netload nfsargs addip addargs boot_kernel\0" \
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"selboot=" /* Select from where to boot. */ \
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+ "run sf_identify ; " \
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"if test \"${bootmode}\" = \"qspi\" ; then " \
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"led all off ; " \
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"if test \"${boottype}\" = \"rcvr\" ; then " \
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@@ -150,4 +208,4 @@
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/* The rest of the configuration is shared */
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#include <configs/socfpga_common.h>
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-#endif /* __CONFIG_SAMTEC_VINING_FPGA_H__ */
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+#endif /* __CONFIG_SOFTING_VINING_FPGA_H__ */
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