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@@ -336,6 +336,34 @@ static void dwc3_cache_hwparams(struct dwc3 *dwc)
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parms->hwparams8 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS8);
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}
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+static void dwc3_hsphy_mode_setup(struct dwc3 *dwc)
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+{
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+ enum usb_phy_interface hsphy_mode = dwc->hsphy_mode;
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+ u32 reg;
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+
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+ /* Set dwc3 usb2 phy config */
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+ reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
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+
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+ switch (hsphy_mode) {
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+ case USBPHY_INTERFACE_MODE_UTMI:
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+ reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
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+ DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
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+ reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_8_BIT) |
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+ DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_8_BIT);
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+ break;
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+ case USBPHY_INTERFACE_MODE_UTMIW:
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+ reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
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+ DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
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+ reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_16_BIT) |
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+ DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_16_BIT);
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+ break;
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+ default:
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+ break;
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+ }
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+
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+ dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
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+}
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+
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/**
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* dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core
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* @dwc: Pointer to our controller context structure
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@@ -384,6 +412,8 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
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dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
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+ dwc3_hsphy_mode_setup(dwc);
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+
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mdelay(100);
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reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
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@@ -628,35 +658,6 @@ static void dwc3_core_exit_mode(struct dwc3 *dwc)
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dwc3_gadget_run(dwc);
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}
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-static void dwc3_uboot_hsphy_mode(struct dwc3_device *dwc3_dev,
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- struct dwc3 *dwc)
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-{
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- enum usb_phy_interface hsphy_mode = dwc3_dev->hsphy_mode;
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- u32 reg;
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-
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- /* Set dwc3 usb2 phy config */
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- reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
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-
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- switch (hsphy_mode) {
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- case USBPHY_INTERFACE_MODE_UTMI:
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- reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
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- DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
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- reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_8_BIT) |
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- DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_8_BIT);
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- break;
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- case USBPHY_INTERFACE_MODE_UTMIW:
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- reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
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- DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
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- reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_16_BIT) |
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- DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_16_BIT);
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- break;
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- default:
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- break;
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- }
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-
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- dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
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-}
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-
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#define DWC3_ALIGN_MASK (16 - 1)
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/**
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@@ -745,6 +746,8 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
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dwc->hird_threshold = hird_threshold
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| (dwc->is_utmi_l1_suspend << 4);
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+ dwc->hsphy_mode = dwc3_dev->hsphy_mode;
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+
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dwc->index = dwc3_dev->index;
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dwc3_cache_hwparams(dwc);
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@@ -769,8 +772,6 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
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goto err0;
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}
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- dwc3_uboot_hsphy_mode(dwc3_dev, dwc);
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-
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ret = dwc3_event_buffers_setup(dwc);
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if (ret) {
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dev_err(dwc->dev, "failed to setup event buffers\n");
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@@ -903,6 +904,8 @@ void dwc3_of_parse(struct dwc3 *dwc)
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*/
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hird_threshold = 12;
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+ dwc->hsphy_mode = usb_get_phy_mode(dev->node);
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+
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dwc->has_lpm_erratum = dev_read_bool(dev,
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"snps,has-lpm-erratum");
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tmp = dev_read_u8_array_ptr(dev, "snps,lpm-nyet-threshold", 1);
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