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@@ -1077,7 +1077,7 @@ unsigned int populate_memctl_options(const common_timing_params_t *common_dimm,
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* if CONFIG_SYS_FSL_DDR_INTLV_256B is defined, mandatory interleaving
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* with 256 Byte is enabled.
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*/
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-#if (CONFIG_NUM_DDR_CONTROLLERS > 1)
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+#if (CONFIG_SYS_NUM_DDR_CTLRS > 1)
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if (!hwconfig_sub_f("fsl_ddr", "ctlr_intlv", buf))
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#ifdef CONFIG_SYS_FSL_DDR_INTLV_256B
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;
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@@ -1107,39 +1107,39 @@ unsigned int populate_memctl_options(const common_timing_params_t *common_dimm,
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"ctlr_intlv",
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"cacheline", buf)) {
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popts->memctl_interleaving_mode =
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- ((CONFIG_NUM_DDR_CONTROLLERS == 3) && ctrl_num == 2) ?
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+ ((CONFIG_SYS_NUM_DDR_CTLRS == 3) && ctrl_num == 2) ?
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0 : FSL_DDR_CACHE_LINE_INTERLEAVING;
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popts->memctl_interleaving =
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- ((CONFIG_NUM_DDR_CONTROLLERS == 3) && ctrl_num == 2) ?
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+ ((CONFIG_SYS_NUM_DDR_CTLRS == 3) && ctrl_num == 2) ?
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0 : 1;
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} else if (hwconfig_subarg_cmp_f("fsl_ddr",
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"ctlr_intlv",
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"page", buf)) {
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popts->memctl_interleaving_mode =
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- ((CONFIG_NUM_DDR_CONTROLLERS == 3) && ctrl_num == 2) ?
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+ ((CONFIG_SYS_NUM_DDR_CTLRS == 3) && ctrl_num == 2) ?
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0 : FSL_DDR_PAGE_INTERLEAVING;
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popts->memctl_interleaving =
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- ((CONFIG_NUM_DDR_CONTROLLERS == 3) && ctrl_num == 2) ?
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+ ((CONFIG_SYS_NUM_DDR_CTLRS == 3) && ctrl_num == 2) ?
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0 : 1;
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} else if (hwconfig_subarg_cmp_f("fsl_ddr",
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"ctlr_intlv",
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"bank", buf)) {
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popts->memctl_interleaving_mode =
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- ((CONFIG_NUM_DDR_CONTROLLERS == 3) && ctrl_num == 2) ?
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+ ((CONFIG_SYS_NUM_DDR_CTLRS == 3) && ctrl_num == 2) ?
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0 : FSL_DDR_BANK_INTERLEAVING;
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popts->memctl_interleaving =
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- ((CONFIG_NUM_DDR_CONTROLLERS == 3) && ctrl_num == 2) ?
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+ ((CONFIG_SYS_NUM_DDR_CTLRS == 3) && ctrl_num == 2) ?
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0 : 1;
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} else if (hwconfig_subarg_cmp_f("fsl_ddr",
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"ctlr_intlv",
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"superbank", buf)) {
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popts->memctl_interleaving_mode =
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- ((CONFIG_NUM_DDR_CONTROLLERS == 3) && ctrl_num == 2) ?
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+ ((CONFIG_SYS_NUM_DDR_CTLRS == 3) && ctrl_num == 2) ?
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0 : FSL_DDR_SUPERBANK_INTERLEAVING;
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popts->memctl_interleaving =
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- ((CONFIG_NUM_DDR_CONTROLLERS == 3) && ctrl_num == 2) ?
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+ ((CONFIG_SYS_NUM_DDR_CTLRS == 3) && ctrl_num == 2) ?
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0 : 1;
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-#if (CONFIG_NUM_DDR_CONTROLLERS == 3)
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+#if (CONFIG_SYS_NUM_DDR_CTLRS == 3)
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} else if (hwconfig_subarg_cmp_f("fsl_ddr",
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"ctlr_intlv",
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"3way_1KB", buf)) {
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@@ -1155,7 +1155,7 @@ unsigned int populate_memctl_options(const common_timing_params_t *common_dimm,
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"3way_8KB", buf)) {
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popts->memctl_interleaving_mode =
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FSL_DDR_3WAY_8KB_INTERLEAVING;
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-#elif (CONFIG_NUM_DDR_CONTROLLERS == 4)
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+#elif (CONFIG_SYS_NUM_DDR_CTLRS == 4)
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} else if (hwconfig_subarg_cmp_f("fsl_ddr",
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"ctlr_intlv",
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"4way_1KB", buf)) {
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@@ -1178,7 +1178,7 @@ unsigned int populate_memctl_options(const common_timing_params_t *common_dimm,
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}
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#endif /* CONFIG_SYS_FSL_DDR_INTLV_256B */
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done:
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-#endif /* CONFIG_NUM_DDR_CONTROLLERS > 1 */
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+#endif /* CONFIG_SYS_NUM_DDR_CTLRS > 1 */
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if ((hwconfig_sub_f("fsl_ddr", "bank_intlv", buf)) &&
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(CONFIG_CHIP_SELECTS_PER_CTRL > 1)) {
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/* test null first. if CONFIG_HWCONFIG is not defined,
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@@ -1356,10 +1356,10 @@ void check_interleaving_options(fsl_ddr_info_t *pinfo)
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case FSL_DDR_PAGE_INTERLEAVING:
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case FSL_DDR_BANK_INTERLEAVING:
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case FSL_DDR_SUPERBANK_INTERLEAVING:
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-#if (3 == CONFIG_NUM_DDR_CONTROLLERS)
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+#if (3 == CONFIG_SYS_NUM_DDR_CTLRS)
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k = 2;
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#else
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- k = CONFIG_NUM_DDR_CONTROLLERS;
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+ k = CONFIG_SYS_NUM_DDR_CTLRS;
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#endif
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break;
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case FSL_DDR_3WAY_1KB_INTERLEAVING:
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@@ -1369,7 +1369,7 @@ void check_interleaving_options(fsl_ddr_info_t *pinfo)
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case FSL_DDR_4WAY_4KB_INTERLEAVING:
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case FSL_DDR_4WAY_8KB_INTERLEAVING:
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default:
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- k = CONFIG_NUM_DDR_CONTROLLERS;
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+ k = CONFIG_SYS_NUM_DDR_CTLRS;
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break;
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}
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debug("%d of %d controllers are interleaving.\n", j, k);
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