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@@ -48,7 +48,6 @@
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#clock-cells = <0>;
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/* This value must be overridden by the board */
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clock-frequency = <0>;
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- u-boot,dm-pre-reloc;
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};
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extalr_clk: extalr {
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@@ -56,7 +55,6 @@
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#clock-cells = <0>;
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/* This value must be overridden by the board */
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clock-frequency = <0>;
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- u-boot,dm-pre-reloc;
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};
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/* External SCIF clock - to be overridden by boards that provide it */
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@@ -73,7 +71,6 @@
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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- u-boot,dm-pre-reloc;
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gic: interrupt-controller@f1010000 {
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compatible = "arm,gic-400";
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@@ -112,7 +109,6 @@
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#clock-cells = <2>;
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#power-domain-cells = <0>;
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#reset-cells = <1>;
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- u-boot,dm-pre-reloc;
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};
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rst: reset-controller@e6160000 {
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@@ -150,7 +146,6 @@
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prr: chipid@fff00044 {
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compatible = "renesas,prr";
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reg = <0 0xfff00044 0 4>;
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- u-boot,dm-pre-reloc;
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};
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dmac1: dma-controller@e7300000 {
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