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@@ -1,303 +0,0 @@
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-/*
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- * Copyright (c) 2004 Picture Elements, Inc.
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- * Stephen Williams (XXXXXXXXXXXXXXXX)
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- *
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- * SPDX-License-Identifier: GPL-2.0+
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- */
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-
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-/*
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- * The Xilinx SystemACE chip support is activated by defining
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- * CONFIG_SYSTEMACE to turn on support, and CONFIG_SYS_SYSTEMACE_BASE
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- * to set the base address of the device. This code currently
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- * assumes that the chip is connected via a byte-wide bus.
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- *
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- * The CONFIG_SYSTEMACE also adds to fat support the device class
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- * "ace" that allows the user to execute "fatls ace 0" and the
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- * like. This works by making the systemace_get_dev function
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- * available to cmd_fat.c:get_dev and filling in a block device
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- * description that has all the bits needed for FAT support to
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- * read sectors.
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- *
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- * According to Xilinx technical support, before accessing the
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- * SystemACE CF you need to set the following control bits:
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- * FORCECFGMODE : 1
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- * CFGMODE : 0
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- * CFGSTART : 0
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- */
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-
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-#include <common.h>
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-#include <command.h>
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-#include <dm.h>
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-#include <part.h>
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-#include <asm/io.h>
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-
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-/*
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- * The ace_readw and writew functions read/write 16bit words, but the
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- * offset value is the BYTE offset as most used in the Xilinx
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- * datasheet for the SystemACE chip. The CONFIG_SYS_SYSTEMACE_BASE is defined
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- * to be the base address for the chip, usually in the local
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- * peripheral bus.
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- */
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-
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-static u32 base = CONFIG_SYS_SYSTEMACE_BASE;
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-static u32 width = CONFIG_SYS_SYSTEMACE_WIDTH;
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-
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-static void ace_writew(u16 val, unsigned off)
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-{
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- if (width == 8) {
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-#if !defined(__BIG_ENDIAN)
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- writeb(val >> 8, base + off);
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- writeb(val, base + off + 1);
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-#else
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- writeb(val, base + off);
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- writeb(val >> 8, base + off + 1);
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-#endif
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- } else
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- out16(base + off, val);
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-}
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-
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-static u16 ace_readw(unsigned off)
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-{
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- if (width == 8) {
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-#if !defined(__BIG_ENDIAN)
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- return (readb(base + off) << 8) | readb(base + off + 1);
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-#else
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- return readb(base + off) | (readb(base + off + 1) << 8);
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-#endif
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- }
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-
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- return in16(base + off);
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-}
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-
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-#ifndef CONFIG_BLK
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-static struct blk_desc systemace_dev = { 0 };
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-#endif
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-
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-static int get_cf_lock(void)
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-{
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- int retry = 10;
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-
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- /* CONTROLREG = LOCKREG */
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- unsigned val = ace_readw(0x18);
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- val |= 0x0002;
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- ace_writew((val & 0xffff), 0x18);
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-
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- /* Wait for MPULOCK in STATUSREG[15:0] */
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- while (!(ace_readw(0x04) & 0x0002)) {
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-
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- if (retry < 0)
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- return -1;
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-
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- udelay(100000);
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- retry -= 1;
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- }
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-
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- return 0;
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-}
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-
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-static void release_cf_lock(void)
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-{
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- unsigned val = ace_readw(0x18);
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- val &= ~(0x0002);
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- ace_writew((val & 0xffff), 0x18);
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-}
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-
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-/*
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- * This function is called (by dereferencing the block_read pointer in
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- * the dev_desc) to read blocks of data. The return value is the
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- * number of blocks read. A zero return indicates an error.
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- */
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-#ifdef CONFIG_BLK
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-static unsigned long systemace_read(struct udevice *dev, unsigned long start,
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- lbaint_t blkcnt, void *buffer)
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-#else
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-static unsigned long systemace_read(struct blk_desc *block_dev,
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- unsigned long start, lbaint_t blkcnt,
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- void *buffer)
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-#endif
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-{
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- int retry;
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- unsigned blk_countdown;
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- unsigned char *dp = buffer;
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- unsigned val;
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-
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- if (get_cf_lock() < 0) {
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- unsigned status = ace_readw(0x04);
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-
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- /* If CFDETECT is false, card is missing. */
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- if (!(status & 0x0010)) {
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- printf("** CompactFlash card not present. **\n");
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- return 0;
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- }
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-
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- printf("**** ACE locked away from me (STATUSREG=%04x)\n",
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- status);
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- return 0;
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- }
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-#ifdef DEBUG_SYSTEMACE
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- printf("... systemace read %lu sectors at %lu\n", blkcnt, start);
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-#endif
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-
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- retry = 2000;
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- for (;;) {
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- val = ace_readw(0x04);
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-
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- /* If CFDETECT is false, card is missing. */
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- if (!(val & 0x0010)) {
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- printf("**** ACE CompactFlash not found.\n");
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- release_cf_lock();
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- return 0;
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- }
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-
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- /* If RDYFORCMD, then we are ready to go. */
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- if (val & 0x0100)
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- break;
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-
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- if (retry < 0) {
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- printf("**** SystemACE not ready.\n");
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- release_cf_lock();
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- return 0;
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- }
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-
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- udelay(1000);
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- retry -= 1;
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- }
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-
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- /* The SystemACE can only transfer 256 sectors at a time, so
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- limit the current chunk of sectors. The blk_countdown
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- variable is the number of sectors left to transfer. */
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-
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- blk_countdown = blkcnt;
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- while (blk_countdown > 0) {
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- unsigned trans = blk_countdown;
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-
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- if (trans > 256)
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- trans = 256;
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-
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-#ifdef DEBUG_SYSTEMACE
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- printf("... transfer %lu sector in a chunk\n", trans);
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-#endif
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- /* Write LBA block address */
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- ace_writew((start >> 0) & 0xffff, 0x10);
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- ace_writew((start >> 16) & 0x0fff, 0x12);
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-
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- /* NOTE: in the Write Sector count below, a count of 0
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- causes a transfer of 256, so &0xff gives the right
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- value for whatever transfer count we want. */
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-
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- /* Write sector count | ReadMemCardData. */
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- ace_writew((trans & 0xff) | 0x0300, 0x14);
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-
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-/*
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- * For FPGA configuration via SystemACE is reset unacceptable
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- * CFGDONE bit in STATUSREG is not set to 1.
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- */
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-#ifndef SYSTEMACE_CONFIG_FPGA
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- /* Reset the configruation controller */
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- val = ace_readw(0x18);
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- val |= 0x0080;
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- ace_writew(val, 0x18);
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-#endif
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-
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- retry = trans * 16;
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- while (retry > 0) {
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- int idx;
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-
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- /* Wait for buffer to become ready. */
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- while (!(ace_readw(0x04) & 0x0020)) {
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- udelay(100);
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- }
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-
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- /* Read 16 words of 2bytes from the sector buffer. */
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- for (idx = 0; idx < 16; idx += 1) {
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- unsigned short val = ace_readw(0x40);
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- *dp++ = val & 0xff;
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- *dp++ = (val >> 8) & 0xff;
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- }
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-
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- retry -= 1;
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- }
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-
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- /* Clear the configruation controller reset */
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- val = ace_readw(0x18);
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- val &= ~0x0080;
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- ace_writew(val, 0x18);
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-
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- /* Count the blocks we transfer this time. */
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- start += trans;
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- blk_countdown -= trans;
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- }
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-
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- release_cf_lock();
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-
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- return blkcnt;
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-}
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-
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-#ifdef CONFIG_BLK
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-static int systemace_bind(struct udevice *dev)
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-{
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- struct blk_desc *bdesc;
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- struct udevice *bdev;
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- int ret;
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-
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- ret = blk_create_devicef(dev, "systemace_blk", "blk", IF_TYPE_SYSTEMACE,
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- -1, 512, 0, &bdev);
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- if (ret) {
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- debug("Cannot create block device\n");
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- return ret;
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- }
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- bdesc = dev_get_uclass_platdata(bdev);
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- bdesc->removable = 1;
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- bdesc->part_type = PART_TYPE_UNKNOWN;
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- bdesc->log2blksz = LOG2(bdesc->blksz);
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-
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- /* Ensure the correct bus mode (8/16 bits) gets enabled */
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- ace_writew(width == 8 ? 0 : 0x0001, 0);
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-
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- return 0;
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-}
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-
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-static const struct blk_ops systemace_blk_ops = {
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- .read = systemace_read,
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-};
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-
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-U_BOOT_DRIVER(systemace_blk) = {
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- .name = "systemace_blk",
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- .id = UCLASS_BLK,
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- .ops = &systemace_blk_ops,
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- .bind = systemace_bind,
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-};
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-#else
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-static int systemace_get_dev(int dev, struct blk_desc **descp)
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-{
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- /* The first time through this, the systemace_dev object is
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- not yet initialized. In that case, fill it in. */
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- if (systemace_dev.blksz == 0) {
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- systemace_dev.if_type = IF_TYPE_UNKNOWN;
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- systemace_dev.devnum = 0;
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- systemace_dev.part_type = PART_TYPE_UNKNOWN;
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- systemace_dev.type = DEV_TYPE_HARDDISK;
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- systemace_dev.blksz = 512;
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- systemace_dev.log2blksz = LOG2(systemace_dev.blksz);
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- systemace_dev.removable = 1;
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- systemace_dev.block_read = systemace_read;
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-
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- /*
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- * Ensure the correct bus mode (8/16 bits) gets enabled
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- */
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- ace_writew(width == 8 ? 0 : 0x0001, 0);
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-
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- part_init(&systemace_dev);
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- }
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- *descp = &systemace_dev;
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-
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- return 0;
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-}
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-
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-U_BOOT_LEGACY_BLK(systemace) = {
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- .if_typename = "ace",
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- .if_type = IF_TYPE_SYSTEMACE,
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- .max_devs = 1,
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- .get_dev = systemace_get_dev,
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-};
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-#endif
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