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@@ -66,6 +66,10 @@
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#define STRAPBUS_63268_FCVO_SHIFT 21
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#define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
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+#define REG_BCM6838_OTP_BRCMBITS0 0x440
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+#define VIPER_6838_FREQ_SHIFT 18
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+#define VIPER_6838_FREQ_MASK (0x7 << VIPER_6838_FREQ_SHIFT)
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+
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struct bmips_cpu_priv;
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struct bmips_cpu_hw {
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@@ -272,6 +276,26 @@ static ulong bcm63268_get_cpu_freq(struct bmips_cpu_priv *priv)
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}
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}
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+static ulong bcm6838_get_cpu_freq(struct bmips_cpu_priv *priv)
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+{
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+ unsigned int mips_viper_freq;
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+
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+ mips_viper_freq = readl_be(priv->regs + REG_BCM6838_OTP_BRCMBITS0);
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+ mips_viper_freq = (mips_viper_freq & VIPER_6838_FREQ_MASK)
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+ >> VIPER_6838_FREQ_SHIFT;
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+
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+ switch (mips_viper_freq) {
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+ case 0x0:
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+ return 600000000;
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+ case 0x1:
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+ return 400000000;
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+ case 0x2:
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+ return 240000000;
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+ default:
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+ return 0;
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+ }
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+}
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+
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static int bcm6328_get_cpu_count(struct bmips_cpu_priv *priv)
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{
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u32 val = readl_be(priv->regs + REG_BCM6328_OTP);
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@@ -346,6 +370,12 @@ static const struct bmips_cpu_hw bmips_cpu_bcm63268 = {
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.get_cpu_count = bcm6358_get_cpu_count,
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};
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+static const struct bmips_cpu_hw bmips_cpu_bcm6838 = {
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+ .get_cpu_desc = bmips_short_cpu_desc,
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+ .get_cpu_freq = bcm6838_get_cpu_freq,
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+ .get_cpu_count = bcm6358_get_cpu_count,
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+};
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+
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/* Generic CPU Ops */
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static int bmips_cpu_get_desc(struct udevice *dev, char *buf, int size)
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{
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@@ -444,6 +474,9 @@ static const struct udevice_id bmips_cpu_ids[] = {
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}, {
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.compatible = "brcm,bcm63268-cpu",
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.data = (ulong)&bmips_cpu_bcm63268,
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+ }, {
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+ .compatible = "brcm,bcm6838-cpu",
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+ .data = (ulong)&bmips_cpu_bcm6838,
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},
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{ /* sentinel */ }
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};
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