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@@ -16,8 +16,10 @@
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#include <asm/mach-imx/hab.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/mach-imx/syscounter.h>
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+#include <asm/ptrace.h>
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#include <asm/armv8/mmu.h>
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#include <dm/uclass.h>
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+#include <efi_loader.h>
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#include <errno.h>
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#include <fdt_support.h>
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#include <fsl_wdog.h>
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@@ -527,3 +529,39 @@ void imx_tmu_arch_init(void *reg_base)
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writel(tca40[0] | (tca40[1] << 16), (ulong)reg_base + 0x38);
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#endif
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}
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+
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+#if defined(CONFIG_SPL_BUILD)
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+#if defined(CONFIG_IMX8MQ) || defined(CONFIG_IMX8MM) || defined(CONFIG_IMX8MN)
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+bool serror_need_skip = true;
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+
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+void do_error(struct pt_regs *pt_regs, unsigned int esr)
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+{
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+ /*
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+ * If stack is still in ROM reserved OCRAM not switch to SPL,
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+ * it is the ROM SError
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+ */
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+ ulong sp;
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+
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+ asm volatile("mov %0, sp" : "=r"(sp) : );
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+
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+ if (serror_need_skip && sp < 0x910000 && sp >= 0x900000) {
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+ /* Check for ERR050342, imx8mq HDCP enabled parts */
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+ if (is_imx8mq() && !(readl(OCOTP_BASE_ADDR + 0x450) & 0x08000000)) {
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+ serror_need_skip = false;
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+ return; /* Do nothing skip the SError in ROM */
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+ }
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+
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+ /* Check for ERR050350, field return mode for imx8mq, mm and mn */
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+ if (readl(OCOTP_BASE_ADDR + 0x630) & 0x1) {
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+ serror_need_skip = false;
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+ return; /* Do nothing skip the SError in ROM */
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+ }
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+ }
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+
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+ efi_restore_gd();
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+ printf("\"Error\" handler, esr 0x%08x\n", esr);
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+ show_regs(pt_regs);
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+ panic("Resetting CPU ...\n");
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+}
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+#endif
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+#endif
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