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@@ -17,6 +17,20 @@
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#include <linux/types.h>
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#include <usb/mv_udc.h>
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+#if CONFIG_USB_MAX_CONTROLLER_COUNT > 1
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+#error This driver only supports one single controller.
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+#endif
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+
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+/*
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+ * Check if the system has too long cachelines. If the cachelines are
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+ * longer then 128b, the driver will not be able flush/invalidate data
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+ * cache over separate QH entries. We use 128b because one QH entry is
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+ * 64b long and there are always two QH list entries for each endpoint.
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+ */
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+#if ARCH_DMA_MINALIGN > 128
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+#error This driver can not work on systems with caches longer than 128b
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+#endif
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+
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#ifndef DEBUG
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#define DBG(x...) do {} while (0)
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#else
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@@ -39,8 +53,6 @@ static const char *reqname(unsigned r)
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}
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#endif
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-#define PAGE_SIZE 4096
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-#define QH_MAXNUM 32
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static struct usb_endpoint_descriptor ep0_out_desc = {
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.bLength = sizeof(struct usb_endpoint_descriptor),
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.bDescriptorType = USB_DT_ENDPOINT,
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@@ -55,8 +67,6 @@ static struct usb_endpoint_descriptor ep0_in_desc = {
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.bmAttributes = USB_ENDPOINT_XFER_CONTROL,
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};
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-struct ept_queue_head *epts;
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-struct ept_queue_item *items[2 * NUM_ENDPOINTS];
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static int mv_pullup(struct usb_gadget *gadget, int is_on);
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static int mv_ep_enable(struct usb_ep *ep,
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const struct usb_endpoint_descriptor *desc);
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@@ -79,14 +89,115 @@ static struct usb_ep_ops mv_ep_ops = {
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.free_request = mv_ep_free_request,
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};
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-static struct mv_ep ep[2 * NUM_ENDPOINTS];
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+/* Init values for USB endpoints. */
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+static const struct usb_ep mv_ep_init[2] = {
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+ [0] = { /* EP 0 */
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+ .maxpacket = 64,
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+ .name = "ep0",
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+ .ops = &mv_ep_ops,
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+ },
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+ [1] = { /* EP 1..n */
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+ .maxpacket = 512,
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+ .name = "ep-",
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+ .ops = &mv_ep_ops,
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+ },
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+};
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+
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static struct mv_drv controller = {
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- .gadget = {
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- .ep0 = &ep[0].ep,
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- .name = "mv_udc",
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+ .gadget = {
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+ .name = "mv_udc",
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+ .ops = &mv_udc_ops,
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},
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};
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+/**
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+ * mv_get_qh() - return queue head for endpoint
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+ * @ep_num: Endpoint number
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+ * @dir_in: Direction of the endpoint (IN = 1, OUT = 0)
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+ *
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+ * This function returns the QH associated with particular endpoint
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+ * and it's direction.
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+ */
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+static struct ept_queue_head *mv_get_qh(int ep_num, int dir_in)
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+{
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+ return &controller.epts[(ep_num * 2) + dir_in];
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+}
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+
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+/**
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+ * mv_get_qtd() - return queue item for endpoint
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+ * @ep_num: Endpoint number
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+ * @dir_in: Direction of the endpoint (IN = 1, OUT = 0)
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+ *
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+ * This function returns the QH associated with particular endpoint
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+ * and it's direction.
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+ */
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+static struct ept_queue_item *mv_get_qtd(int ep_num, int dir_in)
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+{
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+ return controller.items[(ep_num * 2) + dir_in];
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+}
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+
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+/**
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+ * mv_flush_qh - flush cache over queue head
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+ * @ep_num: Endpoint number
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+ *
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+ * This function flushes cache over QH for particular endpoint.
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+ */
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+static void mv_flush_qh(int ep_num)
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+{
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+ struct ept_queue_head *head = mv_get_qh(ep_num, 0);
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+ const uint32_t start = (uint32_t)head;
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+ const uint32_t end = start + 2 * sizeof(*head);
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+
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+ flush_dcache_range(start, end);
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+}
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+
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+/**
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+ * mv_invalidate_qh - invalidate cache over queue head
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+ * @ep_num: Endpoint number
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+ *
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+ * This function invalidates cache over QH for particular endpoint.
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+ */
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+static void mv_invalidate_qh(int ep_num)
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+{
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+ struct ept_queue_head *head = mv_get_qh(ep_num, 0);
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+ uint32_t start = (uint32_t)head;
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+ uint32_t end = start + 2 * sizeof(*head);
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+
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+ invalidate_dcache_range(start, end);
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+}
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+
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+/**
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+ * mv_flush_qtd - flush cache over queue item
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+ * @ep_num: Endpoint number
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+ *
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+ * This function flushes cache over qTD pair for particular endpoint.
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+ */
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+static void mv_flush_qtd(int ep_num)
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+{
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+ struct ept_queue_item *item = mv_get_qtd(ep_num, 0);
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+ const uint32_t start = (uint32_t)item;
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+ const uint32_t end_raw = start + 2 * sizeof(*item);
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+ const uint32_t end = roundup(end_raw, ARCH_DMA_MINALIGN);
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+
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+ flush_dcache_range(start, end);
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+}
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+
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+/**
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+ * mv_invalidate_qtd - invalidate cache over queue item
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+ * @ep_num: Endpoint number
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+ *
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+ * This function invalidates cache over qTD pair for particular endpoint.
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+ */
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+static void mv_invalidate_qtd(int ep_num)
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+{
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+ struct ept_queue_item *item = mv_get_qtd(ep_num, 0);
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+ const uint32_t start = (uint32_t)item;
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+ const uint32_t end_raw = start + 2 * sizeof(*item);
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+ const uint32_t end = roundup(end_raw, ARCH_DMA_MINALIGN);
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+
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+ invalidate_dcache_range(start, end);
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+}
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+
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static struct usb_request *
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mv_ep_alloc_request(struct usb_ep *ep, unsigned int gfp_flags)
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{
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@@ -102,9 +213,9 @@ static void mv_ep_free_request(struct usb_ep *ep, struct usb_request *_req)
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static void ep_enable(int num, int in)
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{
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struct ept_queue_head *head;
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- struct mv_udc *udc = controller.udc;
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+ struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
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unsigned n;
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- head = epts + 2*num + in;
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+ head = mv_get_qh(num, in);
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n = readl(&udc->epctrl[num]);
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if (in)
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@@ -112,8 +223,10 @@ static void ep_enable(int num, int in)
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else
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n |= (CTRL_RXE | CTRL_RXR | CTRL_RXT_BULK);
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- if (num != 0)
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+ if (num != 0) {
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head->config = CONFIG_MAX_PKT(EP_MAX_PACKET_SIZE) | CONFIG_ZLT;
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+ mv_flush_qh(num);
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+ }
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writel(n, &udc->epctrl[num]);
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}
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@@ -134,40 +247,108 @@ static int mv_ep_disable(struct usb_ep *ep)
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return 0;
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}
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+static int mv_bounce(struct mv_ep *ep)
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+{
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+ uint32_t addr = (uint32_t)ep->req.buf;
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+ uint32_t ba;
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+
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+ /* Input buffer address is not aligned. */
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+ if (addr & (ARCH_DMA_MINALIGN - 1))
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+ goto align;
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+
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+ /* Input buffer length is not aligned. */
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+ if (ep->req.length & (ARCH_DMA_MINALIGN - 1))
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+ goto align;
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+
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+ /* The buffer is well aligned, only flush cache. */
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+ ep->b_len = ep->req.length;
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+ ep->b_buf = ep->req.buf;
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+ goto flush;
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+
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+align:
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+ /* Use internal buffer for small payloads. */
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+ if (ep->req.length <= 64) {
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+ ep->b_len = 64;
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+ ep->b_buf = ep->b_fast;
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+ } else {
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+ ep->b_len = roundup(ep->req.length, ARCH_DMA_MINALIGN);
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+ ep->b_buf = memalign(ARCH_DMA_MINALIGN, ep->b_len);
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+ if (!ep->b_buf)
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+ return -ENOMEM;
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+ }
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+
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+ memcpy(ep->b_buf, ep->req.buf, ep->req.length);
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+
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+flush:
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+ ba = (uint32_t)ep->b_buf;
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+ flush_dcache_range(ba, ba + ep->b_len);
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+
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+ return 0;
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+}
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+
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+static void mv_debounce(struct mv_ep *ep)
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+{
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+ uint32_t addr = (uint32_t)ep->req.buf;
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+ uint32_t ba = (uint32_t)ep->b_buf;
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+
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+ invalidate_dcache_range(ba, ba + ep->b_len);
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+
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+ /* Input buffer address is not aligned. */
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+ if (addr & (ARCH_DMA_MINALIGN - 1))
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+ goto copy;
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+
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+ /* Input buffer length is not aligned. */
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+ if (ep->req.length & (ARCH_DMA_MINALIGN - 1))
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+ goto copy;
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+
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+ /* The buffer is well aligned, only invalidate cache. */
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+ return;
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+
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+copy:
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+ memcpy(ep->req.buf, ep->b_buf, ep->req.length);
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+
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+ /* Large payloads use allocated buffer, free it. */
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+ if (ep->req.length > 64)
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+ free(ep->b_buf);
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+}
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+
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static int mv_ep_queue(struct usb_ep *ep,
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struct usb_request *req, gfp_t gfp_flags)
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{
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struct mv_ep *mv_ep = container_of(ep, struct mv_ep, ep);
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- struct mv_udc *udc = controller.udc;
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+ struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
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struct ept_queue_item *item;
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struct ept_queue_head *head;
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- unsigned phys;
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- int bit, num, len, in;
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+ int bit, num, len, in, ret;
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num = mv_ep->desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
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in = (mv_ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
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- item = items[2 * num + in];
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- head = epts + 2 * num + in;
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- phys = (unsigned)req->buf;
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+ item = mv_get_qtd(num, in);
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+ head = mv_get_qh(num, in);
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len = req->length;
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+ ret = mv_bounce(mv_ep);
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+ if (ret)
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+ return ret;
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+
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item->next = TERMINATE;
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item->info = INFO_BYTES(len) | INFO_IOC | INFO_ACTIVE;
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- item->page0 = phys;
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- item->page1 = (phys & 0xfffff000) + 0x1000;
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+ item->page0 = (uint32_t)mv_ep->b_buf;
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+ item->page1 = ((uint32_t)mv_ep->b_buf & 0xfffff000) + 0x1000;
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head->next = (unsigned) item;
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head->info = 0;
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- DBG("ept%d %s queue len %x, buffer %x\n",
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- num, in ? "in" : "out", len, phys);
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+ DBG("ept%d %s queue len %x, buffer %p\n",
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+ num, in ? "in" : "out", len, mv_ep->b_buf);
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if (in)
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bit = EPT_TX(num);
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else
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bit = EPT_RX(num);
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- flush_cache(phys, len);
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- flush_cache((unsigned long)item, sizeof(struct ept_queue_item));
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+ mv_flush_qh(num);
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+ mv_flush_qtd(num);
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+
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writel(bit, &udc->epprime);
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return 0;
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@@ -181,13 +362,17 @@ static void handle_ep_complete(struct mv_ep *ep)
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in = (ep->desc->bEndpointAddress & USB_DIR_IN) != 0;
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if (num == 0)
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ep->desc = &ep0_out_desc;
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- item = items[2 * num + in];
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-
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+ item = mv_get_qtd(num, in);
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+ mv_invalidate_qtd(num);
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+
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if (item->info & 0xff)
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printf("EP%d/%s FAIL nfo=%x pg0=%x\n",
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num, in ? "in" : "out", item->info, item->page0);
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len = (item->info >> 16) & 0x7fff;
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+
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+ mv_debounce(ep);
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+
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ep->req.length -= len;
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DBG("ept%d %s complete %x\n",
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num, in ? "in" : "out", len);
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@@ -203,16 +388,16 @@ static void handle_ep_complete(struct mv_ep *ep)
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static void handle_setup(void)
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{
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- struct usb_request *req = &ep[0].req;
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- struct mv_udc *udc = controller.udc;
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+ struct usb_request *req = &controller.ep[0].req;
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+ struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
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struct ept_queue_head *head;
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struct usb_ctrlrequest r;
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int status = 0;
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int num, in, _num, _in, i;
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char *buf;
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- head = epts;
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+ head = mv_get_qh(0, 0); /* EP0 OUT */
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- flush_cache((unsigned long)head, sizeof(struct ept_queue_head));
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+ mv_invalidate_qh(0);
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memcpy(&r, head->setup_data, sizeof(struct usb_ctrlrequest));
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writel(EPT_RX(0), &udc->epstat);
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DBG("handle setup %s, %x, %x index %x value %x\n", reqname(r.bRequest),
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@@ -226,11 +411,11 @@ static void handle_setup(void)
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if ((r.wValue == 0) && (r.wLength == 0)) {
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req->length = 0;
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for (i = 0; i < NUM_ENDPOINTS; i++) {
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- if (!ep[i].desc)
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+ if (!controller.ep[i].desc)
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continue;
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- num = ep[i].desc->bEndpointAddress
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- & USB_ENDPOINT_NUMBER_MASK;
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- in = (ep[i].desc->bEndpointAddress
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+ num = controller.ep[i].desc->bEndpointAddress
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+ & USB_ENDPOINT_NUMBER_MASK;
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+ in = (controller.ep[i].desc->bEndpointAddress
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& USB_DIR_IN) != 0;
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if ((num == _num) && (in == _in)) {
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ep_enable(num, in);
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@@ -277,7 +462,7 @@ static void stop_activity(void)
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{
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int i, num, in;
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struct ept_queue_head *head;
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- struct mv_udc *udc = controller.udc;
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+ struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
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writel(readl(&udc->epcomp), &udc->epcomp);
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writel(readl(&udc->epstat), &udc->epstat);
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writel(0xffffffff, &udc->epflush);
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@@ -286,19 +471,21 @@ static void stop_activity(void)
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for (i = 0; i < NUM_ENDPOINTS; i++) {
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if (i != 0)
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writel(0, &udc->epctrl[i]);
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- if (ep[i].desc) {
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- num = ep[i].desc->bEndpointAddress
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+ if (controller.ep[i].desc) {
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+ num = controller.ep[i].desc->bEndpointAddress
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& USB_ENDPOINT_NUMBER_MASK;
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- in = (ep[i].desc->bEndpointAddress & USB_DIR_IN) != 0;
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- head = epts + (num * 2) + (in);
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+ in = (controller.ep[i].desc->bEndpointAddress
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+ & USB_DIR_IN) != 0;
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+ head = mv_get_qh(num, in);
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head->info = INFO_ACTIVE;
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+ mv_flush_qh(num);
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}
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}
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}
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void udc_irq(void)
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{
|
|
|
- struct mv_udc *udc = controller.udc;
|
|
|
+ struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
|
|
|
unsigned n = readl(&udc->usbsts);
|
|
|
writel(n, &udc->usbsts);
|
|
|
int bit, i, num, in;
|
|
@@ -320,8 +507,8 @@ void udc_irq(void)
|
|
|
if (bit == 2) {
|
|
|
controller.gadget.speed = USB_SPEED_HIGH;
|
|
|
for (i = 1; i < NUM_ENDPOINTS && n; i++)
|
|
|
- if (ep[i].desc)
|
|
|
- ep[i].ep.maxpacket = 512;
|
|
|
+ if (controller.ep[i].desc)
|
|
|
+ controller.ep[i].ep.maxpacket = 512;
|
|
|
} else {
|
|
|
controller.gadget.speed = USB_SPEED_FULL;
|
|
|
}
|
|
@@ -340,14 +527,14 @@ void udc_irq(void)
|
|
|
writel(n, &udc->epcomp);
|
|
|
|
|
|
for (i = 0; i < NUM_ENDPOINTS && n; i++) {
|
|
|
- if (ep[i].desc) {
|
|
|
- num = ep[i].desc->bEndpointAddress
|
|
|
+ if (controller.ep[i].desc) {
|
|
|
+ num = controller.ep[i].desc->bEndpointAddress
|
|
|
& USB_ENDPOINT_NUMBER_MASK;
|
|
|
- in = (ep[i].desc->bEndpointAddress
|
|
|
+ in = (controller.ep[i].desc->bEndpointAddress
|
|
|
& USB_DIR_IN) != 0;
|
|
|
bit = (in) ? EPT_TX(num) : EPT_RX(num);
|
|
|
if (n & bit)
|
|
|
- handle_ep_complete(&ep[i]);
|
|
|
+ handle_ep_complete(&controller.ep[i]);
|
|
|
}
|
|
|
}
|
|
|
}
|
|
@@ -356,7 +543,7 @@ void udc_irq(void)
|
|
|
int usb_gadget_handle_interrupts(void)
|
|
|
{
|
|
|
u32 value;
|
|
|
- struct mv_udc *udc = controller.udc;
|
|
|
+ struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
|
|
|
|
|
|
value = readl(&udc->usbsts);
|
|
|
if (value)
|
|
@@ -367,13 +554,13 @@ int usb_gadget_handle_interrupts(void)
|
|
|
|
|
|
static int mv_pullup(struct usb_gadget *gadget, int is_on)
|
|
|
{
|
|
|
- struct mv_udc *udc = controller.udc;
|
|
|
+ struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
|
|
|
if (is_on) {
|
|
|
/* RESET */
|
|
|
writel(USBCMD_ITC(MICRO_8FRAME) | USBCMD_RST, &udc->usbcmd);
|
|
|
udelay(200);
|
|
|
|
|
|
- writel((unsigned) epts, &udc->epinitaddr);
|
|
|
+ writel((unsigned)controller.epts, &udc->epinitaddr);
|
|
|
|
|
|
/* select DEVICE mode */
|
|
|
writel(USBMODE_DEVICE, &udc->usbmode);
|
|
@@ -395,7 +582,7 @@ static int mv_pullup(struct usb_gadget *gadget, int is_on)
|
|
|
|
|
|
void udc_disconnect(void)
|
|
|
{
|
|
|
- struct mv_udc *udc = controller.udc;
|
|
|
+ struct mv_udc *udc = (struct mv_udc *)controller.ctrl->hcor;
|
|
|
/* disable pullup */
|
|
|
stop_activity();
|
|
|
writel(USBCMD_FS2, &udc->usbcmd);
|
|
@@ -407,18 +594,48 @@ void udc_disconnect(void)
|
|
|
static int mvudc_probe(void)
|
|
|
{
|
|
|
struct ept_queue_head *head;
|
|
|
+ uint8_t *imem;
|
|
|
int i;
|
|
|
|
|
|
- controller.gadget.ops = &mv_udc_ops;
|
|
|
- controller.udc = (struct mv_udc *)CONFIG_USB_REG_BASE;
|
|
|
- epts = memalign(PAGE_SIZE, QH_MAXNUM * sizeof(struct ept_queue_head));
|
|
|
- memset(epts, 0, QH_MAXNUM * sizeof(struct ept_queue_head));
|
|
|
+ const int num = 2 * NUM_ENDPOINTS;
|
|
|
+
|
|
|
+ const int eplist_min_align = 4096;
|
|
|
+ const int eplist_align = roundup(eplist_min_align, ARCH_DMA_MINALIGN);
|
|
|
+ const int eplist_raw_sz = num * sizeof(struct ept_queue_head);
|
|
|
+ const int eplist_sz = roundup(eplist_raw_sz, ARCH_DMA_MINALIGN);
|
|
|
+
|
|
|
+ const int ilist_align = roundup(ARCH_DMA_MINALIGN, 32);
|
|
|
+ const int ilist_ent_raw_sz = 2 * sizeof(struct ept_queue_item);
|
|
|
+ const int ilist_ent_sz = roundup(ilist_ent_raw_sz, ARCH_DMA_MINALIGN);
|
|
|
+ const int ilist_sz = NUM_ENDPOINTS * ilist_ent_sz;
|
|
|
+
|
|
|
+ /* The QH list must be aligned to 4096 bytes. */
|
|
|
+ controller.epts = memalign(eplist_align, eplist_sz);
|
|
|
+ if (!controller.epts)
|
|
|
+ return -ENOMEM;
|
|
|
+ memset(controller.epts, 0, eplist_sz);
|
|
|
+
|
|
|
+ /*
|
|
|
+ * Each qTD item must be 32-byte aligned, each qTD touple must be
|
|
|
+ * cacheline aligned. There are two qTD items for each endpoint and
|
|
|
+ * only one of them is used for the endpoint at time, so we can group
|
|
|
+ * them together.
|
|
|
+ */
|
|
|
+ controller.items_mem = memalign(ilist_align, ilist_sz);
|
|
|
+ if (!controller.items_mem) {
|
|
|
+ free(controller.epts);
|
|
|
+ return -ENOMEM;
|
|
|
+ }
|
|
|
+
|
|
|
for (i = 0; i < 2 * NUM_ENDPOINTS; i++) {
|
|
|
/*
|
|
|
- * For item0 and item1, they are served as ep0
|
|
|
- * out&in seperately
|
|
|
+ * Configure QH for each endpoint. The structure of the QH list
|
|
|
+ * is such that each two subsequent fields, N and N+1 where N is
|
|
|
+ * even, in the QH list represent QH for one endpoint. The Nth
|
|
|
+ * entry represents OUT configuration and the N+1th entry does
|
|
|
+ * represent IN configuration of the endpoint.
|
|
|
*/
|
|
|
- head = epts + i;
|
|
|
+ head = controller.epts + i;
|
|
|
if (i < 2)
|
|
|
head->config = CONFIG_MAX_PKT(EP0_MAX_PACKET_SIZE)
|
|
|
| CONFIG_ZLT | CONFIG_IOS;
|
|
@@ -428,49 +645,65 @@ static int mvudc_probe(void)
|
|
|
head->next = TERMINATE;
|
|
|
head->info = 0;
|
|
|
|
|
|
- items[i] = memalign(PAGE_SIZE, sizeof(struct ept_queue_item));
|
|
|
+ imem = controller.items_mem + ((i >> 1) * ilist_ent_sz);
|
|
|
+ if (i & 1)
|
|
|
+ imem += sizeof(struct ept_queue_item);
|
|
|
+
|
|
|
+ controller.items[i] = (struct ept_queue_item *)imem;
|
|
|
+
|
|
|
+ if (i & 1) {
|
|
|
+ mv_flush_qh(i - 1);
|
|
|
+ mv_flush_qtd(i - 1);
|
|
|
+ }
|
|
|
}
|
|
|
|
|
|
INIT_LIST_HEAD(&controller.gadget.ep_list);
|
|
|
- ep[0].ep.maxpacket = 64;
|
|
|
- ep[0].ep.name = "ep0";
|
|
|
- ep[0].desc = &ep0_in_desc;
|
|
|
+
|
|
|
+ /* Init EP 0 */
|
|
|
+ memcpy(&controller.ep[0].ep, &mv_ep_init[0], sizeof(*mv_ep_init));
|
|
|
+ controller.ep[0].desc = &ep0_in_desc;
|
|
|
+ controller.gadget.ep0 = &controller.ep[0].ep;
|
|
|
INIT_LIST_HEAD(&controller.gadget.ep0->ep_list);
|
|
|
- for (i = 0; i < 2 * NUM_ENDPOINTS; i++) {
|
|
|
- if (i != 0) {
|
|
|
- ep[i].ep.maxpacket = 512;
|
|
|
- ep[i].ep.name = "ep-";
|
|
|
- list_add_tail(&ep[i].ep.ep_list,
|
|
|
- &controller.gadget.ep_list);
|
|
|
- ep[i].desc = NULL;
|
|
|
- }
|
|
|
- ep[i].ep.ops = &mv_ep_ops;
|
|
|
+
|
|
|
+ /* Init EP 1..n */
|
|
|
+ for (i = 1; i < NUM_ENDPOINTS; i++) {
|
|
|
+ memcpy(&controller.ep[i].ep, &mv_ep_init[1],
|
|
|
+ sizeof(*mv_ep_init));
|
|
|
+ list_add_tail(&controller.ep[i].ep.ep_list,
|
|
|
+ &controller.gadget.ep_list);
|
|
|
}
|
|
|
+
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
int usb_gadget_register_driver(struct usb_gadget_driver *driver)
|
|
|
{
|
|
|
- struct mv_udc *udc = controller.udc;
|
|
|
- int retval;
|
|
|
-
|
|
|
- if (!driver
|
|
|
- || driver->speed < USB_SPEED_FULL
|
|
|
- || !driver->bind
|
|
|
- || !driver->setup) {
|
|
|
- DBG("bad parameter.\n");
|
|
|
+ struct mv_udc *udc;
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ if (!driver)
|
|
|
return -EINVAL;
|
|
|
- }
|
|
|
+ if (!driver->bind || !driver->setup || !driver->disconnect)
|
|
|
+ return -EINVAL;
|
|
|
+ if (driver->speed != USB_SPEED_FULL && driver->speed != USB_SPEED_HIGH)
|
|
|
+ return -EINVAL;
|
|
|
+
|
|
|
+ ret = usb_lowlevel_init(0, (void **)&controller.ctrl);
|
|
|
+ if (ret)
|
|
|
+ return ret;
|
|
|
+
|
|
|
+ ret = mvudc_probe();
|
|
|
+ if (!ret) {
|
|
|
+ udc = (struct mv_udc *)controller.ctrl->hcor;
|
|
|
|
|
|
- if (!mvudc_probe()) {
|
|
|
- usb_lowlevel_init();
|
|
|
/* select ULPI phy */
|
|
|
writel(PTS(PTS_ENABLE) | PFSC, &udc->portsc);
|
|
|
}
|
|
|
- retval = driver->bind(&controller.gadget);
|
|
|
- if (retval) {
|
|
|
- DBG("driver->bind() returned %d\n", retval);
|
|
|
- return retval;
|
|
|
+
|
|
|
+ ret = driver->bind(&controller.gadget);
|
|
|
+ if (ret) {
|
|
|
+ DBG("driver->bind() returned %d\n", ret);
|
|
|
+ return ret;
|
|
|
}
|
|
|
controller.driver = driver;
|
|
|
|