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@@ -325,6 +325,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step,
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switch (start_step) {
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case STEP_GET_SPD:
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+#if defined(CONFIG_DDR_SPD) || defined(CONFIG_SPD_EEPROM)
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/* STEP 1: Gather all DIMM SPD data */
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for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
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fsl_ddr_get_spd(pinfo->spd_installed_dimms[i], i);
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@@ -356,6 +357,17 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step,
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}
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}
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+#else
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+ case STEP_COMPUTE_DIMM_PARMS:
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+ for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
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+ for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
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+ dimm_params_t *pdimm =
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+ &(pinfo->dimm_params[i][j]);
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+ fsl_ddr_get_dimm_params(pdimm, i, j);
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+ }
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+ }
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+ debug("Filling dimm parameters from board specific file\n");
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+#endif
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case STEP_COMPUTE_COMMON_PARMS:
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/*
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* STEP 3: Compute a common set of timing parameters
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