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@@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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- * Copyright 2018-2019 NXP
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+ * Copyright 2018-2020 NXP
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*
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* PCIe Gen4 driver for NXP Layerscape SoCs
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* Author: Hou Zhiqiang <Minder.Hou@gmail.com>
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@@ -19,6 +19,7 @@
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#include <asm/arch/clock.h>
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#endif
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#include "pcie_layerscape_gen4.h"
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+#include "pcie_layerscape_fixup_common.h"
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#if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
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/*
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@@ -234,7 +235,7 @@ static void ft_pcie_layerscape_gen4_setup(void *blob, struct ls_pcie_g4 *pcie)
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}
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/* Fixup Kernel DT for PCIe */
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-void ft_pci_setup(void *blob, bd_t *bd)
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+void ft_pci_setup_ls_gen4(void *blob, bd_t *bd)
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{
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struct ls_pcie_g4 *pcie;
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@@ -247,7 +248,7 @@ void ft_pci_setup(void *blob, bd_t *bd)
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}
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#else /* !CONFIG_OF_BOARD_SETUP */
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-void ft_pci_setup(void *blob, bd_t *bd)
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+void ft_pci_setup_ls_gen4(void *blob, bd_t *bd)
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{
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}
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#endif
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