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@@ -321,7 +321,7 @@ init_fnc_t *init_sequence[] = {
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prt_8260_rsr,
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prt_8260_clks,
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#endif /* CONFIG_8260 */
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-#if defined(CONFIG_MPC83XX)
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+#if defined(CONFIG_MPC83xx)
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prt_83xx_rsr,
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#endif
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checkcpu,
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@@ -408,7 +408,7 @@ void board_init_f (ulong bootflag)
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/* compiler optimization barrier needed for GCC >= 3.4 */
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__asm__ __volatile__("": : :"memory");
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-#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83XX) && \
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+#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83xx) && \
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!defined(CONFIG_MPC85xx) && !defined(CONFIG_MPC86xx)
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/* Clear initial global data */
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memset ((void *) gd, 0, sizeof (gd_t));
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@@ -570,7 +570,7 @@ void board_init_f (ulong bootflag)
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#if defined(CONFIG_MPC5xxx)
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bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
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#endif
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-#if defined(CONFIG_MPC83XX)
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+#if defined(CONFIG_MPC83xx)
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bd->bi_immrbar = CONFIG_SYS_IMMR;
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#endif
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#if defined(CONFIG_MPC8220)
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@@ -750,7 +750,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
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WATCHDOG_RESET();
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-#if defined(CONFIG_SYS_DELAYED_ICACHE) || defined(CONFIG_MPC83XX)
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+#if defined(CONFIG_SYS_DELAYED_ICACHE) || defined(CONFIG_MPC83xx)
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icache_enable (); /* it's time to enable the instruction cache */
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#endif
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