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@@ -18,6 +18,7 @@
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#include <net.h>
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#include <miiphy.h>
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#include <asm/cache.h>
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+#include <wait_bit.h>
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/* register offsets */
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#define MODER 0x00
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@@ -181,6 +182,11 @@ struct ethoc {
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void __iomem *iobase;
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void __iomem *packet;
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phys_addr_t packet_phys;
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+
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+#ifdef CONFIG_PHYLIB
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+ struct mii_dev *bus;
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+ struct phy_device *phydev;
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+#endif
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};
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/**
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@@ -193,14 +199,19 @@ struct ethoc_bd {
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u32 addr;
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};
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+static inline u32 *ethoc_reg(struct ethoc *priv, size_t offset)
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+{
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+ return priv->iobase + offset;
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+}
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+
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static inline u32 ethoc_read(struct ethoc *priv, size_t offset)
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{
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- return readl(priv->iobase + offset);
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+ return readl(ethoc_reg(priv, offset));
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}
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static inline void ethoc_write(struct ethoc *priv, size_t offset, u32 data)
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{
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- writel(data, priv->iobase + offset);
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+ writel(data, ethoc_reg(priv, offset));
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}
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static inline void ethoc_read_bd(struct ethoc *priv, int index,
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@@ -319,13 +330,31 @@ static int ethoc_reset(struct ethoc *priv)
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static int ethoc_init_common(struct ethoc *priv)
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{
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+ int ret = 0;
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+
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priv->num_tx = 1;
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priv->num_rx = PKTBUFSRX;
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ethoc_write(priv, TX_BD_NUM, priv->num_tx);
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ethoc_init_ring(priv);
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ethoc_reset(priv);
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- return 0;
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+#ifdef CONFIG_PHYLIB
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+ ret = phy_startup(priv->phydev);
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+ if (ret) {
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+ printf("Could not initialize PHY %s\n",
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+ priv->phydev->dev->name);
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+ return ret;
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+ }
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+#endif
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+ return ret;
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+}
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+
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+static void ethoc_stop_common(struct ethoc *priv)
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+{
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+ ethoc_disable_rx_and_tx(priv);
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+#ifdef CONFIG_PHYLIB
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+ phy_shutdown(priv->phydev);
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+#endif
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}
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static int ethoc_update_rx_stats(struct ethoc_bd *bd)
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@@ -509,6 +538,110 @@ static int ethoc_free_pkt_common(struct ethoc *priv)
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return 0;
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}
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+#ifdef CONFIG_PHYLIB
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+
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+static int ethoc_mdio_read(struct mii_dev *bus, int addr, int devad, int reg)
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+{
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+ struct ethoc *priv = bus->priv;
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+ int rc;
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+
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+ ethoc_write(priv, MIIADDRESS, MIIADDRESS_ADDR(addr, reg));
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+ ethoc_write(priv, MIICOMMAND, MIICOMMAND_READ);
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+
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+ rc = wait_for_bit(__func__, ethoc_reg(priv, MIISTATUS),
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+ MIISTATUS_BUSY, false, CONFIG_SYS_HZ, false);
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+
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+ if (rc == 0) {
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+ u32 data = ethoc_read(priv, MIIRX_DATA);
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+
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+ /* reset MII command register */
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+ ethoc_write(priv, MIICOMMAND, 0);
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+ return data;
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+ }
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+ return rc;
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+}
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+
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+static int ethoc_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
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+ u16 val)
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+{
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+ struct ethoc *priv = bus->priv;
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+ int rc;
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+
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+ ethoc_write(priv, MIIADDRESS, MIIADDRESS_ADDR(addr, reg));
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+ ethoc_write(priv, MIITX_DATA, val);
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+ ethoc_write(priv, MIICOMMAND, MIICOMMAND_WRITE);
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+
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+ rc = wait_for_bit(__func__, ethoc_reg(priv, MIISTATUS),
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+ MIISTATUS_BUSY, false, CONFIG_SYS_HZ, false);
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+
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+ if (rc == 0) {
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+ /* reset MII command register */
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+ ethoc_write(priv, MIICOMMAND, 0);
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+ }
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+ return rc;
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+}
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+
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+static int ethoc_mdio_init(const char *name, struct ethoc *priv)
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+{
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+ struct mii_dev *bus = mdio_alloc();
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+ int ret;
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+
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+ if (!bus) {
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+ printf("Failed to allocate MDIO bus\n");
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+ return -ENOMEM;
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+ }
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+
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+ bus->read = ethoc_mdio_read;
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+ bus->write = ethoc_mdio_write;
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+ snprintf(bus->name, sizeof(bus->name), "%s", name);
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+ bus->priv = priv;
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+
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+ ret = mdio_register(bus);
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+ if (ret < 0)
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+ return ret;
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+
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+ priv->bus = miiphy_get_dev_by_name(name);
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+ return 0;
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+}
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+
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+static int ethoc_phy_init(struct ethoc *priv, void *dev)
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+{
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+ struct phy_device *phydev;
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+ int mask = 0xffffffff;
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+
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+#ifdef CONFIG_PHY_ADDR
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+ mask = 1 << CONFIG_PHY_ADDR;
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+#endif
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+
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+ phydev = phy_find_by_mask(priv->bus, mask, PHY_INTERFACE_MODE_MII);
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+ if (!phydev)
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+ return -ENODEV;
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+
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+ phy_connect_dev(phydev, dev);
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+
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+ phydev->supported &= PHY_BASIC_FEATURES;
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+ phydev->advertising = phydev->supported;
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+
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+ priv->phydev = phydev;
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+ phy_config(phydev);
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+
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+ return 0;
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+}
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+
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+#else
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+
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+static inline int ethoc_mdio_init(const char *name, struct ethoc *priv)
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+{
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+ return 0;
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+}
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+
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+static inline int ethoc_phy_init(struct ethoc *priv, void *dev)
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+{
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+ return 0;
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+}
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+
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+#endif
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+
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#ifdef CONFIG_DM_ETH
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static int ethoc_write_hwaddr(struct udevice *dev)
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@@ -548,9 +681,7 @@ static int ethoc_start(struct udevice *dev)
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static void ethoc_stop(struct udevice *dev)
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{
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- struct ethoc *priv = dev_get_priv(dev);
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-
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- ethoc_disable_rx_and_tx(priv);
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+ ethoc_stop_common(dev_get_priv(dev));
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}
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static int ethoc_ofdata_to_platdata(struct udevice *dev)
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@@ -576,6 +707,10 @@ static int ethoc_probe(struct udevice *dev)
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priv->packet = ioremap(pdata->packet_base,
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(1 + PKTBUFSRX) * PKTSIZE_ALIGN);
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}
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+
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+ ethoc_mdio_init(dev->name, priv);
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+ ethoc_phy_init(priv, dev);
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+
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return 0;
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}
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@@ -583,6 +718,11 @@ static int ethoc_remove(struct udevice *dev)
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{
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struct ethoc *priv = dev_get_priv(dev);
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+#ifdef CONFIG_PHYLIB
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+ free(priv->phydev);
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+ mdio_unregister(priv->bus);
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+ mdio_free(priv->bus);
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+#endif
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iounmap(priv->iobase);
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return 0;
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}
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@@ -687,6 +827,10 @@ int ethoc_initialize(u8 dev_num, int base_addr)
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priv->iobase = ioremap(dev->iobase, ETHOC_IOSIZE);
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eth_register(dev);
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+
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+ ethoc_mdio_init(dev->name, priv);
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+ ethoc_phy_init(priv, dev);
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+
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return 1;
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}
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