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@@ -22,16 +22,37 @@
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#include <linux/io.h>
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#include "mscc-common.h"
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-#define MSCC_GPIO_OUT_SET 0x0
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-#define MSCC_GPIO_OUT_CLR 0x4
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-#define MSCC_GPIO_OUT 0x8
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-#define MSCC_GPIO_IN 0xc
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-#define MSCC_GPIO_OE 0x10
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-#define MSCC_GPIO_INTR 0x14
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-#define MSCC_GPIO_INTR_ENA 0x18
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-#define MSCC_GPIO_INTR_IDENT 0x1c
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-#define MSCC_GPIO_ALT0 0x20
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-#define MSCC_GPIO_ALT1 0x24
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+static void mscc_writel(unsigned int offset, void *addr)
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+{
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+ if (offset < 32)
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+ writel(BIT(offset), addr);
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+ else
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+ writel(BIT(offset % 32), addr + 4);
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+}
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+
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+static unsigned int mscc_readl(unsigned int offset, void *addr)
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+{
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+ if (offset < 32)
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+ return readl(addr);
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+ else
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+ return readl(addr + 4);
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+}
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+
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+static void mscc_setbits(unsigned int offset, void *addr)
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+{
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+ if (offset < 32)
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+ writel(readl(addr) | BIT(offset), addr);
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+ else
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+ writel(readl(addr + 4) | BIT(offset % 32), addr + 4);
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+}
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+
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+static void mscc_clrbits(unsigned int offset, void *addr)
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+{
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+ if (offset < 32)
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+ writel(readl(addr) & ~BIT(offset), addr);
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+ else
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+ writel(readl(addr + 4) & ~BIT(offset % 32), addr + 4);
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+}
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static int mscc_get_functions_count(struct udevice *dev)
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{
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@@ -67,7 +88,7 @@ static int mscc_pinmux_set_mux(struct udevice *dev,
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{
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struct mscc_pinctrl *info = dev_get_priv(dev);
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struct mscc_pin_caps *pin = info->mscc_pins[pin_selector].drv_data;
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- int f;
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+ int f, offset, regoff;
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f = mscc_pin_function_idx(pin_selector, selector, info->mscc_pins);
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if (f < 0)
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@@ -79,15 +100,22 @@ static int mscc_pinmux_set_mux(struct udevice *dev,
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* This is racy because both registers can't be updated at the same time
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* but it doesn't matter much for now.
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*/
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+ offset = pin->pin;
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+ regoff = info->mscc_gpios[MSCC_GPIO_ALT0];
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+ if (offset >= 32) {
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+ offset = offset % 32;
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+ regoff = info->mscc_gpios[MSCC_GPIO_ALT1];
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+ }
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+
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if (f & BIT(0))
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- setbits_le32(info->regs + MSCC_GPIO_ALT0, BIT(pin->pin));
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+ mscc_setbits(offset, info->regs + regoff);
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else
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- clrbits_le32(info->regs + MSCC_GPIO_ALT0, BIT(pin->pin));
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+ mscc_clrbits(offset, info->regs + regoff);
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if (f & BIT(1))
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- setbits_le32(info->regs + MSCC_GPIO_ALT1, BIT(pin->pin - 1));
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+ mscc_setbits(offset, info->regs + regoff + 4);
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else
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- clrbits_le32(info->regs + MSCC_GPIO_ALT1, BIT(pin->pin - 1));
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+ mscc_clrbits(offset, info->regs + regoff + 4);
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return 0;
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}
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@@ -120,8 +148,8 @@ static int mscc_create_group_func_map(struct udevice *dev,
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}
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info->func[f].ngroups = npins;
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- info->func[f].groups = devm_kzalloc(dev, npins *
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- sizeof(char *), GFP_KERNEL);
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+ info->func[f].groups = devm_kzalloc(dev, npins * sizeof(char *),
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+ GFP_KERNEL);
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if (!info->func[f].groups)
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return -ENOMEM;
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@@ -150,9 +178,15 @@ static int mscc_gpio_get(struct udevice *dev, unsigned int offset)
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struct mscc_pinctrl *info = dev_get_priv(dev->parent);
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unsigned int val;
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- val = readl(info->regs + MSCC_GPIO_IN);
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+ if (mscc_readl(offset, info->regs + info->mscc_gpios[MSCC_GPIO_OE]) &
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+ BIT(offset % 32))
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+ val = mscc_readl(offset,
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+ info->regs + info->mscc_gpios[MSCC_GPIO_OUT]);
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+ else
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+ val = mscc_readl(offset,
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+ info->regs + info->mscc_gpios[MSCC_GPIO_IN]);
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- return !!(val & BIT(offset));
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+ return !!(val & BIT(offset % 32));
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}
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static int mscc_gpio_set(struct udevice *dev, unsigned int offset, int value)
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@@ -160,9 +194,11 @@ static int mscc_gpio_set(struct udevice *dev, unsigned int offset, int value)
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struct mscc_pinctrl *info = dev_get_priv(dev->parent);
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if (value)
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- writel(BIT(offset), info->regs + MSCC_GPIO_OUT_SET);
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+ mscc_writel(offset,
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+ info->regs + info->mscc_gpios[MSCC_GPIO_OUT_SET]);
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else
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- writel(BIT(offset), info->regs + MSCC_GPIO_OUT_CLR);
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+ mscc_writel(offset,
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+ info->regs + info->mscc_gpios[MSCC_GPIO_OUT_CLR]);
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return 0;
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}
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@@ -172,16 +208,16 @@ static int mscc_gpio_get_direction(struct udevice *dev, unsigned int offset)
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struct mscc_pinctrl *info = dev_get_priv(dev->parent);
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unsigned int val;
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- val = readl(info->regs + MSCC_GPIO_OE);
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+ val = mscc_readl(offset, info->regs + info->mscc_gpios[MSCC_GPIO_OE]);
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- return (val & BIT(offset)) ? GPIOF_OUTPUT : GPIOF_INPUT;
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+ return (val & BIT(offset % 32)) ? GPIOF_OUTPUT : GPIOF_INPUT;
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}
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static int mscc_gpio_direction_input(struct udevice *dev, unsigned int offset)
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{
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struct mscc_pinctrl *info = dev_get_priv(dev->parent);
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- clrbits_le32(info->regs + MSCC_GPIO_OE, BIT(offset));
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+ mscc_clrbits(offset, info->regs + info->mscc_gpios[MSCC_GPIO_OE]);
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return 0;
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}
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@@ -191,7 +227,7 @@ static int mscc_gpio_direction_output(struct udevice *dev,
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{
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struct mscc_pinctrl *info = dev_get_priv(dev->parent);
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- setbits_le32(info->regs + MSCC_GPIO_OE, BIT(offset));
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+ mscc_setbits(offset, info->regs + info->mscc_gpios[MSCC_GPIO_OE]);
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return mscc_gpio_set(dev, offset, value);
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}
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@@ -215,7 +251,8 @@ const struct pinctrl_ops mscc_pinctrl_ops = {
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int mscc_pinctrl_probe(struct udevice *dev, int num_func,
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const struct mscc_pin_data *mscc_pins, int num_pins,
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- char *const *function_names)
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+ char * const *function_names,
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+ const unsigned long *mscc_gpios)
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{
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struct mscc_pinctrl *priv = dev_get_priv(dev);
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int ret;
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@@ -230,6 +267,7 @@ int mscc_pinctrl_probe(struct udevice *dev, int num_func,
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priv->mscc_pins = mscc_pins;
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priv->num_pins = num_pins;
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priv->function_names = function_names;
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+ priv->mscc_gpios = mscc_gpios;
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ret = mscc_pinctrl_register(dev, priv);
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return ret;
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