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rockchip: rk3399: split roc-pc-rk3399 out of evb_rk3399

roc-pc-rk3399 board has one user button & three user LED's. Currently
we don't have any code support for these devices. Since button and LED's are
specific to roc-pc-rk3399 board, split it into its own board file and add code
support here.

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Suniel Mahesh 4 years ago
parent
commit
01892d230d

+ 20 - 0
arch/arm/mach-rockchip/rk3399/Kconfig

@@ -81,6 +81,25 @@ config TARGET_ROCKPRO64_RK3399
 	   * GPIO expansion ports
 	   * DC 12V/2A
 
+config TARGET_ROC_PC_RK3399
+	bool "Firefly ROC-RK3399-PC board"
+	help
+	  ROC-RK3399-PC is SBC produced by Firefly. Key features:
+
+	   * Rockchip RK3399
+	   * 4GB Dual-Channel LPDDR4 64-bit
+	   * SD card slot
+	   * eMMC socket
+	   * 16MB SPI Flash
+	   * Gigabit ethernet
+	   * PCIe
+	   * HDMI In/Out, DP, MIPI DSI/CSI, eDP
+	   * USB 3.0, 2.0
+	   * USB Type C power and data
+	   * GPIO expansion ports
+	   * wide voltage input(5V-15V), dual cell battery
+	   * Wifi/BT accessible via expansion board M.2
+
 endchoice
 
 config ROCKCHIP_BOOT_MODE_REG
@@ -128,5 +147,6 @@ source "board/theobroma-systems/puma_rk3399/Kconfig"
 source "board/vamrs/rock960_rk3399/Kconfig"
 source "board/google/gru/Kconfig"
 source "board/pine64/rockpro64_rk3399/Kconfig"
+source "board/firefly/roc-pc-rk3399/Kconfig"
 
 endif

+ 16 - 0
board/firefly/roc-pc-rk3399/Kconfig

@@ -0,0 +1,16 @@
+if TARGET_ROC_PC_RK3399
+
+config SYS_BOARD
+        default "roc-pc-rk3399"
+
+config SYS_VENDOR
+        default "firefly"
+
+config SYS_CONFIG_NAME
+        default "roc-pc-rk3399"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+        def_bool y
+
+endif
+

+ 6 - 0
board/firefly/roc-pc-rk3399/MAINTAINERS

@@ -0,0 +1,6 @@
+ROC-RK3399-PC
+M:	Levin Du <djw@t-chip.com.cn>
+S:	Maintained
+F:	board/firefly/roc-pc-rk3399
+F:	include/configs/roc-pc-rk3399.h
+F:	configs/roc-pc-rk3399_defconfig

+ 7 - 0
board/firefly/roc-pc-rk3399/Makefile

@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2016 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= roc-pc-rk3399.o

+ 29 - 0
board/firefly/roc-pc-rk3399/roc-pc-rk3399.c

@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/arch-rockchip/periph.h>
+#include <power/regulator.h>
+
+#ifndef CONFIG_SPL_BUILD
+int board_early_init_f(void)
+{
+	struct udevice *regulator;
+	int ret;
+
+	ret = regulator_get_by_platname("vcc5v0_host", &regulator);
+	if (ret) {
+		debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
+		goto out;
+	}
+
+	ret = regulator_set_enable(regulator, true);
+	if (ret)
+		debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret);
+out:
+	return 0;
+}
+#endif

+ 0 - 6
board/rockchip/evb_rk3399/MAINTAINERS

@@ -55,12 +55,6 @@ F:	configs/orangepi-rk3399_defconfig
 F:	arch/arm/dts/rk3399-u-boot.dtsi
 F:	arch/arm/dts/rk3399-orangepi-u-boot.dtsi
 
-ROC-RK3399-PC
-M:	Levin Du <djw@t-chip.com.cn>
-S:	Maintained
-F:	configs/roc-pc-rk3399_defconfig
-F:	arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
-
 ROCK-PI-4
 M:	Akash Gajjar <akash@openedev.com>
 M:	Jagan Teki <jagan@amarulasolutions.com>

+ 1 - 0
configs/roc-pc-rk3399_defconfig

@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_TEXT_BASE=0x00200000
 CONFIG_ENV_OFFSET=0x3F8000
 CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_ROC_PC_RK3399=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000

+ 22 - 0
include/configs/roc-pc-rk3399.h

@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __ROC_PC_RK3399_H
+#define __ROC_PC_RK3399_H
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdin=serial,cros-ec-keyb\0" \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
+#include <configs/rk3399_common.h>
+
+#if defined(CONFIG_ENV_IS_IN_MMC)
+# define CONFIG_SYS_MMC_ENV_DEV		0
+#endif
+
+#define SDRAM_BANK_SIZE			(2UL << 30)
+
+#endif