memory.c 35 KB

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  1. /*
  2. * memory handling
  3. * (c) Copyright Dave, 2004
  4. * (C) notaz, 2006-2010
  5. *
  6. * This work is licensed under the terms of MAME license.
  7. * See COPYING file in the top-level directory.
  8. */
  9. #include "pico_int.h"
  10. #include "memory.h"
  11. #include "sound/ym2612.h"
  12. #include "sound/sn76496.h"
  13. extern unsigned int lastSSRamWrite; // used by serial eeprom code
  14. uptr m68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];
  15. uptr m68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];
  16. uptr m68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];
  17. uptr m68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];
  18. static void xmap_set(uptr *map, int shift, int start_addr, int end_addr,
  19. const void *func_or_mh, int is_func)
  20. {
  21. #ifdef __clang__
  22. // workaround bug (segfault) in
  23. // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)
  24. volatile
  25. #endif
  26. uptr addr = (uptr)func_or_mh;
  27. int mask = (1 << shift) - 1;
  28. int i;
  29. if ((start_addr & mask) != 0 || (end_addr & mask) != mask) {
  30. elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: tried to map bad range: %06x-%06x",
  31. start_addr, end_addr);
  32. return;
  33. }
  34. if (addr & 1) {
  35. elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: ptr is not aligned: %08lx", addr);
  36. return;
  37. }
  38. if (!is_func)
  39. addr -= start_addr;
  40. for (i = start_addr >> shift; i <= end_addr >> shift; i++) {
  41. map[i] = addr >> 1;
  42. if (is_func)
  43. map[i] |= MAP_FLAG;
  44. }
  45. }
  46. void z80_map_set(uptr *map, int start_addr, int end_addr,
  47. const void *func_or_mh, int is_func)
  48. {
  49. xmap_set(map, Z80_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);
  50. }
  51. void cpu68k_map_set(uptr *map, int start_addr, int end_addr,
  52. const void *func_or_mh, int is_func)
  53. {
  54. xmap_set(map, M68K_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);
  55. }
  56. // more specialized/optimized function (does same as above)
  57. void cpu68k_map_all_ram(int start_addr, int end_addr, void *ptr, int is_sub)
  58. {
  59. uptr *r8map, *r16map, *w8map, *w16map;
  60. uptr addr = (uptr)ptr;
  61. int shift = M68K_MEM_SHIFT;
  62. int i;
  63. if (!is_sub) {
  64. r8map = m68k_read8_map;
  65. r16map = m68k_read16_map;
  66. w8map = m68k_write8_map;
  67. w16map = m68k_write16_map;
  68. } else {
  69. r8map = s68k_read8_map;
  70. r16map = s68k_read16_map;
  71. w8map = s68k_write8_map;
  72. w16map = s68k_write16_map;
  73. }
  74. addr -= start_addr;
  75. addr >>= 1;
  76. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  77. r8map[i] = r16map[i] = w8map[i] = w16map[i] = addr;
  78. }
  79. static u32 m68k_unmapped_read8(u32 a)
  80. {
  81. elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
  82. return 0; // assume pulldown, as if MegaCD2 was attached
  83. }
  84. static u32 m68k_unmapped_read16(u32 a)
  85. {
  86. elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);
  87. return 0;
  88. }
  89. static void m68k_unmapped_write8(u32 a, u32 d)
  90. {
  91. elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
  92. }
  93. static void m68k_unmapped_write16(u32 a, u32 d)
  94. {
  95. elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
  96. }
  97. void m68k_map_unmap(int start_addr, int end_addr)
  98. {
  99. #ifdef __clang__
  100. // workaround bug (segfault) in
  101. // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)
  102. volatile
  103. #endif
  104. uptr addr;
  105. int shift = M68K_MEM_SHIFT;
  106. int i;
  107. addr = (uptr)m68k_unmapped_read8;
  108. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  109. m68k_read8_map[i] = (addr >> 1) | MAP_FLAG;
  110. addr = (uptr)m68k_unmapped_read16;
  111. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  112. m68k_read16_map[i] = (addr >> 1) | MAP_FLAG;
  113. addr = (uptr)m68k_unmapped_write8;
  114. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  115. m68k_write8_map[i] = (addr >> 1) | MAP_FLAG;
  116. addr = (uptr)m68k_unmapped_write16;
  117. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  118. m68k_write16_map[i] = (addr >> 1) | MAP_FLAG;
  119. }
  120. MAKE_68K_READ8(m68k_read8, m68k_read8_map)
  121. MAKE_68K_READ16(m68k_read16, m68k_read16_map)
  122. MAKE_68K_READ32(m68k_read32, m68k_read16_map)
  123. MAKE_68K_WRITE8(m68k_write8, m68k_write8_map)
  124. MAKE_68K_WRITE16(m68k_write16, m68k_write16_map)
  125. MAKE_68K_WRITE32(m68k_write32, m68k_write16_map)
  126. // -----------------------------------------------------------------
  127. static u32 ym2612_read_local_68k(void);
  128. static int ym2612_write_local(u32 a, u32 d, int is_from_z80);
  129. static void z80_mem_setup(void);
  130. #ifdef _ASM_MEMORY_C
  131. u32 PicoRead8_sram(u32 a);
  132. u32 PicoRead16_sram(u32 a);
  133. #endif
  134. #ifdef EMU_CORE_DEBUG
  135. u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};
  136. int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;
  137. extern unsigned int ppop;
  138. #endif
  139. #ifdef IO_STATS
  140. void log_io(unsigned int addr, int bits, int rw);
  141. #elif defined(_MSC_VER)
  142. #define log_io
  143. #else
  144. #define log_io(...)
  145. #endif
  146. #if defined(EMU_C68K)
  147. void cyclone_crashed(u32 pc, struct Cyclone *context)
  148. {
  149. elprintf(EL_STATUS|EL_ANOMALY, "%c68k crash detected @ %06x",
  150. context == &PicoCpuCM68k ? 'm' : 's', pc);
  151. context->membase = (u32)Pico.rom;
  152. context->pc = (u32)Pico.rom + Pico.romsize;
  153. }
  154. #endif
  155. // -----------------------------------------------------------------
  156. // memmap helpers
  157. static u32 read_pad_3btn(int i, u32 out_bits)
  158. {
  159. u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU
  160. u32 value;
  161. if (out_bits & 0x40) // TH
  162. value = pad & 0x3f; // ?1CB RLDU
  163. else
  164. value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU
  165. value |= out_bits & 0x40;
  166. return value;
  167. }
  168. static u32 read_pad_6btn(int i, u32 out_bits)
  169. {
  170. u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU
  171. int phase = Pico.m.padTHPhase[i];
  172. u32 value;
  173. if (phase == 2 && !(out_bits & 0x40)) {
  174. value = (pad & 0xc0) >> 2; // ?0SA 0000
  175. goto out;
  176. }
  177. else if(phase == 3) {
  178. if (out_bits & 0x40)
  179. return (pad & 0x30) | ((pad >> 8) & 0xf); // ?1CB MXYZ
  180. else
  181. return ((pad & 0xc0) >> 2) | 0x0f; // ?0SA 1111
  182. goto out;
  183. }
  184. if (out_bits & 0x40) // TH
  185. value = pad & 0x3f; // ?1CB RLDU
  186. else
  187. value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU
  188. out:
  189. value |= out_bits & 0x40;
  190. return value;
  191. }
  192. static u32 read_nothing(int i, u32 out_bits)
  193. {
  194. return 0xff;
  195. }
  196. typedef u32 (port_read_func)(int index, u32 out_bits);
  197. static port_read_func *port_readers[3] = {
  198. read_pad_3btn,
  199. read_pad_3btn,
  200. read_nothing
  201. };
  202. static NOINLINE u32 port_read(int i)
  203. {
  204. u32 data_reg = Pico.ioports[i + 1];
  205. u32 ctrl_reg = Pico.ioports[i + 4] | 0x80;
  206. u32 in, out;
  207. out = data_reg & ctrl_reg;
  208. out |= 0x7f & ~ctrl_reg; // pull-ups
  209. in = port_readers[i](i, out);
  210. return (in & ~ctrl_reg) | (data_reg & ctrl_reg);
  211. }
  212. void PicoSetInputDevice(int port, enum input_device device)
  213. {
  214. port_read_func *func;
  215. if (port < 0 || port > 2)
  216. return;
  217. switch (device) {
  218. case PICO_INPUT_PAD_3BTN:
  219. func = read_pad_3btn;
  220. break;
  221. case PICO_INPUT_PAD_6BTN:
  222. func = read_pad_6btn;
  223. break;
  224. default:
  225. func = read_nothing;
  226. break;
  227. }
  228. port_readers[port] = func;
  229. }
  230. NOINLINE u32 io_ports_read(u32 a)
  231. {
  232. u32 d;
  233. a = (a>>1) & 0xf;
  234. switch (a) {
  235. case 0: d = Pico.m.hardware; break; // Hardware value (Version register)
  236. case 1: d = port_read(0); break;
  237. case 2: d = port_read(1); break;
  238. case 3: d = port_read(2); break;
  239. default: d = Pico.ioports[a]; break; // IO ports can be used as RAM
  240. }
  241. return d;
  242. }
  243. NOINLINE void io_ports_write(u32 a, u32 d)
  244. {
  245. a = (a>>1) & 0xf;
  246. // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
  247. if (1 <= a && a <= 2)
  248. {
  249. Pico.m.padDelay[a - 1] = 0;
  250. if (!(Pico.ioports[a] & 0x40) && (d & 0x40))
  251. Pico.m.padTHPhase[a - 1]++;
  252. }
  253. // certain IO ports can be used as RAM
  254. Pico.ioports[a] = d;
  255. }
  256. // lame..
  257. static int z80_cycles_from_68k(void)
  258. {
  259. return z80_cycle_aim
  260. + cycles_68k_to_z80(SekCyclesDone() - last_z80_sync);
  261. }
  262. void NOINLINE ctl_write_z80busreq(u32 d)
  263. {
  264. d&=1; d^=1;
  265. elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);
  266. if (d ^ Pico.m.z80Run)
  267. {
  268. if (d)
  269. {
  270. z80_cycle_cnt = z80_cycles_from_68k();
  271. }
  272. else
  273. {
  274. if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset) {
  275. pprof_start(m68k);
  276. PicoSyncZ80(SekCyclesDone());
  277. pprof_end_sub(m68k);
  278. }
  279. }
  280. Pico.m.z80Run = d;
  281. }
  282. }
  283. void NOINLINE ctl_write_z80reset(u32 d)
  284. {
  285. d&=1; d^=1;
  286. elprintf(EL_BUSREQ, "set_zreset: %i->%i [%i] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);
  287. if (d ^ Pico.m.z80_reset)
  288. {
  289. if (d)
  290. {
  291. if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run) {
  292. pprof_start(m68k);
  293. PicoSyncZ80(SekCyclesDone());
  294. pprof_end_sub(m68k);
  295. }
  296. YM2612ResetChip();
  297. timers_reset();
  298. }
  299. else
  300. {
  301. z80_cycle_cnt = z80_cycles_from_68k();
  302. z80_reset();
  303. }
  304. Pico.m.z80_reset = d;
  305. }
  306. }
  307. // -----------------------------------------------------------------
  308. #ifndef _ASM_MEMORY_C
  309. // cart (save) RAM area (usually 0x200000 - ...)
  310. static u32 PicoRead8_sram(u32 a)
  311. {
  312. u32 d;
  313. if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))
  314. {
  315. if (SRam.flags & SRF_EEPROM) {
  316. d = EEPROM_read();
  317. if (!(a & 1))
  318. d >>= 8;
  319. } else
  320. d = *(u8 *)(SRam.data - SRam.start + a);
  321. elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);
  322. return d;
  323. }
  324. // XXX: this is banking unfriendly
  325. if (a < Pico.romsize)
  326. return Pico.rom[a ^ 1];
  327. return m68k_unmapped_read8(a);
  328. }
  329. static u32 PicoRead16_sram(u32 a)
  330. {
  331. u32 d;
  332. if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))
  333. {
  334. if (SRam.flags & SRF_EEPROM)
  335. d = EEPROM_read();
  336. else {
  337. u8 *pm = (u8 *)(SRam.data - SRam.start + a);
  338. d = pm[0] << 8;
  339. d |= pm[1];
  340. }
  341. elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);
  342. return d;
  343. }
  344. if (a < Pico.romsize)
  345. return *(u16 *)(Pico.rom + a);
  346. return m68k_unmapped_read16(a);
  347. }
  348. #endif // _ASM_MEMORY_C
  349. static void PicoWrite8_sram(u32 a, u32 d)
  350. {
  351. if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {
  352. m68k_unmapped_write8(a, d);
  353. return;
  354. }
  355. elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d & 0xff, SekPc);
  356. if (SRam.flags & SRF_EEPROM)
  357. {
  358. EEPROM_write8(a, d);
  359. }
  360. else {
  361. u8 *pm = (u8 *)(SRam.data - SRam.start + a);
  362. if (*pm != (u8)d) {
  363. SRam.changed = 1;
  364. *pm = (u8)d;
  365. }
  366. }
  367. }
  368. static void PicoWrite16_sram(u32 a, u32 d)
  369. {
  370. if (a > SRam.end || a < SRam.start || !(Pico.m.sram_reg & SRR_MAPPED)) {
  371. m68k_unmapped_write16(a, d);
  372. return;
  373. }
  374. elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d & 0xffff, SekPc);
  375. if (SRam.flags & SRF_EEPROM)
  376. {
  377. EEPROM_write16(d);
  378. }
  379. else {
  380. // XXX: hardware could easily use MSB too..
  381. u8 *pm = (u8 *)(SRam.data - SRam.start + a);
  382. if (*pm != (u8)d) {
  383. SRam.changed = 1;
  384. *pm = (u8)d;
  385. }
  386. }
  387. }
  388. // z80 area (0xa00000 - 0xa0ffff)
  389. // TODO: verify mirrors VDP and bank reg (bank area mirroring verified)
  390. static u32 PicoRead8_z80(u32 a)
  391. {
  392. u32 d = 0xff;
  393. if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {
  394. elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);
  395. // open bus. Pulled down if MegaCD2 is attached.
  396. return 0;
  397. }
  398. if ((a & 0x4000) == 0x0000)
  399. d = Pico.zram[a & 0x1fff];
  400. else if ((a & 0x6000) == 0x4000) // 0x4000-0x5fff
  401. d = ym2612_read_local_68k();
  402. else
  403. elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
  404. return d;
  405. }
  406. static u32 PicoRead16_z80(u32 a)
  407. {
  408. u32 d = PicoRead8_z80(a);
  409. return d | (d << 8);
  410. }
  411. static void PicoWrite8_z80(u32 a, u32 d)
  412. {
  413. if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {
  414. // verified on real hw
  415. elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);
  416. return;
  417. }
  418. if ((a & 0x4000) == 0x0000) { // z80 RAM
  419. SekCyclesBurnRun(2); // FIXME hack
  420. Pico.zram[a & 0x1fff] = (u8)d;
  421. return;
  422. }
  423. if ((a & 0x6000) == 0x4000) { // FM Sound
  424. if (PicoOpt & POPT_EN_FM)
  425. emustatus |= ym2612_write_local(a&3, d&0xff, 0)&1;
  426. return;
  427. }
  428. // TODO: probably other VDP access too? Maybe more mirrors?
  429. if ((a & 0x7ff9) == 0x7f11) { // PSG Sound
  430. if (PicoOpt & POPT_EN_PSG)
  431. SN76496Write(d);
  432. return;
  433. }
  434. if ((a & 0x7f00) == 0x6000) // Z80 BANK register
  435. {
  436. Pico.m.z80_bank68k >>= 1;
  437. Pico.m.z80_bank68k |= d << 8;
  438. Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one
  439. elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k << 15);
  440. return;
  441. }
  442. elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @ %06x", a, d&0xff, SekPc);
  443. }
  444. static void PicoWrite16_z80(u32 a, u32 d)
  445. {
  446. // for RAM, only most significant byte is sent
  447. // TODO: verify remaining accesses
  448. PicoWrite8_z80(a, d >> 8);
  449. }
  450. #ifndef _ASM_MEMORY_C
  451. // IO/control area (0xa10000 - 0xa1ffff)
  452. u32 PicoRead8_io(u32 a)
  453. {
  454. u32 d;
  455. if ((a & 0xffe0) == 0x0000) { // I/O ports
  456. d = io_ports_read(a);
  457. goto end;
  458. }
  459. // faking open bus (MegaCD pulldowns don't work here curiously)
  460. d = Pico.m.rotate++;
  461. d ^= d << 6;
  462. if ((a & 0xfc00) == 0x1000) {
  463. // bit8 seems to be readable in this range
  464. if (!(a & 1))
  465. d &= ~0x01;
  466. if ((a & 0xff01) == 0x1100) { // z80 busreq (verified)
  467. d |= (Pico.m.z80Run | Pico.m.z80_reset) & 1;
  468. elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d, SekCyclesDone(), SekPc);
  469. }
  470. goto end;
  471. }
  472. if (PicoOpt & POPT_EN_32X) {
  473. d = PicoRead8_32x(a);
  474. goto end;
  475. }
  476. d = m68k_unmapped_read8(a);
  477. end:
  478. return d;
  479. }
  480. u32 PicoRead16_io(u32 a)
  481. {
  482. u32 d;
  483. if ((a & 0xffe0) == 0x0000) { // I/O ports
  484. d = io_ports_read(a);
  485. d |= d << 8;
  486. goto end;
  487. }
  488. // faking open bus
  489. d = (Pico.m.rotate += 0x41);
  490. d ^= (d << 5) ^ (d << 8);
  491. // bit8 seems to be readable in this range
  492. if ((a & 0xfc00) == 0x1000) {
  493. d &= ~0x0100;
  494. if ((a & 0xff00) == 0x1100) { // z80 busreq
  495. d |= ((Pico.m.z80Run | Pico.m.z80_reset) & 1) << 8;
  496. elprintf(EL_BUSREQ, "get_zrun: %04x [%i] @%06x", d, SekCyclesDone(), SekPc);
  497. }
  498. goto end;
  499. }
  500. if (PicoOpt & POPT_EN_32X) {
  501. d = PicoRead16_32x(a);
  502. goto end;
  503. }
  504. d = m68k_unmapped_read16(a);
  505. end:
  506. return d;
  507. }
  508. void PicoWrite8_io(u32 a, u32 d)
  509. {
  510. if ((a & 0xffe1) == 0x0001) { // I/O ports (verified: only LSB!)
  511. io_ports_write(a, d);
  512. return;
  513. }
  514. if ((a & 0xff01) == 0x1100) { // z80 busreq
  515. ctl_write_z80busreq(d);
  516. return;
  517. }
  518. if ((a & 0xff01) == 0x1200) { // z80 reset
  519. ctl_write_z80reset(d);
  520. return;
  521. }
  522. if (a == 0xa130f1) { // sram access register
  523. elprintf(EL_SRAMIO, "sram reg=%02x", d);
  524. Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);
  525. Pico.m.sram_reg |= (u8)(d & 3);
  526. return;
  527. }
  528. if (PicoOpt & POPT_EN_32X) {
  529. PicoWrite8_32x(a, d);
  530. return;
  531. }
  532. m68k_unmapped_write8(a, d);
  533. }
  534. void PicoWrite16_io(u32 a, u32 d)
  535. {
  536. if ((a & 0xffe0) == 0x0000) { // I/O ports (verified: only LSB!)
  537. io_ports_write(a, d);
  538. return;
  539. }
  540. if ((a & 0xff00) == 0x1100) { // z80 busreq
  541. ctl_write_z80busreq(d >> 8);
  542. return;
  543. }
  544. if ((a & 0xff00) == 0x1200) { // z80 reset
  545. ctl_write_z80reset(d >> 8);
  546. return;
  547. }
  548. if (a == 0xa130f0) { // sram access register
  549. elprintf(EL_SRAMIO, "sram reg=%02x", d);
  550. Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);
  551. Pico.m.sram_reg |= (u8)(d & 3);
  552. return;
  553. }
  554. if (PicoOpt & POPT_EN_32X) {
  555. PicoWrite16_32x(a, d);
  556. return;
  557. }
  558. m68k_unmapped_write16(a, d);
  559. }
  560. #endif // _ASM_MEMORY_C
  561. // VDP area (0xc00000 - 0xdfffff)
  562. // TODO: verify if lower byte goes to PSG on word writes
  563. static u32 PicoRead8_vdp(u32 a)
  564. {
  565. if ((a & 0x00e0) == 0x0000)
  566. return PicoVideoRead8(a);
  567. elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
  568. return 0;
  569. }
  570. static u32 PicoRead16_vdp(u32 a)
  571. {
  572. if ((a & 0x00e0) == 0x0000)
  573. return PicoVideoRead(a);
  574. elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
  575. return 0;
  576. }
  577. static void PicoWrite8_vdp(u32 a, u32 d)
  578. {
  579. if ((a & 0x00f9) == 0x0011) { // PSG Sound
  580. if (PicoOpt & POPT_EN_PSG)
  581. SN76496Write(d);
  582. return;
  583. }
  584. if ((a & 0x00e0) == 0x0000) {
  585. d &= 0xff;
  586. PicoVideoWrite(a, d | (d << 8));
  587. return;
  588. }
  589. elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @%06x", a, d & 0xff, SekPc);
  590. }
  591. static void PicoWrite16_vdp(u32 a, u32 d)
  592. {
  593. if ((a & 0x00f9) == 0x0010) { // PSG Sound
  594. if (PicoOpt & POPT_EN_PSG)
  595. SN76496Write(d);
  596. return;
  597. }
  598. if ((a & 0x00e0) == 0x0000) {
  599. PicoVideoWrite(a, d);
  600. return;
  601. }
  602. elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %04x @%06x", a, d & 0xffff, SekPc);
  603. }
  604. // -----------------------------------------------------------------
  605. #ifdef EMU_M68K
  606. static void m68k_mem_setup(void);
  607. #endif
  608. PICO_INTERNAL void PicoMemSetup(void)
  609. {
  610. int mask, rs, a;
  611. // setup the memory map
  612. cpu68k_map_set(m68k_read8_map, 0x000000, 0xffffff, m68k_unmapped_read8, 1);
  613. cpu68k_map_set(m68k_read16_map, 0x000000, 0xffffff, m68k_unmapped_read16, 1);
  614. cpu68k_map_set(m68k_write8_map, 0x000000, 0xffffff, m68k_unmapped_write8, 1);
  615. cpu68k_map_set(m68k_write16_map, 0x000000, 0xffffff, m68k_unmapped_write16, 1);
  616. // ROM
  617. // align to bank size. We know ROM loader allocated enough for this
  618. mask = (1 << M68K_MEM_SHIFT) - 1;
  619. rs = (Pico.romsize + mask) & ~mask;
  620. cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico.rom, 0);
  621. cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico.rom, 0);
  622. // Common case of on-cart (save) RAM, usually at 0x200000-...
  623. if ((SRam.flags & SRF_ENABLED) && SRam.data != NULL) {
  624. rs = SRam.end - SRam.start;
  625. rs = (rs + mask) & ~mask;
  626. if (SRam.start + rs >= 0x1000000)
  627. rs = 0x1000000 - SRam.start;
  628. cpu68k_map_set(m68k_read8_map, SRam.start, SRam.start + rs - 1, PicoRead8_sram, 1);
  629. cpu68k_map_set(m68k_read16_map, SRam.start, SRam.start + rs - 1, PicoRead16_sram, 1);
  630. cpu68k_map_set(m68k_write8_map, SRam.start, SRam.start + rs - 1, PicoWrite8_sram, 1);
  631. cpu68k_map_set(m68k_write16_map, SRam.start, SRam.start + rs - 1, PicoWrite16_sram, 1);
  632. }
  633. // Z80 region
  634. cpu68k_map_set(m68k_read8_map, 0xa00000, 0xa0ffff, PicoRead8_z80, 1);
  635. cpu68k_map_set(m68k_read16_map, 0xa00000, 0xa0ffff, PicoRead16_z80, 1);
  636. cpu68k_map_set(m68k_write8_map, 0xa00000, 0xa0ffff, PicoWrite8_z80, 1);
  637. cpu68k_map_set(m68k_write16_map, 0xa00000, 0xa0ffff, PicoWrite16_z80, 1);
  638. // IO/control region
  639. cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_io, 1);
  640. cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_io, 1);
  641. cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_io, 1);
  642. cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_io, 1);
  643. // VDP region
  644. for (a = 0xc00000; a < 0xe00000; a += 0x010000) {
  645. if ((a & 0xe700e0) != 0xc00000)
  646. continue;
  647. cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoRead8_vdp, 1);
  648. cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoRead16_vdp, 1);
  649. cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoWrite8_vdp, 1);
  650. cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoWrite16_vdp, 1);
  651. }
  652. // RAM and it's mirrors
  653. for (a = 0xe00000; a < 0x1000000; a += 0x010000) {
  654. cpu68k_map_set(m68k_read8_map, a, a + 0xffff, Pico.ram, 0);
  655. cpu68k_map_set(m68k_read16_map, a, a + 0xffff, Pico.ram, 0);
  656. cpu68k_map_set(m68k_write8_map, a, a + 0xffff, Pico.ram, 0);
  657. cpu68k_map_set(m68k_write16_map, a, a + 0xffff, Pico.ram, 0);
  658. }
  659. // Setup memory callbacks:
  660. #ifdef EMU_C68K
  661. PicoCpuCM68k.read8 = (void *)m68k_read8_map;
  662. PicoCpuCM68k.read16 = (void *)m68k_read16_map;
  663. PicoCpuCM68k.read32 = (void *)m68k_read16_map;
  664. PicoCpuCM68k.write8 = (void *)m68k_write8_map;
  665. PicoCpuCM68k.write16 = (void *)m68k_write16_map;
  666. PicoCpuCM68k.write32 = (void *)m68k_write16_map;
  667. PicoCpuCM68k.checkpc = NULL; /* unused */
  668. PicoCpuCM68k.fetch8 = NULL;
  669. PicoCpuCM68k.fetch16 = NULL;
  670. PicoCpuCM68k.fetch32 = NULL;
  671. #endif
  672. #ifdef EMU_F68K
  673. PicoCpuFM68k.read_byte = m68k_read8;
  674. PicoCpuFM68k.read_word = m68k_read16;
  675. PicoCpuFM68k.read_long = m68k_read32;
  676. PicoCpuFM68k.write_byte = m68k_write8;
  677. PicoCpuFM68k.write_word = m68k_write16;
  678. PicoCpuFM68k.write_long = m68k_write32;
  679. // setup FAME fetchmap
  680. {
  681. int i;
  682. // by default, point everything to first 64k of ROM
  683. for (i = 0; i < M68K_FETCHBANK1; i++)
  684. PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
  685. // now real ROM
  686. for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
  687. PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;
  688. // .. and RAM
  689. for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
  690. PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
  691. }
  692. #endif
  693. #ifdef EMU_M68K
  694. m68k_mem_setup();
  695. #endif
  696. z80_mem_setup();
  697. }
  698. #ifdef EMU_M68K
  699. unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;
  700. unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;
  701. unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL;
  702. void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;
  703. void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;
  704. void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;
  705. /* it appears that Musashi doesn't always mask the unused bits */
  706. unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }
  707. unsigned int m68k_read_memory_16(unsigned int address) { return pm68k_read_memory_16(address) & 0xffff; }
  708. unsigned int m68k_read_memory_32(unsigned int address) { return pm68k_read_memory_32(address); }
  709. void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }
  710. void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }
  711. void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }
  712. static void m68k_mem_setup(void)
  713. {
  714. pm68k_read_memory_8 = m68k_read8;
  715. pm68k_read_memory_16 = m68k_read16;
  716. pm68k_read_memory_32 = m68k_read32;
  717. pm68k_write_memory_8 = m68k_write8;
  718. pm68k_write_memory_16 = m68k_write16;
  719. pm68k_write_memory_32 = m68k_write32;
  720. }
  721. #endif // EMU_M68K
  722. // -----------------------------------------------------------------
  723. static int get_scanline(int is_from_z80)
  724. {
  725. if (is_from_z80) {
  726. int cycles = z80_cyclesDone();
  727. while (cycles - z80_scanline_cycles >= 228)
  728. z80_scanline++, z80_scanline_cycles += 228;
  729. return z80_scanline;
  730. }
  731. return Pico.m.scanline;
  732. }
  733. /* probably should not be in this file, but it's near related code here */
  734. void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new)
  735. {
  736. int xcycles = z80_cycles << 8;
  737. /* check for overflows */
  738. if ((mode_old & 4) && xcycles > timer_a_next_oflow)
  739. ym2612.OPN.ST.status |= 1;
  740. if ((mode_old & 8) && xcycles > timer_b_next_oflow)
  741. ym2612.OPN.ST.status |= 2;
  742. /* update timer a */
  743. if (mode_old & 1)
  744. while (xcycles > timer_a_next_oflow)
  745. timer_a_next_oflow += timer_a_step;
  746. if ((mode_old ^ mode_new) & 1) // turning on/off
  747. {
  748. if (mode_old & 1)
  749. timer_a_next_oflow = TIMER_NO_OFLOW;
  750. else
  751. timer_a_next_oflow = xcycles + timer_a_step;
  752. }
  753. if (mode_new & 1)
  754. elprintf(EL_YMTIMER, "timer a upd to %i @ %i", timer_a_next_oflow>>8, z80_cycles);
  755. /* update timer b */
  756. if (mode_old & 2)
  757. while (xcycles > timer_b_next_oflow)
  758. timer_b_next_oflow += timer_b_step;
  759. if ((mode_old ^ mode_new) & 2)
  760. {
  761. if (mode_old & 2)
  762. timer_b_next_oflow = TIMER_NO_OFLOW;
  763. else
  764. timer_b_next_oflow = xcycles + timer_b_step;
  765. }
  766. if (mode_new & 2)
  767. elprintf(EL_YMTIMER, "timer b upd to %i @ %i", timer_b_next_oflow>>8, z80_cycles);
  768. }
  769. // ym2612 DAC and timer I/O handlers for z80
  770. static int ym2612_write_local(u32 a, u32 d, int is_from_z80)
  771. {
  772. int addr;
  773. a &= 3;
  774. if (a == 1 && ym2612.OPN.ST.address == 0x2a) /* DAC data */
  775. {
  776. int scanline = get_scanline(is_from_z80);
  777. //elprintf(EL_STATUS, "%03i -> %03i dac w %08x z80 %i", PsndDacLine, scanline, d, is_from_z80);
  778. ym2612.dacout = ((int)d - 0x80) << 6;
  779. if (PsndOut && ym2612.dacen && scanline >= PsndDacLine)
  780. PsndDoDAC(scanline);
  781. return 0;
  782. }
  783. switch (a)
  784. {
  785. case 0: /* address port 0 */
  786. ym2612.OPN.ST.address = d;
  787. ym2612.addr_A1 = 0;
  788. #ifdef __GP2X__
  789. if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);
  790. #endif
  791. return 0;
  792. case 1: /* data port 0 */
  793. if (ym2612.addr_A1 != 0)
  794. return 0;
  795. addr = ym2612.OPN.ST.address;
  796. ym2612.REGS[addr] = d;
  797. switch (addr)
  798. {
  799. case 0x24: // timer A High 8
  800. case 0x25: { // timer A Low 2
  801. int TAnew = (addr == 0x24) ? ((ym2612.OPN.ST.TA & 0x03)|(((int)d)<<2))
  802. : ((ym2612.OPN.ST.TA & 0x3fc)|(d&3));
  803. if (ym2612.OPN.ST.TA != TAnew)
  804. {
  805. //elprintf(EL_STATUS, "timer a set %i", TAnew);
  806. ym2612.OPN.ST.TA = TAnew;
  807. //ym2612.OPN.ST.TAC = (1024-TAnew)*18;
  808. //ym2612.OPN.ST.TAT = 0;
  809. timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);
  810. if (ym2612.OPN.ST.mode & 1) {
  811. // this is not right, should really be done on overflow only
  812. int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();
  813. timer_a_next_oflow = (cycles << 8) + timer_a_step;
  814. }
  815. elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8);
  816. }
  817. return 0;
  818. }
  819. case 0x26: // timer B
  820. if (ym2612.OPN.ST.TB != d) {
  821. //elprintf(EL_STATUS, "timer b set %i", d);
  822. ym2612.OPN.ST.TB = d;
  823. //ym2612.OPN.ST.TBC = (256-d) * 288;
  824. //ym2612.OPN.ST.TBT = 0;
  825. timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800
  826. if (ym2612.OPN.ST.mode & 2) {
  827. int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();
  828. timer_b_next_oflow = (cycles << 8) + timer_b_step;
  829. }
  830. elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8);
  831. }
  832. return 0;
  833. case 0x27: { /* mode, timer control */
  834. int old_mode = ym2612.OPN.ST.mode;
  835. int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();
  836. ym2612.OPN.ST.mode = d;
  837. elprintf(EL_YMTIMER, "st mode %02x", d);
  838. ym2612_sync_timers(cycles, old_mode, d);
  839. /* reset Timer a flag */
  840. if (d & 0x10)
  841. ym2612.OPN.ST.status &= ~1;
  842. /* reset Timer b flag */
  843. if (d & 0x20)
  844. ym2612.OPN.ST.status &= ~2;
  845. if ((d ^ old_mode) & 0xc0) {
  846. #ifdef __GP2X__
  847. if (PicoOpt & POPT_EXT_FM) return YM2612Write_940(a, d, get_scanline(is_from_z80));
  848. #endif
  849. return 1;
  850. }
  851. return 0;
  852. }
  853. case 0x2b: { /* DAC Sel (YM2612) */
  854. int scanline = get_scanline(is_from_z80);
  855. ym2612.dacen = d & 0x80;
  856. if (d & 0x80) PsndDacLine = scanline;
  857. #ifdef __GP2X__
  858. if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, scanline);
  859. #endif
  860. return 0;
  861. }
  862. }
  863. break;
  864. case 2: /* address port 1 */
  865. ym2612.OPN.ST.address = d;
  866. ym2612.addr_A1 = 1;
  867. #ifdef __GP2X__
  868. if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);
  869. #endif
  870. return 0;
  871. case 3: /* data port 1 */
  872. if (ym2612.addr_A1 != 1)
  873. return 0;
  874. addr = ym2612.OPN.ST.address | 0x100;
  875. ym2612.REGS[addr] = d;
  876. break;
  877. }
  878. #ifdef __GP2X__
  879. if (PicoOpt & POPT_EXT_FM)
  880. return YM2612Write_940(a, d, get_scanline(is_from_z80));
  881. #endif
  882. return YM2612Write_(a, d);
  883. }
  884. #define ym2612_read_local() \
  885. if (xcycles >= timer_a_next_oflow) \
  886. ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 1; \
  887. if (xcycles >= timer_b_next_oflow) \
  888. ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2
  889. static u32 ym2612_read_local_z80(void)
  890. {
  891. int xcycles = z80_cyclesDone() << 8;
  892. ym2612_read_local();
  893. elprintf(EL_YMTIMER, "timer z80 read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,
  894. timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);
  895. return ym2612.OPN.ST.status;
  896. }
  897. static u32 ym2612_read_local_68k(void)
  898. {
  899. int xcycles = z80_cycles_from_68k() << 8;
  900. ym2612_read_local();
  901. elprintf(EL_YMTIMER, "timer 68k read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,
  902. timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);
  903. return ym2612.OPN.ST.status;
  904. }
  905. void ym2612_pack_state(void)
  906. {
  907. // timers are saved as tick counts, in 16.16 int format
  908. int tac, tat = 0, tbc, tbt = 0;
  909. tac = 1024 - ym2612.OPN.ST.TA;
  910. tbc = 256 - ym2612.OPN.ST.TB;
  911. if (timer_a_next_oflow != TIMER_NO_OFLOW)
  912. tat = (int)((double)(timer_a_step - timer_a_next_oflow) / (double)timer_a_step * tac * 65536);
  913. if (timer_b_next_oflow != TIMER_NO_OFLOW)
  914. tbt = (int)((double)(timer_b_step - timer_b_next_oflow) / (double)timer_b_step * tbc * 65536);
  915. elprintf(EL_YMTIMER, "save: timer a %i/%i", tat >> 16, tac);
  916. elprintf(EL_YMTIMER, "save: timer b %i/%i", tbt >> 16, tbc);
  917. #ifdef __GP2X__
  918. if (PicoOpt & POPT_EXT_FM)
  919. YM2612PicoStateSave2_940(tat, tbt);
  920. else
  921. #endif
  922. YM2612PicoStateSave2(tat, tbt);
  923. }
  924. void ym2612_unpack_state(void)
  925. {
  926. int i, ret, tac, tat, tbc, tbt;
  927. YM2612PicoStateLoad();
  928. // feed all the registers and update internal state
  929. for (i = 0x20; i < 0xA0; i++) {
  930. ym2612_write_local(0, i, 0);
  931. ym2612_write_local(1, ym2612.REGS[i], 0);
  932. }
  933. for (i = 0x30; i < 0xA0; i++) {
  934. ym2612_write_local(2, i, 0);
  935. ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
  936. }
  937. for (i = 0xAF; i >= 0xA0; i--) { // must apply backwards
  938. ym2612_write_local(2, i, 0);
  939. ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
  940. ym2612_write_local(0, i, 0);
  941. ym2612_write_local(1, ym2612.REGS[i], 0);
  942. }
  943. for (i = 0xB0; i < 0xB8; i++) {
  944. ym2612_write_local(0, i, 0);
  945. ym2612_write_local(1, ym2612.REGS[i], 0);
  946. ym2612_write_local(2, i, 0);
  947. ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
  948. }
  949. #ifdef __GP2X__
  950. if (PicoOpt & POPT_EXT_FM)
  951. ret = YM2612PicoStateLoad2_940(&tat, &tbt);
  952. else
  953. #endif
  954. ret = YM2612PicoStateLoad2(&tat, &tbt);
  955. if (ret != 0) {
  956. elprintf(EL_STATUS, "old ym2612 state");
  957. return; // no saved timers
  958. }
  959. tac = (1024 - ym2612.OPN.ST.TA) << 16;
  960. tbc = (256 - ym2612.OPN.ST.TB) << 16;
  961. if (ym2612.OPN.ST.mode & 1)
  962. timer_a_next_oflow = (int)((double)(tac - tat) / (double)tac * timer_a_step);
  963. else
  964. timer_a_next_oflow = TIMER_NO_OFLOW;
  965. if (ym2612.OPN.ST.mode & 2)
  966. timer_b_next_oflow = (int)((double)(tbc - tbt) / (double)tbc * timer_b_step);
  967. else
  968. timer_b_next_oflow = TIMER_NO_OFLOW;
  969. elprintf(EL_YMTIMER, "load: %i/%i, timer_a_next_oflow %i", tat>>16, tac>>16, timer_a_next_oflow >> 8);
  970. elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, timer_b_next_oflow >> 8);
  971. }
  972. #if defined(NO_32X) && defined(_ASM_MEMORY_C)
  973. // referenced by asm code
  974. u32 PicoRead8_32x(u32 a) { return 0; }
  975. u32 PicoRead16_32x(u32 a) { return 0; }
  976. void PicoWrite8_32x(u32 a, u32 d) {}
  977. void PicoWrite16_32x(u32 a, u32 d) {}
  978. #endif
  979. // -----------------------------------------------------------------
  980. // z80 memhandlers
  981. static unsigned char z80_md_vdp_read(unsigned short a)
  982. {
  983. // TODO?
  984. elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, 0xff);
  985. return 0xff;
  986. }
  987. static unsigned char z80_md_bank_read(unsigned short a)
  988. {
  989. unsigned int addr68k;
  990. unsigned char ret;
  991. addr68k = Pico.m.z80_bank68k<<15;
  992. addr68k += a & 0x7fff;
  993. ret = m68k_read8(addr68k);
  994. elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);
  995. return ret;
  996. }
  997. static void z80_md_ym2612_write(unsigned int a, unsigned char data)
  998. {
  999. if (PicoOpt & POPT_EN_FM)
  1000. emustatus |= ym2612_write_local(a, data, 1) & 1;
  1001. }
  1002. static void z80_md_vdp_br_write(unsigned int a, unsigned char data)
  1003. {
  1004. // TODO: allow full VDP access
  1005. if ((a&0xfff9) == 0x7f11) // 7f11 7f13 7f15 7f17
  1006. {
  1007. if (PicoOpt & POPT_EN_PSG)
  1008. SN76496Write(data);
  1009. return;
  1010. }
  1011. if ((a>>8) == 0x60)
  1012. {
  1013. Pico.m.z80_bank68k >>= 1;
  1014. Pico.m.z80_bank68k |= data << 8;
  1015. Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one
  1016. return;
  1017. }
  1018. elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);
  1019. }
  1020. static void z80_md_bank_write(unsigned int a, unsigned char data)
  1021. {
  1022. unsigned int addr68k;
  1023. addr68k = Pico.m.z80_bank68k << 15;
  1024. addr68k += a & 0x7fff;
  1025. elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);
  1026. m68k_write8(addr68k, data);
  1027. }
  1028. // -----------------------------------------------------------------
  1029. static unsigned char z80_md_in(unsigned short p)
  1030. {
  1031. elprintf(EL_ANOMALY, "Z80 port %04x read", p);
  1032. return 0xff;
  1033. }
  1034. static void z80_md_out(unsigned short p, unsigned char d)
  1035. {
  1036. elprintf(EL_ANOMALY, "Z80 port %04x write %02x", p, d);
  1037. }
  1038. static void z80_mem_setup(void)
  1039. {
  1040. z80_map_set(z80_read_map, 0x0000, 0x1fff, Pico.zram, 0);
  1041. z80_map_set(z80_read_map, 0x2000, 0x3fff, Pico.zram, 0);
  1042. z80_map_set(z80_read_map, 0x4000, 0x5fff, ym2612_read_local_z80, 1);
  1043. z80_map_set(z80_read_map, 0x6000, 0x7fff, z80_md_vdp_read, 1);
  1044. z80_map_set(z80_read_map, 0x8000, 0xffff, z80_md_bank_read, 1);
  1045. z80_map_set(z80_write_map, 0x0000, 0x1fff, Pico.zram, 0);
  1046. z80_map_set(z80_write_map, 0x2000, 0x3fff, Pico.zram, 0);
  1047. z80_map_set(z80_write_map, 0x4000, 0x5fff, z80_md_ym2612_write, 1);
  1048. z80_map_set(z80_write_map, 0x6000, 0x7fff, z80_md_vdp_br_write, 1);
  1049. z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write, 1);
  1050. #ifdef _USE_DRZ80
  1051. drZ80.z80_in = z80_md_in;
  1052. drZ80.z80_out = z80_md_out;
  1053. #endif
  1054. #ifdef _USE_CZ80
  1055. Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (FPTR)Pico.zram); // main RAM
  1056. Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (FPTR)Pico.zram); // mirror
  1057. Cz80_Set_INPort(&CZ80, z80_md_in);
  1058. Cz80_Set_OUTPort(&CZ80, z80_md_out);
  1059. #endif
  1060. }
  1061. // vim:shiftwidth=2:ts=2:expandtab