pico_int.h 37 KB

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  1. /*
  2. * PicoDrive - Internal Header File
  3. * (c) Copyright Dave, 2004
  4. * (C) notaz, 2006-2010
  5. *
  6. * This work is licensed under the terms of MAME license.
  7. * See COPYING file in the top-level directory.
  8. */
  9. #ifndef PICO_INTERNAL_INCLUDED
  10. #define PICO_INTERNAL_INCLUDED
  11. #include <stdio.h>
  12. #include <string.h>
  13. #include "pico_types.h"
  14. #include "pico_port.h"
  15. #include "pico.h"
  16. #include "carthw/carthw.h"
  17. //
  18. #define USE_POLL_DETECT
  19. #ifndef PICO_INTERNAL
  20. #define PICO_INTERNAL
  21. #endif
  22. #ifndef PICO_INTERNAL_ASM
  23. #define PICO_INTERNAL_ASM
  24. #endif
  25. // to select core, define EMU_C68K, EMU_M68K or EMU_F68K in your makefile or project
  26. #ifdef __cplusplus
  27. extern "C" {
  28. #endif
  29. // ----------------------- 68000 CPU -----------------------
  30. #ifdef EMU_C68K
  31. #include <cpu/cyclone/Cyclone.h>
  32. extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;
  33. #define SekCyclesLeft PicoCpuCM68k.cycles // cycles left for this run
  34. #define SekCyclesLeftS68k PicoCpuCS68k.cycles
  35. #define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase)
  36. #define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)
  37. #define SekDar(x) (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8])
  38. #define SekDarS68k(x) (x < 8 ? PicoCpuCS68k.d[x] : PicoCpuCS68k.a[x - 8])
  39. #define SekSr CycloneGetSr(&PicoCpuCM68k)
  40. #define SekSrS68k CycloneGetSr(&PicoCpuCS68k)
  41. #define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }
  42. #define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }
  43. #define SekIsStoppedM68k() (PicoCpuCM68k.state_flags&1)
  44. #define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1)
  45. #define SekShouldInterrupt() (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))
  46. #define SekNotPolling PicoCpuCM68k.not_pol
  47. #define SekNotPollingS68k PicoCpuCS68k.not_pol
  48. #define SekInterrupt(i) PicoCpuCM68k.irq=i
  49. #define SekIrqLevel PicoCpuCM68k.irq
  50. #endif
  51. #ifdef EMU_F68K
  52. #include <cpu/fame/fame.h>
  53. extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
  54. #define SekCyclesLeft PicoCpuFM68k.io_cycle_counter
  55. #define SekCyclesLeftS68k PicoCpuFS68k.io_cycle_counter
  56. #define SekPc fm68k_get_pc(&PicoCpuFM68k)
  57. #define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)
  58. #define SekDar(x) (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D)
  59. #define SekDarS68k(x) (x < 8 ? PicoCpuFS68k.dreg[x].D : PicoCpuFS68k.areg[x - 8].D)
  60. #define SekSr PicoCpuFM68k.sr
  61. #define SekSrS68k PicoCpuFS68k.sr
  62. #define SekSetStop(x) { \
  63. PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \
  64. if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \
  65. }
  66. #define SekSetStopS68k(x) { \
  67. PicoCpuFS68k.execinfo &= ~FM68K_HALTED; \
  68. if (x) { PicoCpuFS68k.execinfo |= FM68K_HALTED; PicoCpuFS68k.io_cycle_counter = 0; } \
  69. }
  70. #define SekIsStoppedM68k() (PicoCpuFM68k.execinfo&FM68K_HALTED)
  71. #define SekIsStoppedS68k() (PicoCpuFS68k.execinfo&FM68K_HALTED)
  72. #define SekShouldInterrupt() fm68k_would_interrupt(&PicoCpuFM68k)
  73. #define SekNotPolling PicoCpuFM68k.not_polling
  74. #define SekNotPollingS68k PicoCpuFS68k.not_polling
  75. #define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq
  76. #define SekIrqLevel PicoCpuFM68k.interrupts[0]
  77. #endif
  78. #ifdef EMU_M68K
  79. #include <cpu/musashi/m68kcpu.h>
  80. extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
  81. #ifndef SekCyclesLeft
  82. #define SekCyclesLeft PicoCpuMM68k.cyc_remaining_cycles
  83. #define SekCyclesLeftS68k PicoCpuMS68k.cyc_remaining_cycles
  84. #define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC)
  85. #define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC)
  86. #define SekDar(x) PicoCpuMM68k.dar[x]
  87. #define SekDarS68k(x) PicoCpuMS68k.dar[x]
  88. #define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR)
  89. #define SekSrS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_SR)
  90. #define SekSetStop(x) { \
  91. if(x) { PicoCpuMM68k.cyc_remaining_cycles = 0; PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \
  92. else PicoCpuMM68k.stopped=0; \
  93. }
  94. #define SekSetStopS68k(x) { \
  95. if(x) { PicoCpuMS68k.cyc_remaining_cycles = 0; PicoCpuMS68k.stopped=STOP_LEVEL_STOP; } \
  96. else PicoCpuMS68k.stopped=0; \
  97. }
  98. #define SekIsStoppedM68k() (PicoCpuMM68k.stopped==STOP_LEVEL_STOP)
  99. #define SekIsStoppedS68k() (PicoCpuMS68k.stopped==STOP_LEVEL_STOP)
  100. #define SekShouldInterrupt() (PicoCpuMM68k.int_level > PicoCpuMM68k.int_mask)
  101. #define SekNotPolling PicoCpuMM68k.not_polling
  102. #define SekNotPollingS68k PicoCpuMS68k.not_polling
  103. // avoid m68k_set_irq() for delaying to work
  104. #define SekInterrupt(irq) PicoCpuMM68k.int_level = (irq) << 8
  105. #define SekIrqLevel (PicoCpuMM68k.int_level >> 8)
  106. #endif
  107. #endif // EMU_M68K
  108. // number of cycles done (can be checked anywhere)
  109. #define SekCyclesDone() (Pico.t.m68c_cnt - SekCyclesLeft)
  110. // burn cycles while not in SekRun() and while in
  111. #define SekCyclesBurn(c) Pico.t.m68c_cnt += c
  112. #define SekCyclesBurnRun(c) SekCyclesLeft -= c
  113. // note: sometimes may extend timeslice to delay an irq
  114. #define SekEndRun(after) { \
  115. Pico.t.m68c_cnt -= SekCyclesLeft - (after); \
  116. SekCyclesLeft = after; \
  117. }
  118. extern unsigned int SekCycleCntS68k;
  119. extern unsigned int SekCycleAimS68k;
  120. #define SekEndRunS68k(after) { \
  121. if (SekCyclesLeftS68k > (after)) { \
  122. SekCycleCntS68k -= SekCyclesLeftS68k - (after); \
  123. SekCyclesLeftS68k = after; \
  124. } \
  125. }
  126. #define SekCyclesDoneS68k() (SekCycleCntS68k - SekCyclesLeftS68k)
  127. // compare cycles, handling overflows
  128. // check if a > b
  129. #define CYCLES_GT(a, b) \
  130. ((int)((a) - (b)) > 0)
  131. // check if a >= b
  132. #define CYCLES_GE(a, b) \
  133. ((int)((a) - (b)) >= 0)
  134. // ----------------------- Z80 CPU -----------------------
  135. #if defined(_USE_DRZ80)
  136. #include <cpu/DrZ80/drz80.h>
  137. extern struct DrZ80 drZ80;
  138. #define z80_run(cycles) ((cycles) - DrZ80Run(&drZ80, cycles))
  139. #define z80_run_nr(cycles) DrZ80Run(&drZ80, cycles)
  140. #define z80_int() drZ80.Z80_IRQ = 1
  141. #define z80_int_assert(a) drZ80.Z80_IRQ = (a)
  142. #define z80_nmi() drZ80.Z80IF |= 8
  143. #define z80_cyclesLeft drZ80.cycles
  144. #define z80_subCLeft(c) drZ80.cycles -= c
  145. #define z80_pc() (drZ80.Z80PC - drZ80.Z80PC_BASE)
  146. #elif defined(_USE_CZ80)
  147. #include <cpu/cz80/cz80.h>
  148. #define z80_run(cycles) Cz80_Exec(&CZ80, cycles)
  149. #define z80_run_nr(cycles) Cz80_Exec(&CZ80, cycles)
  150. #define z80_int() Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE)
  151. #define z80_int_assert(a) Cz80_Set_IRQ(&CZ80, 0, (a) ? ASSERT_LINE : CLEAR_LINE)
  152. #define z80_nmi() Cz80_Set_IRQ(&CZ80, IRQ_LINE_NMI, 0)
  153. #define z80_cyclesLeft (CZ80.ICount - CZ80.ExtraCycles)
  154. #define z80_subCLeft(c) CZ80.ICount -= c
  155. #define z80_pc() Cz80_Get_Reg(&CZ80, CZ80_PC)
  156. #else
  157. #define z80_run(cycles) (cycles)
  158. #define z80_run_nr(cycles)
  159. #define z80_int()
  160. #define z80_int_assert(a)
  161. #define z80_nmi()
  162. #endif
  163. #define Z80_STATE_SIZE 0x60
  164. #define z80_resetCycles() \
  165. Pico.t.z80c_cnt = Pico.t.z80c_aim = Pico.t.z80_scanline = 0
  166. #define z80_cyclesDone() \
  167. (Pico.t.z80c_aim - z80_cyclesLeft)
  168. #define cycles_68k_to_z80(x) ((x) * 3822 >> 13)
  169. // ----------------------- SH2 CPU -----------------------
  170. #include <cpu/sh2/sh2.h>
  171. extern SH2 sh2s[2];
  172. #define msh2 sh2s[0]
  173. #define ssh2 sh2s[1]
  174. #ifndef DRC_SH2
  175. # define sh2_end_run(sh2, after_) do { \
  176. if ((sh2)->icount > (after_)) { \
  177. (sh2)->cycles_timeslice -= (sh2)->icount - (after_); \
  178. (sh2)->icount = after_; \
  179. } \
  180. } while (0)
  181. # define sh2_cycles_left(sh2) (sh2)->icount
  182. # define sh2_burn_cycles(sh2, n) (sh2)->icount -= n
  183. # define sh2_pc(sh2) (sh2)->ppc
  184. # define sh2_not_polling(sh2) (sh2)->no_polling
  185. # define sh2_set_polling(sh2) (sh2)->no_polling = 0
  186. #else
  187. # define sh2_end_run(sh2, after_) do { \
  188. int left_ = ((signed int)(sh2)->sr >> 12) - (after_); \
  189. if (left_ > 0) { \
  190. (sh2)->cycles_timeslice -= left_; \
  191. (sh2)->sr -= (left_ << 12); \
  192. } \
  193. } while (0)
  194. # define sh2_cycles_left(sh2) ((signed int)(sh2)->sr >> 12)
  195. # define sh2_burn_cycles(sh2, n) (sh2)->sr -= ((n) << 12)
  196. # define sh2_pc(sh2) (sh2)->pc
  197. # define sh2_not_polling(sh2) ((sh2)->sr & SH2_NO_POLLING)
  198. # define sh2_set_polling(sh2) ((sh2)->sr &= ~SH2_NO_POLLING)
  199. #endif
  200. #define sh2_cycles_done(sh2) (unsigned)((int)(sh2)->cycles_timeslice - sh2_cycles_left(sh2))
  201. #define sh2_cycles_done_t(sh2) \
  202. (unsigned)(C_M68K_TO_SH2(sh2, (sh2)->m68krcycles_done) + sh2_cycles_done(sh2))
  203. #define sh2_cycles_done_m68k(sh2) \
  204. (unsigned)((sh2)->m68krcycles_done + C_SH2_TO_M68K(sh2, sh2_cycles_done(sh2)))
  205. #define sh2_reg(c, x) ((c) ? ssh2.r[x] : msh2.r[x])
  206. #define sh2_gbr(c) ((c) ? ssh2.gbr : msh2.gbr)
  207. #define sh2_vbr(c) ((c) ? ssh2.vbr : msh2.vbr)
  208. #define sh2_sr(c) (((c) ? ssh2.sr : msh2.sr) & 0xfff)
  209. #define sh2_set_gbr(c, v) \
  210. { if (c) ssh2.gbr = v; else msh2.gbr = v; }
  211. #define sh2_set_vbr(c, v) \
  212. { if (c) ssh2.vbr = v; else msh2.vbr = v; }
  213. #define elprintf_sh2(sh2, w, f, ...) \
  214. elprintf(w,"%csh2 "f,(sh2)->is_slave?'s':'m',##__VA_ARGS__)
  215. // ---------------------------------------------------------
  216. // main oscillator clock which controls timing
  217. #define OSC_NTSC 53693100
  218. #define OSC_PAL 53203424
  219. // PicoVideo.debug_p
  220. #define PVD_KILL_A (1 << 0)
  221. #define PVD_KILL_B (1 << 1)
  222. #define PVD_KILL_S_LO (1 << 2)
  223. #define PVD_KILL_S_HI (1 << 3)
  224. #define PVD_KILL_32X (1 << 4)
  225. #define PVD_FORCE_A (1 << 5)
  226. #define PVD_FORCE_B (1 << 6)
  227. #define PVD_FORCE_S (1 << 7)
  228. // PicoVideo.status, not part of real SR
  229. #define SR_PAL (1 << 0)
  230. #define SR_DMA (1 << 1)
  231. #define SR_HB (1 << 2)
  232. #define SR_VB (1 << 3)
  233. #define SR_ODD (1 << 4)
  234. #define SR_C (1 << 5)
  235. #define SR_SOVR (1 << 6)
  236. #define SR_F (1 << 7)
  237. #define SR_FULL (1 << 8)
  238. #define SR_EMPT (1 << 9)
  239. // not part of real SR
  240. #define PVS_ACTIVE (1 << 16)
  241. #define PVS_VB2 (1 << 17) // ignores forced blanking
  242. #define PVS_CPUWR (1 << 18) // CPU write blocked by FIFO full
  243. #define PVS_CPURD (1 << 19) // CPU read blocked by FIFO not empty
  244. #define PVS_DMAFILL (1 << 20) // DMA fill is waiting for fill data
  245. #define PVS_DMABG (1 << 21) // background DMA operation is running
  246. #define PVS_FIFORUN (1 << 22) // FIFO is processing
  247. struct PicoVideo
  248. {
  249. unsigned char reg[0x20];
  250. unsigned int command; // 32-bit Command
  251. unsigned char pending; // 1 if waiting for second half of 32-bit command
  252. unsigned char type; // Command type (v/c/vsram read/write)
  253. unsigned short addr; // Read/Write address
  254. unsigned int status; // Status bits (SR) and extra flags
  255. unsigned char pending_ints; // pending interrupts: ??VH????
  256. signed char pad1; // was VDP write count
  257. unsigned short v_counter; // V-counter
  258. unsigned short debug; // raw debug register
  259. unsigned char debug_p; // ... parsed: PVD_*
  260. unsigned char addr_u; // bit16 of .addr
  261. unsigned char hint_cnt;
  262. unsigned char pad2;
  263. unsigned short hv_latch; // latched hvcounter value
  264. signed int fifo_cnt; // pending xfers for current FIFO queue entry
  265. unsigned char pad[0x04];
  266. };
  267. struct PicoMisc
  268. {
  269. unsigned char rotate;
  270. unsigned char z80Run;
  271. unsigned char padTHPhase[2]; // 02 phase of gamepad TH switches
  272. unsigned short scanline; // 04 0 to 261||311
  273. char dirtyPal; // 06 Is the palette dirty (1 - change @ this frame, 2 - some time before)
  274. unsigned char hardware; // 07 Hardware value for country
  275. unsigned char pal; // 08 1=PAL 0=NTSC
  276. unsigned char sram_reg; // 09 SRAM reg. See SRR_* below
  277. unsigned short z80_bank68k; // 0a
  278. unsigned short pad0;
  279. unsigned char ncart_in; // 0e !cart_in
  280. unsigned char z80_reset; // 0f z80 reset held
  281. unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay
  282. unsigned short eeprom_addr; // EEPROM address register
  283. unsigned char eeprom_cycle; // EEPROM cycle number
  284. unsigned char eeprom_slave; // EEPROM slave word for X24C02 and better SRAMs
  285. unsigned char eeprom_status;
  286. unsigned char pad1; // was ym2612 status
  287. unsigned short dma_xfers; // 18 unused (was VDP DMA transfer count)
  288. unsigned char eeprom_wb[2]; // EEPROM latch/write buffer
  289. unsigned int frame_count; // 1c for movies and idle det
  290. };
  291. struct PicoMS
  292. {
  293. unsigned char carthw[0x10];
  294. unsigned char io_ctl;
  295. unsigned char nmi_state;
  296. unsigned char pad[0x4e];
  297. };
  298. // emu state and data for the asm code
  299. struct PicoEState
  300. {
  301. int DrawScanline;
  302. int rendstatus;
  303. void *DrawLineDest; // draw destination
  304. int DrawLineDestIncr;
  305. unsigned char *HighCol;
  306. s32 *HighPreSpr;
  307. struct Pico *Pico;
  308. unsigned short *PicoMem_vram;
  309. unsigned short *PicoMem_cram;
  310. unsigned int *PicoOpt;
  311. unsigned char *Draw2FB;
  312. int Draw2Width;
  313. int Draw2Start;
  314. unsigned short HighPal[0x100];
  315. unsigned short SonicPal[0x100];
  316. int SonicPalCount;
  317. };
  318. struct PicoMem
  319. {
  320. unsigned char ram[0x10000]; // 0x00000 scratch ram
  321. union { // vram is byteswapped for easier reads when drawing
  322. unsigned short vram[0x8000]; // 0x10000
  323. unsigned char vramb[0x4000]; // VRAM in SMS mode
  324. };
  325. unsigned char zram[0x2000]; // 0x20000 Z80 ram
  326. unsigned char ioports[0x10]; // XXX: fix asm and mv
  327. unsigned short cram[0x40]; // 0x22010
  328. unsigned char pad[0x70]; // 0x22050 DrawStripVSRam reads 0 from here
  329. unsigned short vsram[0x40]; // 0x22100
  330. };
  331. // sram
  332. #define SRR_MAPPED (1 << 0)
  333. #define SRR_READONLY (1 << 1)
  334. #define SRF_ENABLED (1 << 0)
  335. #define SRF_EEPROM (1 << 1)
  336. struct PicoCartSave
  337. {
  338. unsigned char *data; // actual data
  339. unsigned int start; // start address in 68k address space
  340. unsigned int end;
  341. unsigned char flags; // 0c: SRF_*
  342. unsigned char unused2;
  343. unsigned char changed;
  344. unsigned char eeprom_type; // eeprom type: 0: 7bit (24C01), 2: 2 addr words (X24C02+), 3: 3 addr words
  345. unsigned char unused3;
  346. unsigned char eeprom_bit_cl; // bit number for cl
  347. unsigned char eeprom_bit_in; // bit number for in
  348. unsigned char eeprom_bit_out; // bit number for out
  349. unsigned int size;
  350. };
  351. struct PicoTiming
  352. {
  353. // while running, cnt represents target of current timeslice
  354. // while not in SekRun(), it's actual cycles done
  355. // (but always use SekCyclesDone() if you need current position)
  356. // _cnt may change if timeslice is ended prematurely or extended,
  357. // so we use _aim for the actual target
  358. unsigned int m68c_cnt;
  359. unsigned int m68c_aim;
  360. unsigned int m68c_frame_start; // m68k cycles
  361. unsigned int m68c_line_start;
  362. unsigned int z80c_cnt; // z80 cycles done (this frame)
  363. unsigned int z80c_aim;
  364. int z80_scanline;
  365. int timer_a_next_oflow, timer_a_step; // in z80 cycles
  366. int timer_b_next_oflow, timer_b_step;
  367. };
  368. struct PicoSound
  369. {
  370. short len; // number of mono samples
  371. short len_use; // adjusted
  372. int len_e_add; // for non-int samples/frame
  373. int len_e_cnt;
  374. unsigned int clkl_mult; // z80 clocks per line in Q20
  375. unsigned int smpl_mult; // samples per line in Q16
  376. short dac_val, dac_val2; // last DAC sample
  377. unsigned int dac_pos; // last DAC position in Q20
  378. unsigned int fm_pos; // last FM position in Q20
  379. unsigned int psg_pos; // last PSG position in Q16
  380. unsigned int ym2413_pos; // last YM2413 position
  381. };
  382. // run tools/mkoffsets pico/pico_int_offs.h if you change these
  383. // careful with savestate compat
  384. struct Pico
  385. {
  386. struct PicoVideo video;
  387. struct PicoMisc m;
  388. struct PicoTiming t;
  389. struct PicoCartSave sv;
  390. struct PicoSound snd;
  391. struct PicoEState est;
  392. struct PicoMS ms;
  393. unsigned char *rom;
  394. unsigned int romsize;
  395. };
  396. // MCD
  397. #define PCM_MIXBUF_LEN ((12500000 / 384) / 50 + 1)
  398. struct mcd_pcm
  399. {
  400. unsigned char control; // reg7
  401. unsigned char enabled; // reg8
  402. unsigned char cur_ch;
  403. unsigned char bank;
  404. unsigned int update_cycles;
  405. struct pcm_chan // 08, size 0x10
  406. {
  407. unsigned char regs[8];
  408. unsigned int addr; // .08: played sample address
  409. int pad;
  410. } ch[8];
  411. };
  412. #define PCD_ST_S68K_RST 1
  413. struct mcd_misc
  414. {
  415. unsigned short hint_vector;
  416. unsigned char busreq; // not s68k_regs[1]
  417. unsigned char s68k_pend_ints;
  418. unsigned int state_flags; // 04
  419. unsigned int stopwatch_base_c;
  420. unsigned short m68k_poll_a;
  421. unsigned short m68k_poll_cnt;
  422. unsigned short s68k_poll_a;
  423. unsigned short s68k_poll_cnt;
  424. unsigned int s68k_poll_clk;
  425. unsigned char bcram_reg; // 18: battery-backed RAM cart register
  426. unsigned char dmna_ret_2m;
  427. unsigned char need_sync;
  428. unsigned char pad3;
  429. unsigned int m68k_poll_clk;
  430. int pad4[8];
  431. };
  432. typedef struct
  433. {
  434. unsigned char bios[0x20000]; // 000000: 128K
  435. union { // 020000: 512K
  436. unsigned char prg_ram[0x80000];
  437. unsigned char prg_ram_b[4][0x20000];
  438. };
  439. union { // 0a0000: 256K
  440. struct {
  441. unsigned char word_ram2M[0x40000];
  442. unsigned char unused0[0x20000];
  443. };
  444. struct {
  445. unsigned char unused1[0x20000];
  446. unsigned char word_ram1M[2][0x20000];
  447. };
  448. };
  449. union { // 100000: 64K
  450. unsigned char pcm_ram[0x10000];
  451. unsigned char pcm_ram_b[0x10][0x1000];
  452. };
  453. unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs
  454. unsigned char bram[0x2000]; // 110200: 8K
  455. struct mcd_misc m; // 112200: misc
  456. struct mcd_pcm pcm; // 112240:
  457. void *cdda_stream;
  458. int cdda_type;
  459. int pcm_mixbuf[PCM_MIXBUF_LEN * 2];
  460. int pcm_mixpos;
  461. char pcm_mixbuf_dirty;
  462. char pcm_regs_dirty;
  463. } mcd_state;
  464. // XXX: this will need to be reworked for cart+cd support.
  465. #define Pico_mcd ((mcd_state *)Pico.rom)
  466. // 32X
  467. #define P32XS_FM (1<<15)
  468. #define P32XS_nCART (1<< 8)
  469. #define P32XS_REN (1<< 7)
  470. #define P32XS_nRES (1<< 1)
  471. #define P32XS_ADEN (1<< 0)
  472. #define P32XS2_ADEN (1<< 9)
  473. #define P32XS_FULL (1<< 7) // DREQ FIFO full
  474. #define P32XS_68S (1<< 2)
  475. #define P32XS_DMA (1<< 1)
  476. #define P32XS_RV (1<< 0)
  477. #define P32XV_nPAL (1<<15) // VDP
  478. #define P32XV_PRI (1<< 7)
  479. #define P32XV_Mx (3<< 0) // display mode mask
  480. #define P32XV_SFT (1<< 0)
  481. #define P32XV_VBLK (1<<15)
  482. #define P32XV_HBLK (1<<14)
  483. #define P32XV_PEN (1<<13)
  484. #define P32XV_nFEN (1<< 1)
  485. #define P32XV_FS (1<< 0)
  486. #define P32XP_RTP (1<<7) // PWM control
  487. #define P32XP_FULL (1<<15) // PWM pulse
  488. #define P32XP_EMPTY (1<<14)
  489. #define P32XF_68KCPOLL (1 << 0)
  490. #define P32XF_68KVPOLL (1 << 1)
  491. #define P32XF_Z80_32X_IO (1 << 7) // z80 does 32x io
  492. #define P32XF_DRC_ROM_C (1 << 8) // cached code from ROM
  493. #define P32XI_VRES (1 << 14/2) // IRL/2
  494. #define P32XI_VINT (1 << 12/2)
  495. #define P32XI_HINT (1 << 10/2)
  496. #define P32XI_CMD (1 << 8/2)
  497. #define P32XI_PWM (1 << 6/2)
  498. // peripheral reg access (32 bit regs)
  499. #define PREG8(regs,offs) ((unsigned char *)regs)[MEM_BE4(offs)]
  500. #define DMAC_FIFO_LEN (4*2)
  501. #define PWM_BUFF_LEN 1024 // in one channel samples
  502. #define SH2_DRCBLK_RAM_SHIFT 1
  503. #define SH2_DRCBLK_DA_SHIFT 1
  504. #define SH2_READ_SHIFT 25
  505. #define SH2_WRITE_SHIFT 25
  506. struct Pico32x
  507. {
  508. unsigned short regs[0x20];
  509. unsigned short vdp_regs[0x10]; // 0x40
  510. unsigned short sh2_regs[3]; // 0x60
  511. unsigned char pending_fb;
  512. unsigned char dirty_pal;
  513. unsigned int emu_flags;
  514. unsigned char sh2irq_mask[2];
  515. unsigned char sh2irqi[2]; // individual
  516. unsigned int sh2irqs; // common irqs
  517. unsigned short dmac_fifo[DMAC_FIFO_LEN];
  518. unsigned int pad[4];
  519. unsigned int dmac0_fifo_ptr;
  520. unsigned short vdp_fbcr_fake;
  521. unsigned short pad2;
  522. unsigned char comm_dirty;
  523. unsigned char pad3; // was comm_dirty_sh2
  524. unsigned char pwm_irq_cnt;
  525. unsigned char pad1;
  526. unsigned short pwm_p[2]; // pwm pos in fifo
  527. unsigned int pwm_cycle_p; // pwm play cursor (32x cycles)
  528. unsigned int reserved[6];
  529. };
  530. struct Pico32xMem
  531. {
  532. unsigned char sdram[0x40000];
  533. #ifdef DRC_SH2
  534. unsigned char drcblk_ram[1 << (18 - SH2_DRCBLK_RAM_SHIFT)];
  535. unsigned char drclit_ram[1 << (18 - SH2_DRCBLK_RAM_SHIFT)];
  536. #endif
  537. unsigned short dram[2][0x20000/2]; // AKA fb
  538. union {
  539. unsigned char m68k_rom[0x100];
  540. unsigned char m68k_rom_bank[0x10000]; // M68K_BANK_SIZE
  541. };
  542. #ifdef DRC_SH2
  543. unsigned char drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];
  544. unsigned char drclit_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];
  545. #endif
  546. union {
  547. unsigned char b[0x800];
  548. unsigned short w[0x800/2];
  549. } sh2_rom_m;
  550. union {
  551. unsigned char b[0x400];
  552. unsigned short w[0x400/2];
  553. } sh2_rom_s;
  554. unsigned short pal[0x100];
  555. unsigned short pal_native[0x100]; // converted to native (for renderer)
  556. signed short pwm[2*PWM_BUFF_LEN]; // PWM buffer for current frame
  557. unsigned short pwm_fifo[2][4]; // [0] - current raw, others - fifo entries
  558. unsigned pwm_index[2]; // ringbuffer index for pwm_fifo
  559. };
  560. // area.c
  561. extern void (*PicoLoadStateHook)(void);
  562. typedef struct {
  563. int chunk;
  564. int size;
  565. void *ptr;
  566. } carthw_state_chunk;
  567. extern carthw_state_chunk *carthw_chunks;
  568. #define CHUNK_CARTHW 64
  569. // cart.c
  570. extern int PicoCartResize(int newsize);
  571. extern void Byteswap(void *dst, const void *src, int len);
  572. extern void (*PicoCartMemSetup)(void);
  573. extern void (*PicoCartUnloadHook)(void);
  574. // debug.c
  575. int CM_compareRun(int cyc, int is_sub);
  576. // draw.c
  577. void PicoDrawInit(void);
  578. PICO_INTERNAL void PicoFrameStart(void);
  579. void PicoDrawSync(int to, int blank_last_line);
  580. void BackFill(int reg7, int sh, struct PicoEState *est);
  581. void FinalizeLine555(int sh, int line, struct PicoEState *est);
  582. void PicoDrawSetOutBufMD(void *dest, int increment);
  583. extern int (*PicoScanBegin)(unsigned int num);
  584. extern int (*PicoScanEnd)(unsigned int num);
  585. #define MAX_LINE_SPRITES 27 // +1 last sprite width, +4 hdr; total 32
  586. extern unsigned char HighLnSpr[240][4+MAX_LINE_SPRITES+1];
  587. extern unsigned char *HighColBase;
  588. extern int HighColIncrement;
  589. extern void *DrawLineDestBase;
  590. extern int DrawLineDestIncrement;
  591. extern u32 VdpSATCache[128];
  592. // draw2.c
  593. void PicoDraw2SetOutBuf(void *dest, int incr);
  594. void PicoDraw2Init(void);
  595. PICO_INTERNAL void PicoFrameFull();
  596. // mode4.c
  597. void PicoFrameStartMode4(void);
  598. void PicoLineMode4(int line);
  599. void PicoDoHighPal555M4(void);
  600. void PicoDrawSetOutputMode4(pdso_t which);
  601. // memory.c
  602. PICO_INTERNAL void PicoMemSetup(void);
  603. u32 PicoRead8_io(u32 a);
  604. u32 PicoRead16_io(u32 a);
  605. void PicoWrite8_io(u32 a, u32 d);
  606. void PicoWrite16_io(u32 a, u32 d);
  607. // pico/memory.c
  608. PICO_INTERNAL void PicoMemSetupPico(void);
  609. // cd/cdc.c
  610. void cdc_init(void);
  611. void cdc_reset(void);
  612. int cdc_context_save(unsigned char *state);
  613. int cdc_context_load(unsigned char *state);
  614. int cdc_context_load_old(unsigned char *state);
  615. void cdc_dma_update(void);
  616. int cdc_decoder_update(unsigned char header[4]);
  617. void cdc_reg_w(unsigned char data);
  618. unsigned char cdc_reg_r(void);
  619. unsigned short cdc_host_r(void);
  620. // cd/cdd.c
  621. void cdd_reset(void);
  622. int cdd_context_save(unsigned char *state);
  623. int cdd_context_load(unsigned char *state);
  624. int cdd_context_load_old(unsigned char *state);
  625. void cdd_read_data(unsigned char *dst);
  626. void cdd_read_audio(unsigned int samples);
  627. void cdd_update(void);
  628. void cdd_process(void);
  629. // cd/cd_image.c
  630. int load_cd_image(const char *cd_img_name, int *type);
  631. // cd/gfx.c
  632. void gfx_init(void);
  633. void gfx_start(u32 base);
  634. void gfx_update(unsigned int cycles);
  635. int gfx_context_save(unsigned char *state);
  636. int gfx_context_load(const unsigned char *state);
  637. // cd/gfx_dma.c
  638. void DmaSlowCell(u32 source, u32 a, int len, unsigned char inc);
  639. // cd/memory.c
  640. PICO_INTERNAL void PicoMemSetupCD(void);
  641. u32 PicoRead8_mcd_io(u32 a);
  642. u32 PicoRead16_mcd_io(u32 a);
  643. void PicoWrite8_mcd_io(u32 a, u32 d);
  644. void PicoWrite16_mcd_io(u32 a, u32 d);
  645. void pcd_state_loaded_mem(void);
  646. // pico.c
  647. extern struct Pico Pico;
  648. extern struct PicoMem PicoMem;
  649. extern void (*PicoResetHook)(void);
  650. extern void (*PicoLineHook)(void);
  651. PICO_INTERNAL int CheckDMA(int cycles);
  652. PICO_INTERNAL void PicoDetectRegion(void);
  653. PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done);
  654. // cd/mcd.c
  655. #define PCDS_IEN1 (1<<1)
  656. #define PCDS_IEN2 (1<<2)
  657. #define PCDS_IEN3 (1<<3)
  658. #define PCDS_IEN4 (1<<4)
  659. #define PCDS_IEN5 (1<<5)
  660. #define PCDS_IEN6 (1<<6)
  661. PICO_INTERNAL void PicoInitMCD(void);
  662. PICO_INTERNAL void PicoExitMCD(void);
  663. PICO_INTERNAL void PicoPowerMCD(void);
  664. PICO_INTERNAL int PicoResetMCD(void);
  665. PICO_INTERNAL void PicoFrameMCD(void);
  666. enum pcd_event {
  667. PCD_EVENT_CDC,
  668. PCD_EVENT_TIMER3,
  669. PCD_EVENT_GFX,
  670. PCD_EVENT_DMA,
  671. PCD_EVENT_COUNT,
  672. };
  673. extern unsigned int pcd_event_times[PCD_EVENT_COUNT];
  674. void pcd_event_schedule(unsigned int now, enum pcd_event event, int after);
  675. void pcd_event_schedule_s68k(enum pcd_event event, int after);
  676. void pcd_prepare_frame(void);
  677. unsigned int pcd_cycles_m68k_to_s68k(unsigned int c);
  678. void pcd_irq_s68k(int irq, int state);
  679. int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync);
  680. void pcd_run_cpus(int m68k_cycles);
  681. void pcd_soft_reset(void);
  682. void pcd_state_loaded(void);
  683. // cd/pcm.c
  684. void pcd_pcm_sync(unsigned int to);
  685. void pcd_pcm_update(s32 *buffer, int length, int stereo);
  686. void pcd_pcm_write(unsigned int a, unsigned int d);
  687. unsigned int pcd_pcm_read(unsigned int a);
  688. // pico/pico.c
  689. PICO_INTERNAL void PicoInitPico(void);
  690. PICO_INTERNAL void PicoReratePico(void);
  691. // pico/xpcm.c
  692. PICO_INTERNAL void PicoPicoPCMUpdate(short *buffer, int length, int stereo);
  693. PICO_INTERNAL void PicoPicoPCMReset(void);
  694. PICO_INTERNAL void PicoPicoPCMRerate(int xpcm_rate);
  695. // sek.c
  696. PICO_INTERNAL void SekInit(void);
  697. PICO_INTERNAL int SekReset(void);
  698. PICO_INTERNAL void SekState(int *data);
  699. PICO_INTERNAL void SekSetRealTAS(int use_real);
  700. PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub);
  701. PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub);
  702. void SekStepM68k(void);
  703. void SekInitIdleDet(void);
  704. void SekFinishIdleDet(void);
  705. #if defined(CPU_CMP_R) || defined(CPU_CMP_W)
  706. void SekTrace(int is_s68k);
  707. #else
  708. #define SekTrace(x)
  709. #endif
  710. // cd/sek.c
  711. PICO_INTERNAL void SekInitS68k(void);
  712. PICO_INTERNAL int SekResetS68k(void);
  713. PICO_INTERNAL int SekInterruptS68k(int irq);
  714. void SekInterruptClearS68k(int irq);
  715. // sound/sound.c
  716. extern short cdda_out_buffer[2*1152];
  717. void cdda_start_play(int lba_base, int lba_offset, int lb_len);
  718. void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new);
  719. void ym2612_pack_state(void);
  720. void ym2612_unpack_state(void);
  721. #define TIMER_NO_OFLOW 0x70000000
  722. // tA = 72 * (1024 - NA) / M, with M = mclock/2 -> tick = 72 * 2/mclock
  723. #define TIMER_A_TICK_ZCYCLES 17203 // zcycles = Q8*tick*zclock = Q8*77*2*7/15
  724. // tB = 1152 * (256 - NA) / M,
  725. #define TIMER_B_TICK_ZCYCLES 275251 // zcycles = Q8*1152*2*7/15
  726. #define timers_cycle() \
  727. if (Pico.t.timer_a_next_oflow > 0 && Pico.t.timer_a_next_oflow < TIMER_NO_OFLOW) \
  728. Pico.t.timer_a_next_oflow -= Pico.m.pal ? 70938*256 : 59659*256; \
  729. if (Pico.t.timer_b_next_oflow > 0 && Pico.t.timer_b_next_oflow < TIMER_NO_OFLOW) \
  730. Pico.t.timer_b_next_oflow -= Pico.m.pal ? 70938*256 : 59659*256; \
  731. ym2612_sync_timers(0, ym2612.OPN.ST.mode, ym2612.OPN.ST.mode);
  732. #define timers_reset() \
  733. Pico.t.timer_a_next_oflow = Pico.t.timer_b_next_oflow = TIMER_NO_OFLOW; \
  734. Pico.t.timer_a_step = TIMER_A_TICK_ZCYCLES * 1024; \
  735. Pico.t.timer_b_step = TIMER_B_TICK_ZCYCLES * 256; \
  736. ym2612.OPN.ST.status &= ~3;
  737. // videoport.c
  738. extern u32 SATaddr, SATmask;
  739. static __inline void UpdateSAT(u32 a, u32 d)
  740. {
  741. unsigned num = (a^SATaddr) >> 3;
  742. Pico.est.rendstatus |= PDRAW_DIRTY_SPRITES;
  743. if (!(a & 4) && num < 128) {
  744. ((u16 *)&VdpSATCache[num])[(a&3) >> 1] = d;
  745. }
  746. }
  747. static __inline void VideoWriteVRAM(u32 a, u16 d)
  748. {
  749. PicoMem.vram [(u16)a >> 1] = d;
  750. if (((a^SATaddr) & SATmask) == 0)
  751. UpdateSAT(a, d);
  752. }
  753. PICO_INTERNAL_ASM void PicoVideoWrite(u32 a,unsigned short d);
  754. PICO_INTERNAL_ASM u32 PicoVideoRead(u32 a);
  755. unsigned char PicoVideoRead8DataH(int is_from_z80);
  756. unsigned char PicoVideoRead8DataL(int is_from_z80);
  757. unsigned char PicoVideoRead8CtlH(int is_from_z80);
  758. unsigned char PicoVideoRead8CtlL(int is_from_z80);
  759. unsigned char PicoVideoRead8HV_H(int is_from_z80);
  760. unsigned char PicoVideoRead8HV_L(int is_from_z80);
  761. extern int (*PicoDmaHook)(u32 source, int len, unsigned short **base, u32 *mask);
  762. void PicoVideoFIFOSync(int cycles);
  763. int PicoVideoFIFOHint(void);
  764. void PicoVideoFIFOMode(int active, int h40);
  765. int PicoVideoFIFOWrite(int count, int byte_p, unsigned sr_mask, unsigned sr_flags);
  766. void PicoVideoInit(void);
  767. void PicoVideoSave(void);
  768. void PicoVideoLoad(void);
  769. void PicoVideoCacheSAT(void);
  770. // misc.c
  771. PICO_INTERNAL_ASM void memcpy16bswap(unsigned short *dest, void *src, int count);
  772. PICO_INTERNAL_ASM void memset32(void *dest, int c, int count);
  773. // eeprom.c
  774. void EEPROM_write8(unsigned int a, unsigned int d);
  775. void EEPROM_write16(unsigned int d);
  776. unsigned int EEPROM_read(void);
  777. // z80 functionality wrappers
  778. PICO_INTERNAL void z80_init(void);
  779. PICO_INTERNAL void z80_pack(void *data);
  780. PICO_INTERNAL int z80_unpack(const void *data);
  781. PICO_INTERNAL void z80_reset(void);
  782. PICO_INTERNAL void z80_exit(void);
  783. // cd/misc.c
  784. PICO_INTERNAL_ASM void wram_2M_to_1M(unsigned char *m);
  785. PICO_INTERNAL_ASM void wram_1M_to_2M(unsigned char *m);
  786. // sound/sound.c
  787. PICO_INTERNAL void PsndInit(void);
  788. PICO_INTERNAL void PsndExit(void);
  789. PICO_INTERNAL void PsndReset(void);
  790. PICO_INTERNAL void PsndStartFrame(void);
  791. PICO_INTERNAL void PsndDoDAC(int cycle_to);
  792. PICO_INTERNAL void PsndDoPSG(int line_to);
  793. PICO_INTERNAL void PsndDoYM2413(int line_to);
  794. PICO_INTERNAL void PsndDoFM(int line_to);
  795. PICO_INTERNAL void PsndClear(void);
  796. PICO_INTERNAL void PsndGetSamples(int y);
  797. PICO_INTERNAL void PsndGetSamplesMS(int y);
  798. // sms.c
  799. #ifndef NO_SMS
  800. void PicoPowerMS(void);
  801. void PicoResetMS(void);
  802. void PicoMemSetupMS(void);
  803. void PicoStateLoadedMS(void);
  804. void PicoFrameMS(void);
  805. void PicoFrameDrawOnlyMS(void);
  806. #else
  807. #define PicoPowerMS()
  808. #define PicoResetMS()
  809. #define PicoMemSetupMS()
  810. #define PicoStateLoadedMS()
  811. #define PicoFrameMS()
  812. #define PicoFrameDrawOnlyMS()
  813. #endif
  814. // 32x/32x.c
  815. #ifndef NO_32X
  816. extern struct Pico32x Pico32x;
  817. enum p32x_event {
  818. P32X_EVENT_PWM,
  819. P32X_EVENT_FILLEND,
  820. P32X_EVENT_HINT,
  821. P32X_EVENT_COUNT,
  822. };
  823. extern unsigned int p32x_event_times[P32X_EVENT_COUNT];
  824. void Pico32xInit(void);
  825. void PicoPower32x(void);
  826. void PicoReset32x(void);
  827. void Pico32xStartup(void);
  828. void PicoUnload32x(void);
  829. void PicoFrame32x(void);
  830. void Pico32xStateLoaded(int is_early);
  831. void p32x_sync_sh2s(unsigned int m68k_target);
  832. void p32x_sync_other_sh2(SH2 *sh2, unsigned int m68k_target);
  833. void p32x_update_irls(SH2 *active_sh2, unsigned int m68k_cycles);
  834. void p32x_trigger_irq(SH2 *sh2, unsigned int m68k_cycles, unsigned int mask);
  835. void p32x_update_cmd_irq(SH2 *sh2, unsigned int m68k_cycles);
  836. void p32x_reset_sh2s(void);
  837. void p32x_event_schedule(unsigned int now, enum p32x_event event, int after);
  838. void p32x_event_schedule_sh2(SH2 *sh2, enum p32x_event event, int after);
  839. void p32x_schedule_hint(SH2 *sh2, unsigned int m68k_cycles);
  840. #define p32x_sh2_ready(sh2, cycles) \
  841. (CYCLES_GT(cycles,sh2->m68krcycles_done) && \
  842. !(sh2->state&(SH2_STATE_CPOLL|SH2_STATE_VPOLL|SH2_STATE_RPOLL)))
  843. // 32x/memory.c
  844. extern struct Pico32xMem *Pico32xMem;
  845. u32 PicoRead8_32x(u32 a);
  846. u32 PicoRead16_32x(u32 a);
  847. void PicoWrite8_32x(u32 a, u32 d);
  848. void PicoWrite16_32x(u32 a, u32 d);
  849. void PicoMemSetup32x(void);
  850. void Pico32xSwapDRAM(int b);
  851. void Pico32xMemStateLoaded(void);
  852. void p32x_update_banks(void);
  853. void p32x_m68k_poll_event(u32 flags);
  854. u32 REGPARM(3) p32x_sh2_poll_memory8(u32 a, u32 d, SH2 *sh2);
  855. u32 REGPARM(3) p32x_sh2_poll_memory16(u32 a, u32 d, SH2 *sh2);
  856. u32 REGPARM(3) p32x_sh2_poll_memory32(u32 a, u32 d, SH2 *sh2);
  857. void *p32x_sh2_get_mem_ptr(u32 a, u32 *mask, SH2 *sh2);
  858. void p32x_sh2_poll_detect(u32 a, SH2 *sh2, u32 flags, int maxcnt);
  859. void p32x_sh2_poll_event(SH2 *sh2, u32 flags, u32 m68k_cycles);
  860. int p32x_sh2_memcpy(u32 dst, u32 src, int count, int size, SH2 *sh2);
  861. // 32x/draw.c
  862. void PicoDrawSetOutFormat32x(pdso_t which, int use_32x_line_mode);
  863. void PicoDrawSetOutBuf32X(void *dest, int increment);
  864. void FinalizeLine32xRGB555(int sh, int line, struct PicoEState *est);
  865. void PicoDraw32xLayer(int offs, int lines, int mdbg);
  866. void PicoDraw32xLayerMdOnly(int offs, int lines);
  867. extern int (*PicoScan32xBegin)(unsigned int num);
  868. extern int (*PicoScan32xEnd)(unsigned int num);
  869. enum {
  870. PDM32X_OFF,
  871. PDM32X_32X_ONLY,
  872. PDM32X_BOTH,
  873. };
  874. extern int Pico32xDrawMode;
  875. // 32x/pwm.c
  876. unsigned int p32x_pwm_read16(u32 a, SH2 *sh2, unsigned int m68k_cycles);
  877. void p32x_pwm_write16(u32 a, unsigned int d, SH2 *sh2, unsigned int m68k_cycles);
  878. void p32x_pwm_update(int *buf32, int length, int stereo);
  879. void p32x_pwm_ctl_changed(void);
  880. void p32x_pwm_schedule(unsigned int m68k_now);
  881. void p32x_pwm_schedule_sh2(SH2 *sh2);
  882. void p32x_pwm_sync_to_sh2(SH2 *sh2);
  883. void p32x_pwm_irq_event(unsigned int m68k_now);
  884. void p32x_pwm_state_loaded(void);
  885. // 32x/sh2soc.c
  886. void p32x_dreq0_trigger(void);
  887. void p32x_dreq1_trigger(void);
  888. void p32x_timers_recalc(void);
  889. void p32x_timer_do(SH2 *sh2, unsigned int m68k_slice);
  890. void sh2_peripheral_reset(SH2 *sh2);
  891. u32 REGPARM(2) sh2_peripheral_read8(u32 a, SH2 *sh2);
  892. u32 REGPARM(2) sh2_peripheral_read16(u32 a, SH2 *sh2);
  893. u32 REGPARM(2) sh2_peripheral_read32(u32 a, SH2 *sh2);
  894. void REGPARM(3) sh2_peripheral_write8(u32 a, u32 d, SH2 *sh2);
  895. void REGPARM(3) sh2_peripheral_write16(u32 a, u32 d, SH2 *sh2);
  896. void REGPARM(3) sh2_peripheral_write32(u32 a, u32 d, SH2 *sh2);
  897. #else
  898. #define Pico32xInit()
  899. #define PicoPower32x()
  900. #define PicoReset32x()
  901. #define PicoFrame32x()
  902. #define PicoUnload32x()
  903. #define Pico32xStateLoaded()
  904. #define FinalizeLine32xRGB555 NULL
  905. #define p32x_pwm_update(...)
  906. #define p32x_timers_recalc()
  907. #endif
  908. /* avoid dependency on newer glibc */
  909. static __inline int isspace_(int c)
  910. {
  911. return (0x09 <= c && c <= 0x0d) || c == ' ';
  912. }
  913. #ifndef ARRAY_SIZE
  914. #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
  915. #endif
  916. // emulation event logging
  917. #ifndef EL_LOGMASK
  918. # ifdef __x86_64__ // HACK
  919. # define EL_LOGMASK (EL_STATUS|EL_ANOMALY)
  920. # else
  921. # define EL_LOGMASK (EL_STATUS)
  922. # endif
  923. #endif
  924. #define EL_HVCNT 0x00000001 /* hv counter reads */
  925. #define EL_SR 0x00000002 /* SR reads */
  926. #define EL_INTS 0x00000004 /* ints and acks */
  927. #define EL_YMTIMER 0x00000008 /* ym2612 timer stuff */
  928. #define EL_INTSW 0x00000010 /* log irq switching on/off */
  929. #define EL_ASVDP 0x00000020 /* VDP accesses during active scan */
  930. #define EL_VDPDMA 0x00000040 /* VDP DMA transfers and their timing */
  931. #define EL_BUSREQ 0x00000080 /* z80 busreq r/w or reset w */
  932. #define EL_Z80BNK 0x00000100 /* z80 i/o through bank area */
  933. #define EL_SRAMIO 0x00000200 /* sram i/o */
  934. #define EL_EEPROM 0x00000400 /* eeprom debug */
  935. #define EL_UIO 0x00000800 /* unmapped i/o */
  936. #define EL_IO 0x00001000 /* all i/o */
  937. #define EL_CDPOLL 0x00002000 /* MCD: log poll detection */
  938. #define EL_SVP 0x00004000 /* SVP stuff */
  939. #define EL_PICOHW 0x00008000 /* Pico stuff */
  940. #define EL_IDLE 0x00010000 /* idle loop det. */
  941. #define EL_CDREGS 0x00020000 /* MCD: register access */
  942. #define EL_CDREG3 0x00040000 /* MCD: register 3 only */
  943. #define EL_32X 0x00080000
  944. #define EL_PWM 0x00100000 /* 32X PWM stuff (LOTS of output) */
  945. #define EL_32XP 0x00200000 /* 32X peripherals */
  946. #define EL_CD 0x00400000 /* MCD */
  947. #define EL_STATUS 0x40000000 /* status messages */
  948. #define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */
  949. #if EL_LOGMASK
  950. #define elprintf(w,f,...) \
  951. do { \
  952. if ((w) & EL_LOGMASK) \
  953. lprintf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__); \
  954. } while (0)
  955. #elif defined(_MSC_VER)
  956. #define elprintf
  957. #else
  958. #define elprintf(w,f,...)
  959. #endif
  960. // profiling
  961. #ifdef PPROF
  962. #include <platform/linux/pprof.h>
  963. #else
  964. #define pprof_init()
  965. #define pprof_finish()
  966. #define pprof_start(x)
  967. #define pprof_end(...)
  968. #define pprof_end_sub(...)
  969. #endif
  970. #ifdef EVT_LOG
  971. enum evt {
  972. EVT_FRAME_START,
  973. EVT_NEXT_LINE,
  974. EVT_RUN_START,
  975. EVT_RUN_END,
  976. EVT_POLL_START,
  977. EVT_POLL_END,
  978. EVT_CNT
  979. };
  980. enum evt_cpu {
  981. EVT_M68K,
  982. EVT_S68K,
  983. EVT_MSH2,
  984. EVT_SSH2,
  985. EVT_CPU_CNT
  986. };
  987. void pevt_log(unsigned int cycles, enum evt_cpu c, enum evt e);
  988. void pevt_dump(void);
  989. #define pevt_log_m68k(e) \
  990. pevt_log(SekCyclesDone(), EVT_M68K, e)
  991. #define pevt_log_m68k_o(e) \
  992. pevt_log(SekCyclesDone(), EVT_M68K, e)
  993. #define pevt_log_sh2(sh2, e) \
  994. pevt_log(sh2_cycles_done_m68k(sh2), EVT_MSH2 + (sh2)->is_slave, e)
  995. #define pevt_log_sh2_o(sh2, e) \
  996. pevt_log((sh2)->m68krcycles_done, EVT_MSH2 + (sh2)->is_slave, e)
  997. #else
  998. #define pevt_log(c, e)
  999. #define pevt_log_m68k(e)
  1000. #define pevt_log_m68k_o(e)
  1001. #define pevt_log_sh2(sh2, e)
  1002. #define pevt_log_sh2_o(sh2, e)
  1003. #define pevt_dump()
  1004. #endif
  1005. #ifdef __cplusplus
  1006. } // End of extern "C"
  1007. #endif
  1008. #endif // PICO_INTERNAL_INCLUDED
  1009. // vim:shiftwidth=2:ts=2:expandtab