pico_int.h 26 KB

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  1. /*
  2. * PicoDrive - Internal Header File
  3. * (c) Copyright Dave, 2004
  4. * (C) notaz, 2006-2010
  5. *
  6. * This work is licensed under the terms of MAME license.
  7. * See COPYING file in the top-level directory.
  8. */
  9. #ifndef PICO_INTERNAL_INCLUDED
  10. #define PICO_INTERNAL_INCLUDED
  11. #include <stdio.h>
  12. #include <stdlib.h>
  13. #include <string.h>
  14. #include "pico.h"
  15. #include "carthw/carthw.h"
  16. //
  17. #define USE_POLL_DETECT
  18. #ifndef PICO_INTERNAL
  19. #define PICO_INTERNAL
  20. #endif
  21. #ifndef PICO_INTERNAL_ASM
  22. #define PICO_INTERNAL_ASM
  23. #endif
  24. // to select core, define EMU_C68K, EMU_M68K or EMU_F68K in your makefile or project
  25. #ifdef __cplusplus
  26. extern "C" {
  27. #endif
  28. // ----------------------- 68000 CPU -----------------------
  29. #ifdef EMU_C68K
  30. #include "../cpu/cyclone/Cyclone.h"
  31. extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;
  32. #define SekCyclesLeftNoMCD PicoCpuCM68k.cycles // cycles left for this run
  33. #define SekCyclesLeft \
  34. (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)
  35. #define SekCyclesLeftS68k \
  36. ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuCS68k.cycles)
  37. #define SekEndTimeslice(after) PicoCpuCM68k.cycles=after
  38. #define SekEndTimesliceS68k(after) PicoCpuCS68k.cycles=after
  39. #define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase)
  40. #define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)
  41. #define SekDar(x) (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8])
  42. #define SekSr CycloneGetSr(&PicoCpuCM68k)
  43. #define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }
  44. #define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }
  45. #define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1)
  46. #define SekShouldInterrupt (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))
  47. #define SekInterrupt(i) PicoCpuCM68k.irq=i
  48. #define SekIrqLevel PicoCpuCM68k.irq
  49. #ifdef EMU_M68K
  50. #define EMU_CORE_DEBUG
  51. #endif
  52. #endif
  53. #ifdef EMU_F68K
  54. #include "../cpu/fame/fame.h"
  55. extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
  56. #define SekCyclesLeftNoMCD PicoCpuFM68k.io_cycle_counter
  57. #define SekCyclesLeft \
  58. (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)
  59. #define SekCyclesLeftS68k \
  60. ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuFS68k.io_cycle_counter)
  61. #define SekEndTimeslice(after) PicoCpuFM68k.io_cycle_counter=after
  62. #define SekEndTimesliceS68k(after) PicoCpuFS68k.io_cycle_counter=after
  63. #define SekPc fm68k_get_pc(&PicoCpuFM68k)
  64. #define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)
  65. #define SekDar(x) (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D)
  66. #define SekSr PicoCpuFM68k.sr
  67. #define SekSetStop(x) { \
  68. PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \
  69. if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \
  70. }
  71. #define SekSetStopS68k(x) { \
  72. PicoCpuFS68k.execinfo &= ~FM68K_HALTED; \
  73. if (x) { PicoCpuFS68k.execinfo |= FM68K_HALTED; PicoCpuFS68k.io_cycle_counter = 0; } \
  74. }
  75. #define SekIsStoppedS68k() (PicoCpuFS68k.execinfo&FM68K_HALTED)
  76. #define SekShouldInterrupt fm68k_would_interrupt()
  77. #define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq
  78. #define SekIrqLevel PicoCpuFM68k.interrupts[0]
  79. #ifdef EMU_M68K
  80. #define EMU_CORE_DEBUG
  81. #endif
  82. #endif
  83. #ifdef EMU_M68K
  84. #include "../cpu/musashi/m68kcpu.h"
  85. extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
  86. #ifndef SekCyclesLeft
  87. #define SekCyclesLeftNoMCD PicoCpuMM68k.cyc_remaining_cycles
  88. #define SekCyclesLeft \
  89. (((PicoAHW&1) && (PicoOpt & POPT_EN_MCD_PSYNC)) ? (SekCycleAim-SekCycleCnt) : SekCyclesLeftNoMCD)
  90. #define SekCyclesLeftS68k \
  91. ((PicoOpt & POPT_EN_MCD_PSYNC) ? (SekCycleAimS68k-SekCycleCntS68k) : PicoCpuMS68k.cyc_remaining_cycles)
  92. #define SekEndTimeslice(after) SET_CYCLES(after)
  93. #define SekEndTimesliceS68k(after) PicoCpuMS68k.cyc_remaining_cycles=after
  94. #define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC)
  95. #define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC)
  96. #define SekDar(x) PicoCpuMM68k.dar[x]
  97. #define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR)
  98. #define SekSetStop(x) { \
  99. if(x) { SET_CYCLES(0); PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \
  100. else PicoCpuMM68k.stopped=0; \
  101. }
  102. #define SekSetStopS68k(x) { \
  103. if(x) { SET_CYCLES(0); PicoCpuMS68k.stopped=STOP_LEVEL_STOP; } \
  104. else PicoCpuMS68k.stopped=0; \
  105. }
  106. #define SekIsStoppedS68k() (PicoCpuMS68k.stopped==STOP_LEVEL_STOP)
  107. #define SekShouldInterrupt (CPU_INT_LEVEL > FLAG_INT_MASK)
  108. #define SekInterrupt(irq) { \
  109. void *oldcontext = m68ki_cpu_p; \
  110. m68k_set_context(&PicoCpuMM68k); \
  111. m68k_set_irq(irq); \
  112. m68k_set_context(oldcontext); \
  113. }
  114. #define SekIrqLevel (PicoCpuMM68k.int_level >> 8)
  115. #endif
  116. #endif // EMU_M68K
  117. extern int SekCycleCnt; // cycles done in this frame
  118. extern int SekCycleAim; // cycle aim
  119. extern unsigned int SekCycleCntT; // total cycle counter, updated once per frame
  120. #define SekCyclesReset() { \
  121. SekCycleCntT+=SekCycleAim; \
  122. SekCycleCnt-=SekCycleAim; \
  123. SekCycleAim=0; \
  124. }
  125. #define SekCyclesBurn(c) SekCycleCnt+=c
  126. #define SekCyclesDone() (SekCycleAim-SekCyclesLeft) // number of cycles done in this frame (can be checked anywhere)
  127. #define SekCyclesDoneT() (SekCycleCntT+SekCyclesDone()) // total nuber of cycles done for this rom
  128. #define SekEndRun(after) { \
  129. SekCycleCnt -= SekCyclesLeft - (after); \
  130. if (SekCycleCnt < 0) SekCycleCnt = 0; \
  131. SekEndTimeslice(after); \
  132. }
  133. #define SekEndRunS68k(after) { \
  134. SekCycleCntS68k -= SekCyclesLeftS68k - (after); \
  135. if (SekCycleCntS68k < 0) SekCycleCntS68k = 0; \
  136. SekEndTimesliceS68k(after); \
  137. }
  138. extern int SekCycleCntS68k;
  139. extern int SekCycleAimS68k;
  140. #define SekCyclesResetS68k() { \
  141. SekCycleCntS68k-=SekCycleAimS68k; \
  142. SekCycleAimS68k=0; \
  143. }
  144. #define SekCyclesDoneS68k() (SekCycleAimS68k-SekCyclesLeftS68k)
  145. #ifdef EMU_CORE_DEBUG
  146. extern int dbg_irq_level;
  147. #undef SekEndTimeslice
  148. #undef SekCyclesBurn
  149. #undef SekEndRun
  150. #undef SekInterrupt
  151. #define SekEndTimeslice(c)
  152. #define SekCyclesBurn(c) c
  153. #define SekEndRun(c)
  154. #define SekInterrupt(irq) dbg_irq_level=irq
  155. #endif
  156. // ----------------------- Z80 CPU -----------------------
  157. #if defined(_USE_DRZ80)
  158. #include "../cpu/DrZ80/drz80.h"
  159. extern struct DrZ80 drZ80;
  160. #define z80_run(cycles) ((cycles) - DrZ80Run(&drZ80, cycles))
  161. #define z80_run_nr(cycles) DrZ80Run(&drZ80, cycles)
  162. #define z80_int() drZ80.Z80_IRQ = 1
  163. #define z80_cyclesLeft drZ80.cycles
  164. #define z80_pc() (drZ80.Z80PC - drZ80.Z80PC_BASE)
  165. #elif defined(_USE_CZ80)
  166. #include "../cpu/cz80/cz80.h"
  167. #define z80_run(cycles) Cz80_Exec(&CZ80, cycles)
  168. #define z80_run_nr(cycles) Cz80_Exec(&CZ80, cycles)
  169. #define z80_int() Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE)
  170. #define z80_cyclesLeft (CZ80.ICount - CZ80.ExtraCycles)
  171. #define z80_pc() Cz80_Get_Reg(&CZ80, CZ80_PC)
  172. #else
  173. #define z80_run(cycles) (cycles)
  174. #define z80_run_nr(cycles)
  175. #define z80_int()
  176. #endif
  177. #define Z80_STATE_SIZE 0x60
  178. extern int z80stopCycle; /* in 68k cycles */
  179. extern int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */
  180. extern int z80_cycle_aim;
  181. extern int z80_scanline;
  182. extern int z80_scanline_cycles; /* cycles done until z80_scanline */
  183. #define z80_resetCycles() \
  184. z80_cycle_cnt = z80_cycle_aim = z80_scanline = z80_scanline_cycles = 0;
  185. #define z80_cyclesDone() \
  186. (z80_cycle_aim - z80_cyclesLeft)
  187. #define cycles_68k_to_z80(x) ((x)*957 >> 11)
  188. // ----------------------- SH2 CPU -----------------------
  189. #include "cpu/sh2/sh2.h"
  190. extern SH2 sh2s[2];
  191. #define msh2 sh2s[0]
  192. #define ssh2 sh2s[1]
  193. #ifndef DRC_SH2
  194. # define ash2_end_run(after) if (sh2->icount > (after)) sh2->icount = after
  195. # define ash2_cycles_done() (sh2->cycles_aim - sh2->icount)
  196. #else
  197. # define ash2_end_run(after) { \
  198. if ((sh2->sr >> 12) > (after)) \
  199. { sh2->sr &= 0xfff; sh2->sr |= (after) << 12; } \
  200. }
  201. # define ash2_cycles_done() (sh2->cycles_aim - (sh2->sr >> 12))
  202. #endif
  203. //#define sh2_pc(c) (c) ? ssh2.ppc : msh2.ppc
  204. #define sh2_pc(c) (c) ? ssh2.pc : msh2.pc
  205. #define sh2_reg(c, x) (c) ? ssh2.r[x] : msh2.r[x]
  206. #define sh2_gbr(c) (c) ? ssh2.gbr : msh2.gbr
  207. #define sh2_vbr(c) (c) ? ssh2.vbr : msh2.vbr
  208. #define sh2_sr(c) (((c) ? ssh2.sr : msh2.sr) & 0xfff)
  209. #define sh2_set_gbr(c, v) \
  210. { if (c) ssh2.gbr = v; else msh2.gbr = v; }
  211. #define sh2_set_vbr(c, v) \
  212. { if (c) ssh2.vbr = v; else msh2.vbr = v; }
  213. // ---------------------------------------------------------
  214. // main oscillator clock which controls timing
  215. #define OSC_NTSC 53693100
  216. #define OSC_PAL 53203424
  217. struct PicoVideo
  218. {
  219. unsigned char reg[0x20];
  220. unsigned int command; // 32-bit Command
  221. unsigned char pending; // 1 if waiting for second half of 32-bit command
  222. unsigned char type; // Command type (v/c/vsram read/write)
  223. unsigned short addr; // Read/Write address
  224. int status; // Status bits
  225. unsigned char pending_ints; // pending interrupts: ??VH????
  226. signed char lwrite_cnt; // VDP write count during active display line
  227. unsigned short v_counter; // V-counter
  228. unsigned char pad[0x10];
  229. };
  230. struct PicoMisc
  231. {
  232. unsigned char rotate;
  233. unsigned char z80Run;
  234. unsigned char padTHPhase[2]; // 02 phase of gamepad TH switches
  235. unsigned short scanline; // 04 0 to 261||311
  236. char dirtyPal; // 06 Is the palette dirty (1 - change @ this frame, 2 - some time before)
  237. unsigned char hardware; // 07 Hardware value for country
  238. unsigned char pal; // 08 1=PAL 0=NTSC
  239. unsigned char sram_reg; // 09 SRAM reg. See SRR_* below
  240. unsigned short z80_bank68k; // 0a
  241. unsigned short pad0;
  242. unsigned char pad1;
  243. unsigned char z80_reset; // 0f z80 reset held
  244. unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay
  245. unsigned short eeprom_addr; // EEPROM address register
  246. unsigned char eeprom_cycle; // EEPROM cycle number
  247. unsigned char eeprom_slave; // EEPROM slave word for X24C02 and better SRAMs
  248. unsigned char eeprom_status;
  249. unsigned char pad2;
  250. unsigned short dma_xfers; // 18
  251. unsigned char eeprom_wb[2]; // EEPROM latch/write buffer
  252. unsigned int frame_count; // 1c for movies and idle det
  253. };
  254. struct PicoMS
  255. {
  256. unsigned char carthw[0x10];
  257. unsigned char io_ctl;
  258. unsigned char pad[0x4f];
  259. };
  260. // some assembly stuff depend on these, do not touch!
  261. struct Pico
  262. {
  263. unsigned char ram[0x10000]; // 0x00000 scratch ram
  264. union { // vram is byteswapped for easier reads when drawing
  265. unsigned short vram[0x8000]; // 0x10000
  266. unsigned char vramb[0x4000]; // VRAM in SMS mode
  267. };
  268. unsigned char zram[0x2000]; // 0x20000 Z80 ram
  269. unsigned char ioports[0x10]; // XXX: fix asm and mv
  270. unsigned char pad[0xf0]; // unused
  271. unsigned short cram[0x40]; // 0x22100
  272. unsigned short vsram[0x40]; // 0x22180
  273. unsigned char *rom; // 0x22200
  274. unsigned int romsize; // 0x22204
  275. struct PicoMisc m;
  276. struct PicoVideo video;
  277. struct PicoMS ms;
  278. };
  279. // sram
  280. #define SRR_MAPPED (1 << 0)
  281. #define SRR_READONLY (1 << 1)
  282. #define SRF_ENABLED (1 << 0)
  283. #define SRF_EEPROM (1 << 1)
  284. struct PicoSRAM
  285. {
  286. unsigned char *data; // actual data
  287. unsigned int start; // start address in 68k address space
  288. unsigned int end;
  289. unsigned char flags; // 0c: SRF_*
  290. unsigned char unused2;
  291. unsigned char changed;
  292. unsigned char eeprom_type; // eeprom type: 0: 7bit (24C01), 2: 2 addr words (X24C02+), 3: 3 addr words
  293. unsigned char unused3;
  294. unsigned char eeprom_bit_cl; // bit number for cl
  295. unsigned char eeprom_bit_in; // bit number for in
  296. unsigned char eeprom_bit_out; // bit number for out
  297. unsigned int size;
  298. };
  299. // MCD
  300. #include "cd/cd_sys.h"
  301. #include "cd/LC89510.h"
  302. #include "cd/gfx_cd.h"
  303. struct mcd_pcm
  304. {
  305. unsigned char control; // reg7
  306. unsigned char enabled; // reg8
  307. unsigned char cur_ch;
  308. unsigned char bank;
  309. int pad1;
  310. struct pcm_chan // 08, size 0x10
  311. {
  312. unsigned char regs[8];
  313. unsigned int addr; // .08: played sample address
  314. int pad;
  315. } ch[8];
  316. };
  317. struct mcd_misc
  318. {
  319. unsigned short hint_vector;
  320. unsigned char busreq;
  321. unsigned char s68k_pend_ints;
  322. unsigned int state_flags; // 04: emu state: reset_pending
  323. unsigned int counter75hz;
  324. unsigned int pad0;
  325. int timer_int3; // 10
  326. unsigned int timer_stopwatch;
  327. unsigned char bcram_reg; // 18: battery-backed RAM cart register
  328. unsigned char pad2;
  329. unsigned short pad3;
  330. int pad[9];
  331. };
  332. typedef struct
  333. {
  334. unsigned char bios[0x20000]; // 000000: 128K
  335. union { // 020000: 512K
  336. unsigned char prg_ram[0x80000];
  337. unsigned char prg_ram_b[4][0x20000];
  338. };
  339. union { // 0a0000: 256K
  340. struct {
  341. unsigned char word_ram2M[0x40000];
  342. unsigned char unused0[0x20000];
  343. };
  344. struct {
  345. unsigned char unused1[0x20000];
  346. unsigned char word_ram1M[2][0x20000];
  347. };
  348. };
  349. union { // 100000: 64K
  350. unsigned char pcm_ram[0x10000];
  351. unsigned char pcm_ram_b[0x10][0x1000];
  352. };
  353. unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs
  354. unsigned char bram[0x2000]; // 110200: 8K
  355. struct mcd_misc m; // 112200: misc
  356. struct mcd_pcm pcm; // 112240:
  357. _scd_toc TOC; // not to be saved
  358. CDD cdd;
  359. CDC cdc;
  360. _scd scd;
  361. Rot_Comp rot_comp;
  362. } mcd_state;
  363. // XXX: this will need to be reworked for cart+cd support.
  364. #define Pico_mcd ((mcd_state *)Pico.rom)
  365. // 32X
  366. #define P32XS_FM (1<<15)
  367. #define P32XS_REN (1<< 7)
  368. #define P32XS_nRES (1<< 1)
  369. #define P32XS_ADEN (1<< 0)
  370. #define P32XS2_ADEN (1<< 9)
  371. #define P32XS_FULL (1<< 7) // DREQ FIFO full
  372. #define P32XS_68S (1<< 2)
  373. #define P32XS_DMA (1<< 1)
  374. #define P32XS_RV (1<< 0)
  375. #define P32XV_nPAL (1<<15) // VDP
  376. #define P32XV_PRI (1<< 7)
  377. #define P32XV_Mx (3<< 0) // display mode mask
  378. #define P32XV_SFT (1<< 0)
  379. #define P32XV_VBLK (1<<15)
  380. #define P32XV_HBLK (1<<14)
  381. #define P32XV_PEN (1<<13)
  382. #define P32XV_nFEN (1<< 1)
  383. #define P32XV_FS (1<< 0)
  384. #define P32XP_FULL (1<<15) // PWM
  385. #define P32XP_EMPTY (1<<14)
  386. #define P32XF_68KPOLL (1 << 0)
  387. #define P32XF_MSH2POLL (1 << 1)
  388. #define P32XF_SSH2POLL (1 << 2)
  389. #define P32XF_68KVPOLL (1 << 3)
  390. #define P32XF_MSH2VPOLL (1 << 4)
  391. #define P32XF_SSH2VPOLL (1 << 5)
  392. #define P32XI_VRES (1 << 14/2) // IRL/2
  393. #define P32XI_VINT (1 << 12/2)
  394. #define P32XI_HINT (1 << 10/2)
  395. #define P32XI_CMD (1 << 8/2)
  396. #define P32XI_PWM (1 << 6/2)
  397. // peripheral reg access
  398. #define PREG8(regs,offs) ((unsigned char *)regs)[offs ^ 3]
  399. // real one is 4*2, but we use more because we don't lockstep
  400. #define DMAC_FIFO_LEN (4*4)
  401. #define PWM_BUFF_LEN 1024 // in one channel samples
  402. #define SH2_DRCBLK_RAM_SHIFT 1
  403. #define SH2_DRCBLK_DA_SHIFT 1
  404. #define SH2_WRITE_SHIFT 25
  405. struct Pico32x
  406. {
  407. unsigned short regs[0x20];
  408. unsigned short vdp_regs[0x10]; // 0x40
  409. unsigned short sh2_regs[3]; // 0x60
  410. unsigned char pending_fb;
  411. unsigned char dirty_pal;
  412. unsigned int emu_flags;
  413. unsigned char sh2irq_mask[2];
  414. unsigned char sh2irqi[2]; // individual
  415. unsigned int sh2irqs; // common irqs
  416. unsigned short dmac_fifo[DMAC_FIFO_LEN];
  417. unsigned int dmac_ptr;
  418. unsigned int pwm_irq_sample_cnt;
  419. unsigned int reserved[9];
  420. };
  421. struct Pico32xMem
  422. {
  423. unsigned char sdram[0x40000];
  424. #ifdef DRC_SH2
  425. unsigned short drcblk_ram[1 << (18 - SH2_DRCBLK_RAM_SHIFT)];
  426. #endif
  427. unsigned short dram[2][0x20000/2]; // AKA fb
  428. union {
  429. unsigned char m68k_rom[0x100];
  430. unsigned char m68k_rom_bank[0x10000]; // M68K_BANK_SIZE
  431. };
  432. unsigned char data_array[2][0x1000]; // cache in SH2s (can be used as RAM)
  433. #ifdef DRC_SH2
  434. unsigned short drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];
  435. #endif
  436. unsigned char sh2_rom_m[0x800];
  437. unsigned char sh2_rom_s[0x400];
  438. unsigned short pal[0x100];
  439. unsigned short pal_native[0x100]; // converted to native (for renderer)
  440. unsigned int sh2_peri_regs[2][0x200/4]; // periphereal regs of SH2s
  441. signed short pwm[2*PWM_BUFF_LEN]; // PWM buffer for current frame
  442. };
  443. // area.c
  444. extern void (*PicoLoadStateHook)(void);
  445. typedef struct {
  446. int chunk;
  447. int size;
  448. void *ptr;
  449. } carthw_state_chunk;
  450. extern carthw_state_chunk *carthw_chunks;
  451. #define CHUNK_CARTHW 64
  452. // cart.c
  453. extern int PicoCartResize(int newsize);
  454. extern void Byteswap(void *dst, const void *src, int len);
  455. extern void (*PicoCartMemSetup)(void);
  456. extern void (*PicoCartUnloadHook)(void);
  457. // debug.c
  458. int CM_compareRun(int cyc, int is_sub);
  459. // draw.c
  460. PICO_INTERNAL void PicoFrameStart(void);
  461. void PicoDrawSync(int to, int blank_last_line);
  462. void BackFill(int reg7, int sh);
  463. void FinalizeLine555(int sh, int line);
  464. extern int (*PicoScanBegin)(unsigned int num);
  465. extern int (*PicoScanEnd)(unsigned int num);
  466. extern int DrawScanline;
  467. #define MAX_LINE_SPRITES 29
  468. extern unsigned char HighLnSpr[240][3 + MAX_LINE_SPRITES];
  469. extern void *DrawLineDestBase;
  470. extern int DrawLineDestIncrement;
  471. // draw2.c
  472. PICO_INTERNAL void PicoFrameFull();
  473. // mode4.c
  474. void PicoFrameStartMode4(void);
  475. void PicoLineMode4(int line);
  476. void PicoDoHighPal555M4(void);
  477. void PicoDrawSetOutputMode4(pdso_t which);
  478. // memory.c
  479. PICO_INTERNAL void PicoMemSetup(void);
  480. unsigned int PicoRead8_io(unsigned int a);
  481. unsigned int PicoRead16_io(unsigned int a);
  482. void PicoWrite8_io(unsigned int a, unsigned int d);
  483. void PicoWrite16_io(unsigned int a, unsigned int d);
  484. // pico/memory.c
  485. PICO_INTERNAL void PicoMemSetupPico(void);
  486. // cd/memory.c
  487. PICO_INTERNAL void PicoMemSetupCD(void);
  488. void PicoMemStateLoaded(void);
  489. // pico.c
  490. extern struct Pico Pico;
  491. extern struct PicoSRAM SRam;
  492. extern int PicoPadInt[2];
  493. extern int emustatus;
  494. extern int scanlines_total;
  495. extern void (*PicoResetHook)(void);
  496. extern void (*PicoLineHook)(void);
  497. PICO_INTERNAL int CheckDMA(void);
  498. PICO_INTERNAL void PicoDetectRegion(void);
  499. PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done);
  500. // cd/pico.c
  501. PICO_INTERNAL void PicoInitMCD(void);
  502. PICO_INTERNAL void PicoExitMCD(void);
  503. PICO_INTERNAL void PicoPowerMCD(void);
  504. PICO_INTERNAL int PicoResetMCD(void);
  505. PICO_INTERNAL void PicoFrameMCD(void);
  506. // pico/pico.c
  507. PICO_INTERNAL void PicoInitPico(void);
  508. PICO_INTERNAL void PicoReratePico(void);
  509. // pico/xpcm.c
  510. PICO_INTERNAL void PicoPicoPCMUpdate(short *buffer, int length, int stereo);
  511. PICO_INTERNAL void PicoPicoPCMReset(void);
  512. PICO_INTERNAL void PicoPicoPCMRerate(int xpcm_rate);
  513. // sek.c
  514. PICO_INTERNAL void SekInit(void);
  515. PICO_INTERNAL int SekReset(void);
  516. PICO_INTERNAL void SekState(int *data);
  517. PICO_INTERNAL void SekSetRealTAS(int use_real);
  518. PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub);
  519. PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub);
  520. void SekStepM68k(void);
  521. void SekInitIdleDet(void);
  522. void SekFinishIdleDet(void);
  523. // cd/sek.c
  524. PICO_INTERNAL void SekInitS68k(void);
  525. PICO_INTERNAL int SekResetS68k(void);
  526. PICO_INTERNAL int SekInterruptS68k(int irq);
  527. // sound/sound.c
  528. PICO_INTERNAL void cdda_start_play();
  529. extern short cdda_out_buffer[2*1152];
  530. extern int PsndLen_exc_cnt;
  531. extern int PsndLen_exc_add;
  532. extern int timer_a_next_oflow, timer_a_step; // in z80 cycles
  533. extern int timer_b_next_oflow, timer_b_step;
  534. void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new);
  535. void ym2612_pack_state(void);
  536. void ym2612_unpack_state(void);
  537. #define TIMER_NO_OFLOW 0x70000000
  538. // tA = 72 * (1024 - NA) / M
  539. #define TIMER_A_TICK_ZCYCLES 17203
  540. // tB = 1152 * (256 - NA) / M
  541. #define TIMER_B_TICK_ZCYCLES 262800 // 275251 broken, see Dai Makaimura
  542. #define timers_cycle() \
  543. if (timer_a_next_oflow > 0 && timer_a_next_oflow < TIMER_NO_OFLOW) \
  544. timer_a_next_oflow -= Pico.m.pal ? 70938*256 : 59659*256; \
  545. if (timer_b_next_oflow > 0 && timer_b_next_oflow < TIMER_NO_OFLOW) \
  546. timer_b_next_oflow -= Pico.m.pal ? 70938*256 : 59659*256; \
  547. ym2612_sync_timers(0, ym2612.OPN.ST.mode, ym2612.OPN.ST.mode);
  548. #define timers_reset() \
  549. timer_a_next_oflow = timer_b_next_oflow = TIMER_NO_OFLOW; \
  550. timer_a_step = TIMER_A_TICK_ZCYCLES * 1024; \
  551. timer_b_step = TIMER_B_TICK_ZCYCLES * 256;
  552. // videoport.c
  553. PICO_INTERNAL_ASM void PicoVideoWrite(unsigned int a,unsigned short d);
  554. PICO_INTERNAL_ASM unsigned int PicoVideoRead(unsigned int a);
  555. PICO_INTERNAL_ASM unsigned int PicoVideoRead8(unsigned int a);
  556. extern int (*PicoDmaHook)(unsigned int source, int len, unsigned short **srcp, unsigned short **limitp);
  557. // misc.c
  558. PICO_INTERNAL_ASM void memcpy16(unsigned short *dest, unsigned short *src, int count);
  559. PICO_INTERNAL_ASM void memcpy16bswap(unsigned short *dest, void *src, int count);
  560. PICO_INTERNAL_ASM void memcpy32(int *dest, int *src, int count); // 32bit word count
  561. PICO_INTERNAL_ASM void memset32(int *dest, int c, int count);
  562. // eeprom.c
  563. void EEPROM_write8(unsigned int a, unsigned int d);
  564. void EEPROM_write16(unsigned int d);
  565. unsigned int EEPROM_read(void);
  566. // z80 functionality wrappers
  567. PICO_INTERNAL void z80_init(void);
  568. PICO_INTERNAL void z80_pack(void *data);
  569. PICO_INTERNAL int z80_unpack(const void *data);
  570. PICO_INTERNAL void z80_reset(void);
  571. PICO_INTERNAL void z80_exit(void);
  572. // cd/misc.c
  573. PICO_INTERNAL_ASM void wram_2M_to_1M(unsigned char *m);
  574. PICO_INTERNAL_ASM void wram_1M_to_2M(unsigned char *m);
  575. // cd/buffering.c
  576. PICO_INTERNAL void PicoCDBufferRead(void *dest, int lba);
  577. // sound/sound.c
  578. PICO_INTERNAL void PsndReset(void);
  579. PICO_INTERNAL void PsndDoDAC(int line_to);
  580. PICO_INTERNAL void PsndClear(void);
  581. PICO_INTERNAL void PsndGetSamples(int y);
  582. PICO_INTERNAL void PsndGetSamplesMS(void);
  583. extern int PsndDacLine;
  584. // sms.c
  585. #ifndef NO_SMS
  586. void PicoPowerMS(void);
  587. void PicoResetMS(void);
  588. void PicoMemSetupMS(void);
  589. void PicoStateLoadedMS(void);
  590. void PicoFrameMS(void);
  591. void PicoFrameDrawOnlyMS(void);
  592. #else
  593. #define PicoPowerMS()
  594. #define PicoResetMS()
  595. #define PicoMemSetupMS()
  596. #define PicoStateLoadedMS()
  597. #define PicoFrameMS()
  598. #define PicoFrameDrawOnlyMS()
  599. #endif
  600. // 32x/32x.c
  601. #ifndef NO_32X
  602. extern struct Pico32x Pico32x;
  603. void Pico32xInit(void);
  604. void PicoPower32x(void);
  605. void PicoReset32x(void);
  606. void Pico32xStartup(void);
  607. void PicoUnload32x(void);
  608. void PicoFrame32x(void);
  609. void p32x_update_irls(int nested_call);
  610. void p32x_reset_sh2s(void);
  611. // 32x/memory.c
  612. struct Pico32xMem *Pico32xMem;
  613. unsigned int PicoRead8_32x(unsigned int a);
  614. unsigned int PicoRead16_32x(unsigned int a);
  615. void PicoWrite8_32x(unsigned int a, unsigned int d);
  616. void PicoWrite16_32x(unsigned int a, unsigned int d);
  617. void PicoMemSetup32x(void);
  618. void Pico32xSwapDRAM(int b);
  619. void Pico32xStateLoaded(void);
  620. void p32x_poll_event(int cpu_mask, int is_vdp);
  621. // 32x/draw.c
  622. void FinalizeLine32xRGB555(int sh, int line);
  623. void PicoDraw32xLayer(int offs, int lines, int mdbg);
  624. void PicoDraw32xLayerMdOnly(int offs, int lines);
  625. extern int (*PicoScan32xBegin)(unsigned int num);
  626. extern int (*PicoScan32xEnd)(unsigned int num);
  627. enum {
  628. PDM32X_OFF,
  629. PDM32X_32X_ONLY,
  630. PDM32X_BOTH,
  631. };
  632. extern int Pico32xDrawMode;
  633. // 32x/pwm.c
  634. unsigned int p32x_pwm_read16(unsigned int a);
  635. void p32x_pwm_write16(unsigned int a, unsigned int d);
  636. void p32x_pwm_update(int *buf32, int length, int stereo);
  637. void p32x_timers_do(int line_call);
  638. void p32x_timers_recalc(void);
  639. extern int pwm_frame_smp_cnt;
  640. #else
  641. #define Pico32xInit()
  642. #define PicoPower32x()
  643. #define PicoReset32x()
  644. #define PicoFrame32x()
  645. #define PicoUnload32x()
  646. #define Pico32xStateLoaded()
  647. #define PicoDraw32xSetFrameMode(...)
  648. #define FinalizeLine32xRGB555 NULL
  649. #define p32x_pwm_update(...)
  650. #define p32x_timers_recalc()
  651. #endif
  652. /* avoid dependency on newer glibc */
  653. static __inline int isspace_(int c)
  654. {
  655. return (0x09 <= c && c <= 0x0d) || c == ' ';
  656. }
  657. #ifndef ARRAY_SIZE
  658. #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
  659. #endif
  660. // emulation event logging
  661. #ifndef EL_LOGMASK
  662. #define EL_LOGMASK 0
  663. #endif
  664. #define EL_HVCNT 0x00000001 /* hv counter reads */
  665. #define EL_SR 0x00000002 /* SR reads */
  666. #define EL_INTS 0x00000004 /* ints and acks */
  667. #define EL_YMTIMER 0x00000008 /* ym2612 timer stuff */
  668. #define EL_INTSW 0x00000010 /* log irq switching on/off */
  669. #define EL_ASVDP 0x00000020 /* VDP accesses during active scan */
  670. #define EL_VDPDMA 0x00000040 /* VDP DMA transfers and their timing */
  671. #define EL_BUSREQ 0x00000080 /* z80 busreq r/w or reset w */
  672. #define EL_Z80BNK 0x00000100 /* z80 i/o through bank area */
  673. #define EL_SRAMIO 0x00000200 /* sram i/o */
  674. #define EL_EEPROM 0x00000400 /* eeprom debug */
  675. #define EL_UIO 0x00000800 /* unmapped i/o */
  676. #define EL_IO 0x00001000 /* all i/o */
  677. #define EL_CDPOLL 0x00002000 /* MCD: log poll detection */
  678. #define EL_SVP 0x00004000 /* SVP stuff */
  679. #define EL_PICOHW 0x00008000 /* Pico stuff */
  680. #define EL_IDLE 0x00010000 /* idle loop det. */
  681. #define EL_CDREGS 0x00020000 /* MCD: register access */
  682. #define EL_CDREG3 0x00040000 /* MCD: register 3 only */
  683. #define EL_32X 0x00080000
  684. #define EL_PWM 0x00100000 /* 32X PWM stuff (LOTS of output) */
  685. #define EL_STATUS 0x40000000 /* status messages */
  686. #define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */
  687. #if EL_LOGMASK
  688. extern void lprintf(const char *fmt, ...);
  689. #define elprintf(w,f,...) \
  690. { \
  691. if ((w) & EL_LOGMASK) \
  692. lprintf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__); \
  693. }
  694. #elif defined(_MSC_VER)
  695. #define elprintf
  696. #else
  697. #define elprintf(w,f,...)
  698. #endif
  699. // profiling
  700. #ifdef PPROF
  701. #include <platform/linux/pprof.h>
  702. #else
  703. #define pprof_init()
  704. #define pprof_finish()
  705. #define pprof_start(x)
  706. #define pprof_end(...)
  707. #define pprof_end_sub(...)
  708. #endif
  709. // misc
  710. #ifdef _MSC_VER
  711. #define cdprintf
  712. #else
  713. #define cdprintf(x...)
  714. #endif
  715. #ifdef __i386__
  716. #define REGPARM(x) __attribute__((regparm(x)))
  717. #else
  718. #define REGPARM(x)
  719. #endif
  720. #ifdef __GNUC__
  721. #define NOINLINE __attribute__((noinline))
  722. #else
  723. #define NOINLINE
  724. #endif
  725. #ifdef __cplusplus
  726. } // End of extern "C"
  727. #endif
  728. #endif // PICO_INTERNAL_INCLUDED