memory_arm.S 7.7 KB

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  1. /*
  2. * PicoDrive 32X memory access functions, assembler version
  3. * (C) KUB, 2018
  4. *
  5. * This work is licensed under the terms of MAME license.
  6. * See COPYING file in the top-level directory.
  7. */
  8. #include "../pico_int_offs.h"
  9. @ 32X bank sizes... TODO this should somehow come from an include file
  10. .equ SH2_ROM_SHIFT, 10 @ 0x003fffff
  11. .equ SH2_RAM_SHIFT, 14 @ 0x0003ffff
  12. .equ SH2_DRAM_SHIFT,15 @ 0x0001ffff
  13. .equ SH2_DA_SHIFT, 20 @ 0x00000fff
  14. .equ SH2_DRAM_OW, 1<<(32-SH2_DRAM_SHIFT) @ DRAM overwrite mode bit
  15. .text
  16. @ u32 a
  17. .global sh2_read8_rom
  18. .global sh2_read8_sdram
  19. .global sh2_read8_da
  20. .global sh2_read8_dram
  21. .global sh2_read16_rom
  22. .global sh2_read16_sdram
  23. .global sh2_read16_da
  24. .global sh2_read16_dram
  25. .global sh2_read32_rom
  26. .global sh2_read32_sdram
  27. .global sh2_read32_da
  28. .global sh2_read32_dram
  29. @ u32 a, u32 d
  30. .global sh2_write8_sdram
  31. .global sh2_write8_da
  32. .global sh2_write8_dram
  33. .global sh2_write16_sdram
  34. .global sh2_write16_da
  35. .global sh2_write16_dram
  36. .global sh2_write32_sdram
  37. .global sh2_write32_da
  38. .global sh2_write32_dram
  39. sh2_read8_rom:
  40. ldr ip, [r1, #OFS_SH2_p_rom]
  41. eor r0, r0, #1
  42. mov r0, r0, lsl #SH2_ROM_SHIFT
  43. ldrb r0, [ip, r0, lsr #SH2_ROM_SHIFT]
  44. bx lr
  45. sh2_read8_sdram:
  46. ldr ip, [r1, #OFS_SH2_p_sdram]
  47. eor r0, r0, #1
  48. mov r0, r0, lsl #SH2_RAM_SHIFT
  49. ldrb r0, [ip, r0, lsr #SH2_RAM_SHIFT]
  50. bx lr
  51. sh2_read8_da:
  52. ldr ip, [r1, #OFS_SH2_p_da]
  53. eor r0, r0, #1
  54. mov r0, r0, lsl #SH2_DA_SHIFT
  55. ldrb r0, [ip, r0, lsr #SH2_DA_SHIFT]
  56. bx lr
  57. sh2_read8_dram:
  58. ldr ip, [r1, #OFS_SH2_p_dram]
  59. eor r0, r0, #1
  60. mov r0, r0, lsl #SH2_DRAM_SHIFT
  61. ldrb r0, [ip, r0, lsr #SH2_DRAM_SHIFT]
  62. bx lr
  63. sh2_read16_rom:
  64. ldr ip, [r1, #OFS_SH2_p_rom]
  65. mov r0, r0, lsl #SH2_ROM_SHIFT
  66. mov r0, r0, lsr #SH2_ROM_SHIFT
  67. ldrh r0, [ip, r0]
  68. bx lr
  69. sh2_read16_sdram:
  70. ldr ip, [r1, #OFS_SH2_p_sdram]
  71. mov r0, r0, lsl #SH2_RAM_SHIFT
  72. mov r0, r0, lsr #SH2_RAM_SHIFT
  73. ldrh r0, [ip, r0]
  74. bx lr
  75. sh2_read16_da:
  76. ldr ip, [r1, #OFS_SH2_p_da]
  77. mov r0, r0, lsl #SH2_DA_SHIFT
  78. mov r0, r0, lsr #SH2_DA_SHIFT
  79. ldrh r0, [ip, r0]
  80. bx lr
  81. sh2_read16_dram:
  82. ldr ip, [r1, #OFS_SH2_p_dram]
  83. mov r0, r0, lsl #SH2_DRAM_SHIFT
  84. mov r0, r0, lsr #SH2_DRAM_SHIFT
  85. ldrh r0, [ip, r0]
  86. bx lr
  87. sh2_read32_rom:
  88. ldr ip, [r1, #OFS_SH2_p_rom]
  89. mov r0, r0, lsl #SH2_ROM_SHIFT
  90. ldr r0, [ip, r0, lsr #SH2_ROM_SHIFT]
  91. mov r0, r0, ror #16
  92. bx lr
  93. sh2_read32_sdram:
  94. ldr ip, [r1, #OFS_SH2_p_sdram]
  95. mov r0, r0, lsl #SH2_RAM_SHIFT
  96. ldr r0, [ip, r0, lsr #SH2_RAM_SHIFT]
  97. mov r0, r0, ror #16
  98. bx lr
  99. sh2_read32_da:
  100. ldr ip, [r1, #OFS_SH2_p_da]
  101. mov r0, r0, lsl #SH2_DA_SHIFT
  102. ldr r0, [ip, r0, lsr #SH2_DA_SHIFT]
  103. mov r0, r0, ror #16
  104. bx lr
  105. sh2_read32_dram:
  106. ldr ip, [r1, #OFS_SH2_p_dram]
  107. mov r0, r0, lsl #SH2_DRAM_SHIFT
  108. ldr r0, [ip, r0, lsr #SH2_DRAM_SHIFT]
  109. mov r0, r0, ror #16
  110. bx lr
  111. sh2_write8_sdram:
  112. @ preserve r0 and r2 for tail call
  113. ldr ip, [r2, #OFS_SH2_p_sdram]
  114. eor r3, r0, #1
  115. mov r3, r3, lsl #SH2_RAM_SHIFT
  116. strb r1, [ip, r3, lsr #SH2_RAM_SHIFT]
  117. #ifdef DRC_SH2
  118. ldr ip, [r2, #OFS_SH2_p_drcblk_ram]
  119. ldrb r1, [ip, r3, lsr #SH2_RAM_SHIFT+1]
  120. bic r0, r0, #1
  121. cmp r1, #0
  122. bxeq lr
  123. b sh2_drc_wcheck_ram
  124. #else
  125. bx lr
  126. #endif
  127. sh2_write8_da:
  128. @ preserve r0 and r2 for tail call
  129. ldr ip, [r2, #OFS_SH2_p_da]
  130. eor r3, r0, #1
  131. mov r3, r3, lsl #SH2_DA_SHIFT
  132. strb r1, [ip, r3, lsr #SH2_DA_SHIFT]
  133. #ifdef DRC_SH2
  134. ldr ip, [r2, #OFS_SH2_p_drcblk_da]
  135. ldrb r1, [ip, r3, lsr #SH2_DA_SHIFT+1]
  136. bic r0, r0, #1
  137. cmp r1, #0
  138. bxeq lr
  139. b sh2_drc_wcheck_da
  140. #else
  141. bx lr
  142. #endif
  143. sh2_write8_dram:
  144. tst r1, #0xff
  145. ldrne ip, [r2, #OFS_SH2_p_dram]
  146. eorne r3, r0, #1
  147. movne r3, r3, lsl #SH2_DRAM_SHIFT
  148. strneb r1, [ip, r3, lsr #SH2_DRAM_SHIFT]
  149. bx lr
  150. sh2_write16_sdram:
  151. @ preserve r0 and r2 for tail call
  152. ldr ip, [r2, #OFS_SH2_p_sdram]
  153. mov r3, r0, lsl #SH2_RAM_SHIFT
  154. mov r3, r3, lsr #SH2_RAM_SHIFT
  155. strh r1, [ip, r3]
  156. #ifdef DRC_SH2
  157. ldr ip, [r2, #OFS_SH2_p_drcblk_ram]
  158. ldrb r1, [ip, r3, lsr #1]
  159. cmp r1, #0
  160. bxeq lr
  161. b sh2_drc_wcheck_ram
  162. #else
  163. bx lr
  164. #endif
  165. sh2_write16_da:
  166. @ preserve r0 and r2 for tail call
  167. ldr ip, [r2, #OFS_SH2_p_da]
  168. mov r3, r0, lsl #SH2_DA_SHIFT
  169. mov r3, r3, lsr #SH2_DA_SHIFT
  170. strh r1, [ip, r3]
  171. #ifdef DRC_SH2
  172. ldr ip, [r2, #OFS_SH2_p_drcblk_da]
  173. ldrb r1, [ip, r3, lsr #1]
  174. cmp r1, #0
  175. bxeq lr
  176. b sh2_drc_wcheck_da
  177. #else
  178. bx lr
  179. #endif
  180. sh2_write16_dram:
  181. ldr ip, [r2, #OFS_SH2_p_dram]
  182. tst r0, #SH2_DRAM_OW
  183. mov r3, r0, lsl #SH2_DRAM_SHIFT
  184. mov r3, r3, lsr #SH2_DRAM_SHIFT
  185. streqh r1, [ip, r3]
  186. bxeq lr
  187. add ip, ip, r3
  188. tst r1, #0xff
  189. strneb r1, [ip, #0]
  190. tst r1, #0xff00
  191. movne r1, r1, lsr #8
  192. strneb r1, [ip, #1]
  193. bx lr
  194. sh2_write32_sdram:
  195. @ preserve r0 and r2 for tail call
  196. ldr ip, [r2, #OFS_SH2_p_sdram]
  197. mov r1, r1, ror #16
  198. mov r3, r0, lsl #SH2_RAM_SHIFT
  199. str r1, [ip, r3, lsr #SH2_RAM_SHIFT]
  200. #ifdef DRC_SH2
  201. ldr ip, [r2, #OFS_SH2_p_drcblk_ram]
  202. ldrb r1, [ip, r3, lsr #SH2_RAM_SHIFT+1]!
  203. cmp r1, #0
  204. beq 1f
  205. stmfd sp!, {r0, r1, r2, ip}
  206. bl sh2_drc_wcheck_ram
  207. ldmfd sp!, {r0, r1, r2, ip}
  208. 1: ldrb r1, [ip, #1]
  209. cmp r1, #0
  210. bxeq lr
  211. add r0, r0, #2
  212. b sh2_drc_wcheck_ram
  213. #else
  214. bx lr
  215. #endif
  216. sh2_write32_da:
  217. @ preserve r0 and r2 for tail call
  218. ldr ip, [r2, #OFS_SH2_p_da]
  219. mov r1, r1, ror #16
  220. mov r3, r0, lsl #SH2_DA_SHIFT
  221. str r1, [ip, r3, lsr #SH2_DA_SHIFT]
  222. #ifdef DRC_SH2
  223. ldr ip, [r2, #OFS_SH2_p_drcblk_da]
  224. ldrb r1, [ip, r3, lsr #SH2_DA_SHIFT+1]!
  225. cmp r1, #0
  226. beq 1f
  227. stmfd sp!, {r0, r1, r2, ip}
  228. bl sh2_drc_wcheck_da
  229. ldmfd sp!, {r0, r1, r2, ip}
  230. 1: ldrb r1, [ip, #1]
  231. cmp r1, #0
  232. bxeq lr
  233. add r0, r0, #2
  234. b sh2_drc_wcheck_da
  235. #else
  236. bx lr
  237. #endif
  238. sh2_write32_dram:
  239. ldr ip, [r2, #OFS_SH2_p_dram]
  240. tst r0, #SH2_DRAM_OW
  241. mov r3, r0, lsl #SH2_DRAM_SHIFT
  242. moveq r1, r1, ror #16
  243. streq r1, [ip, r3, lsr #SH2_DRAM_SHIFT]
  244. bxeq lr
  245. #if 1
  246. ldr r0, [ip, r3, lsr #SH2_DRAM_SHIFT]
  247. mov r1, r1, ror #16
  248. mov r2, #0
  249. tst r1, #0x00ff0000
  250. orrne r2, r2, #0x00ff0000
  251. tst r1, #0xff000000
  252. orrne r2, r2, #0xff000000
  253. tst r1, #0x000000ff
  254. orrne r2, r2, #0x000000ff
  255. tst r1, #0x0000ff00
  256. orrne r2, r2, #0x0000ff00
  257. bic r0, r0, r2
  258. orr r0, r0, r1
  259. str r0, [ip, r3, lsr #SH2_DRAM_SHIFT]
  260. #else
  261. add ip, ip, r3, lsr #SH2_DRAM_SHIFT
  262. tst r1, #0x00ff0000
  263. lsrne r3, r1, #16
  264. strneb r3, [ip, #0]
  265. tst r1, #0xff000000
  266. lsrne r3, r1, #24
  267. strneb r3, [ip, #1]
  268. tst r1, #0x000000ff
  269. strneb r1, [ip, #2]
  270. tst r1, #0x0000ff00
  271. lsrne r3, r1, #8
  272. strneb r3, [ip, #3]
  273. #endif
  274. bx lr
  275. .pool
  276. @ vim:filetype=armasm