sh2.h 3.7 KB

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  1. #ifndef __SH2_H__
  2. #define __SH2_H__
  3. #include "../../pico/pico_port.h"
  4. // registers - matches structure order
  5. typedef enum {
  6. SHR_R0 = 0, SHR_SP = 15,
  7. SHR_PC, SHR_PPC, SHR_PR, SHR_SR,
  8. SHR_GBR, SHR_VBR, SHR_MACH, SHR_MACL,
  9. } sh2_reg_e;
  10. typedef struct SH2_
  11. {
  12. // registers. this MUST correlate with enum sh2_reg_e.
  13. unsigned int r[16]; // 00
  14. unsigned int pc; // 40
  15. unsigned int ppc;
  16. unsigned int pr;
  17. unsigned int sr;
  18. unsigned int gbr, vbr; // 50
  19. unsigned int mach, macl; // 58
  20. // common
  21. const void *read8_map;
  22. const void *read16_map;
  23. const void *read32_map;
  24. const void **write8_tab;
  25. const void **write16_tab;
  26. const void **write32_tab;
  27. // drc stuff
  28. int drc_tmp;
  29. int irq_cycles;
  30. void *p_bios; // convenience pointers
  31. void *p_da;
  32. void *p_sdram;
  33. void *p_rom;
  34. void *p_dram;
  35. void *p_drcblk_da;
  36. void *p_drcblk_ram;
  37. unsigned int pdb_io_csum[2];
  38. #define SH2_STATE_RUN (1 << 0) // to prevent recursion
  39. #define SH2_STATE_SLEEP (1 << 1)
  40. #define SH2_STATE_CPOLL (1 << 2) // polling comm regs
  41. #define SH2_STATE_VPOLL (1 << 3) // polling VDP
  42. unsigned int state;
  43. unsigned int poll_addr;
  44. int poll_cycles;
  45. int poll_cnt;
  46. // DRC branch cache. size must be 2^n and <=128
  47. struct { unsigned int pc; void *code; } branch_cache[128];
  48. // interpreter stuff
  49. int icount; // cycles left in current timeslice
  50. unsigned int ea;
  51. unsigned int delay;
  52. unsigned int test_irq;
  53. int pending_level; // MAX(pending_irl, pending_int_irq)
  54. int pending_irl;
  55. int pending_int_irq; // internal irq
  56. int pending_int_vector;
  57. int REGPARM(2) (*irq_callback)(struct SH2_ *sh2, int level);
  58. int is_slave;
  59. unsigned int cycles_timeslice;
  60. struct SH2_ *other_sh2;
  61. // we use 68k reference cycles for easier sync
  62. unsigned int m68krcycles_done;
  63. unsigned int mult_m68k_to_sh2;
  64. unsigned int mult_sh2_to_m68k;
  65. unsigned char data_array[0x1000]; // cache (can be used as RAM)
  66. unsigned int peri_regs[0x200/4]; // periphereal regs
  67. } SH2;
  68. #define CYCLE_MULT_SHIFT 10
  69. #define C_M68K_TO_SH2(xsh2, c) \
  70. (int)(((unsigned long long)(c) * (xsh2)->mult_m68k_to_sh2) >> CYCLE_MULT_SHIFT)
  71. #define C_SH2_TO_M68K(xsh2, c) \
  72. (int)(((unsigned long long)(c+3U) * (xsh2)->mult_sh2_to_m68k) >> CYCLE_MULT_SHIFT)
  73. int sh2_init(SH2 *sh2, int is_slave, SH2 *other_sh2);
  74. void sh2_finish(SH2 *sh2);
  75. void sh2_reset(SH2 *sh2);
  76. int sh2_irl_irq(SH2 *sh2, int level, int nested_call);
  77. void sh2_internal_irq(SH2 *sh2, int level, int vector);
  78. void sh2_do_irq(SH2 *sh2, int level, int vector);
  79. void sh2_pack(const SH2 *sh2, unsigned char *buff);
  80. void sh2_unpack(SH2 *sh2, const unsigned char *buff);
  81. int sh2_execute_drc(SH2 *sh2c, int cycles);
  82. int sh2_execute_interpreter(SH2 *sh2c, int cycles);
  83. static __inline int sh2_execute(SH2 *sh2, int cycles, int use_drc)
  84. {
  85. int ret;
  86. sh2->cycles_timeslice = cycles;
  87. #ifdef DRC_SH2
  88. if (use_drc)
  89. ret = sh2_execute_drc(sh2, cycles);
  90. else
  91. #endif
  92. ret = sh2_execute_interpreter(sh2, cycles);
  93. return sh2->cycles_timeslice - ret;
  94. }
  95. // regs, pending_int*, cycles, reserved
  96. #define SH2_STATE_SIZE ((24 + 2 + 2 + 12) * 4)
  97. // pico memhandlers
  98. // XXX: move somewhere else
  99. unsigned int REGPARM(2) p32x_sh2_read8(unsigned int a, SH2 *sh2);
  100. unsigned int REGPARM(2) p32x_sh2_read16(unsigned int a, SH2 *sh2);
  101. unsigned int REGPARM(2) p32x_sh2_read32(unsigned int a, SH2 *sh2);
  102. void REGPARM(3) p32x_sh2_write8 (unsigned int a, unsigned int d, SH2 *sh2);
  103. void REGPARM(3) p32x_sh2_write16(unsigned int a, unsigned int d, SH2 *sh2);
  104. void REGPARM(3) p32x_sh2_write32(unsigned int a, unsigned int d, SH2 *sh2);
  105. // debug
  106. #ifdef DRC_CMP
  107. void do_sh2_trace(SH2 *current, int cycles);
  108. void REGPARM(1) do_sh2_cmp(SH2 *current);
  109. #endif
  110. #endif /* __SH2_H__ */