MemoryCmn.c 6.5 KB

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  1. // common code for Memory.c and cd/Memory.c
  2. // (c) Copyright 2006-2007, Grazvydas "notaz" Ignotas
  3. #ifndef UTYPES_DEFINED
  4. typedef unsigned char u8;
  5. typedef unsigned short u16;
  6. typedef unsigned int u32;
  7. #define UTYPES_DEFINED
  8. #endif
  9. #ifndef _ASM_MEMORY_C
  10. static
  11. #endif
  12. u8 z80Read8(u32 a)
  13. {
  14. if(Pico.m.z80Run&1) return 0;
  15. a&=0x1fff;
  16. if (!(PicoOpt&POPT_EN_Z80))
  17. {
  18. // Z80 disabled, do some faking
  19. static u8 zerosent = 0;
  20. if(a == Pico.m.z80_lastaddr) { // probably polling something
  21. u8 d = Pico.m.z80_fakeval;
  22. if((d & 0xf) == 0xf && !zerosent) {
  23. d = 0; zerosent = 1;
  24. } else {
  25. Pico.m.z80_fakeval++;
  26. zerosent = 0;
  27. }
  28. return d;
  29. } else {
  30. Pico.m.z80_fakeval = 0;
  31. }
  32. }
  33. Pico.m.z80_lastaddr = (u16) a;
  34. return Pico.zram[a];
  35. }
  36. #ifndef _ASM_MEMORY_C
  37. static
  38. #endif
  39. u32 z80ReadBusReq(void)
  40. {
  41. u32 d=Pico.m.z80Run&1;
  42. if (!d) {
  43. // needed by buggy Terminator (Sega CD)
  44. int stop_before = SekCyclesDone() - z80stopCycle;
  45. //elprintf(EL_BUSREQ, "get_zrun: stop before: %i", stop_before);
  46. // note: if we use 20 or more here, Barkley Shut Up and Jam! will purposedly crash itself.
  47. // but CD Terminator needs at least 32, so it only works because next frame cycle wrap.
  48. if (stop_before > 0 && stop_before < 20) // Gens uses 16 here
  49. d = 1; // bus not yet available
  50. }
  51. elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d|0x80, SekCyclesDone(), SekPc);
  52. return d|0x80;
  53. }
  54. static void z80WriteBusReq(u32 d)
  55. {
  56. d&=1; d^=1;
  57. elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);
  58. if (d ^ Pico.m.z80Run)
  59. {
  60. if (d)
  61. {
  62. z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());
  63. }
  64. else
  65. {
  66. z80stopCycle = SekCyclesDone();
  67. if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset)
  68. PicoSyncZ80(z80stopCycle);
  69. }
  70. Pico.m.z80Run=d;
  71. }
  72. }
  73. static void z80WriteReset(u32 d)
  74. {
  75. d&=1; d^=1;
  76. elprintf(EL_BUSREQ, "set_zreset: %i->%i [%i] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);
  77. if (d ^ Pico.m.z80_reset)
  78. {
  79. if (d)
  80. {
  81. if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run)
  82. PicoSyncZ80(SekCyclesDone());
  83. }
  84. else
  85. {
  86. z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());
  87. z80_reset();
  88. }
  89. YM2612ResetChip();
  90. timers_reset();
  91. Pico.m.z80_reset=d;
  92. }
  93. }
  94. #ifndef _ASM_MEMORY_C
  95. static
  96. #endif
  97. u32 OtherRead16(u32 a, int realsize)
  98. {
  99. u32 d=0;
  100. if ((a&0xffffe0)==0xa10000) { // I/O ports
  101. a=(a>>1)&0xf;
  102. switch(a) {
  103. case 0: d=Pico.m.hardware; break; // Hardware value (Version register)
  104. case 1: d=PadRead(0); break;
  105. case 2: d=PadRead(1); break;
  106. default: d=Pico.ioports[a]; break; // IO ports can be used as RAM
  107. }
  108. d|=d<<8;
  109. goto end;
  110. }
  111. // rotate fakes next fetched instruction for Time Killers
  112. if (a==0xa11100) { // z80 busreq
  113. d=(z80ReadBusReq()<<8)|Pico.m.rotate++;
  114. goto end;
  115. }
  116. if ((a&0xff0000)==0xa00000)
  117. {
  118. if (Pico.m.z80Run&1)
  119. elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);
  120. if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)
  121. if ((a&0x6000)==0x4000) { d=ym2612_read_local_68k(); goto end; } // 0x4000-0x5fff
  122. elprintf(EL_ANOMALY, "68k bad read [%06x]", a);
  123. d=0xffff;
  124. goto end;
  125. }
  126. d = PicoRead16Hook(a, realsize);
  127. end:
  128. return d;
  129. }
  130. static void IoWrite8(u32 a, u32 d)
  131. {
  132. a=(a>>1)&0xf;
  133. // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
  134. if (PicoOpt&POPT_6BTN_PAD)
  135. {
  136. if (a==1) {
  137. Pico.m.padDelay[0] = 0;
  138. if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
  139. }
  140. else if (a==2) {
  141. Pico.m.padDelay[1] = 0;
  142. if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
  143. }
  144. }
  145. Pico.ioports[a]=(u8)d; // IO ports can be used as RAM
  146. }
  147. #ifndef _ASM_CD_MEMORY_C
  148. static
  149. #endif
  150. void OtherWrite8(u32 a,u32 d)
  151. {
  152. #if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)
  153. if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
  154. if ((a&0xff4000)==0xa00000) { // z80 RAM
  155. SekCyclesBurn(2); // hack
  156. if (!(Pico.m.z80Run&1) && !Pico.m.z80_reset) Pico.zram[a&0x1fff]=(u8)d;
  157. else elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);
  158. return;
  159. }
  160. if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=ym2612_write_local(a&3, d&0xff, 0)&1; return; } // FM Sound
  161. if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
  162. #endif
  163. if (a==0xa11100) { z80WriteBusReq(d); return; }
  164. if (a==0xa11200) { z80WriteReset(d); return; }
  165. #if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)
  166. if ((a&0xff7f00)==0xa06000) // Z80 BANK register
  167. {
  168. Pico.m.z80_bank68k>>=1;
  169. Pico.m.z80_bank68k|=(d&1)<<8;
  170. Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
  171. elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15);
  172. return;
  173. }
  174. #endif
  175. if ((a&0xe700e0)==0xc00000) {
  176. d&=0xff;
  177. PicoVideoWrite(a,(u16)(d|(d<<8))); // Byte access gets mirrored
  178. return;
  179. }
  180. PicoWrite8Hook(a, d&0xff, 8);
  181. }
  182. #ifndef _ASM_CD_MEMORY_C
  183. static
  184. #endif
  185. void OtherWrite16(u32 a,u32 d)
  186. {
  187. if (a==0xa11100) { z80WriteBusReq(d>>8); return; }
  188. if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
  189. if ((a&0xe700f8)==0xc00010||(a&0xff7ff8)==0xa07f10) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
  190. if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=ym2612_write_local(a&3, d&0xff, 0)&1; return; } // FM Sound
  191. if ((a&0xff4000)==0xa00000) { // Z80 ram (MSB only)
  192. if (!(Pico.m.z80Run&1) && !Pico.m.z80_reset) Pico.zram[a&0x1fff]=(u8)(d>>8);
  193. else elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %04x @ %06x", a, d&0xffff, SekPc);
  194. return;
  195. }
  196. if (a==0xa11200) { z80WriteReset(d>>8); return; }
  197. if ((a&0xff7f00)==0xa06000) // Z80 BANK register
  198. {
  199. Pico.m.z80_bank68k>>=1;
  200. Pico.m.z80_bank68k|=(d&1)<<8;
  201. Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
  202. elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15);
  203. return;
  204. }
  205. #ifndef _CD_MEMORY_C
  206. if (a >= SRam.start && a <= SRam.end) {
  207. elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d, SekPc);
  208. if ((Pico.m.sram_reg&0x16)==0x10) { // detected, not EEPROM, write not disabled
  209. u8 *pm=(u8 *)(SRam.data-SRam.start+a);
  210. *pm++=d>>8;
  211. *pm++=d;
  212. SRam.changed = 1;
  213. }
  214. else
  215. SRAMWrite(a, d);
  216. return;
  217. }
  218. #endif
  219. PicoWrite16Hook(a, d&0xffff, 16);
  220. }