m68kcpu.h 66 KB

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  1. #include <stdio.h>
  2. /* ======================================================================== */
  3. /* ========================= LICENSING & COPYRIGHT ======================== */
  4. /* ======================================================================== */
  5. /*
  6. * MUSASHI
  7. * Version 3.31
  8. *
  9. * A portable Motorola M680x0 processor emulation engine.
  10. * Copyright 1998-2007 Karl Stenerud. All rights reserved.
  11. *
  12. * This code may be freely used for non-commercial purposes as long as this
  13. * copyright notice remains unaltered in the source code and any binary files
  14. * containing this code in compiled form.
  15. *
  16. * All other lisencing terms must be negotiated with the author
  17. * (Karl Stenerud).
  18. *
  19. * The latest version of this code can be obtained at:
  20. * http://kstenerud.cjb.net
  21. */
  22. #ifndef M68KCPU__HEADER
  23. #define M68KCPU__HEADER
  24. // notaz: something's missing this
  25. #include <stdint.h>
  26. typedef uint64_t UINT64;
  27. typedef uint32_t UINT32;
  28. typedef uint16_t UINT16;
  29. typedef uint8_t UINT8;
  30. #include "m68k.h"
  31. #include <limits.h>
  32. #if M68K_EMULATE_ADDRESS_ERROR
  33. #include <setjmp.h>
  34. #endif /* M68K_EMULATE_ADDRESS_ERROR */
  35. /* ======================================================================== */
  36. /* ==================== ARCHITECTURE-DEPENDANT DEFINES ==================== */
  37. /* ======================================================================== */
  38. /* Check for > 32bit sizes */
  39. #if UINT_MAX > 0xffffffff
  40. #define M68K_INT_GT_32_BIT 1
  41. #else
  42. #define M68K_INT_GT_32_BIT 0
  43. #endif
  44. /* Data types used in this emulation core */
  45. #undef sint8
  46. #undef sint16
  47. #undef sint32
  48. #undef sint64
  49. #undef uint8
  50. #undef uint16
  51. #undef uint32
  52. #undef uint64
  53. #undef sint
  54. #undef uint
  55. #define sint8 signed char /* ASG: changed from char to signed char */
  56. #define sint16 signed short
  57. #define sint32 signed int /* AWJ: changed from long to int */
  58. #define uint8 unsigned char
  59. #define uint16 unsigned short
  60. #define uint32 unsigned int /* AWJ: changed from long to int */
  61. /* signed and unsigned int must be at least 32 bits wide */
  62. #define sint signed int
  63. #define uint unsigned int
  64. #if M68K_USE_64_BIT
  65. #define sint64 signed long long
  66. #define uint64 unsigned long long
  67. #else
  68. #define sint64 sint32
  69. #define uint64 uint32
  70. #endif /* M68K_USE_64_BIT */
  71. /* Allow for architectures that don't have 8-bit sizes */
  72. #if UCHAR_MAX == 0xff
  73. #define MAKE_INT_8(A) (sint8)(A)
  74. #else
  75. #undef sint8
  76. #define sint8 signed int
  77. #undef uint8
  78. #define uint8 unsigned int
  79. INLINE sint MAKE_INT_8(uint value)
  80. {
  81. return (value & 0x80) ? value | ~0xff : value & 0xff;
  82. }
  83. #endif /* UCHAR_MAX == 0xff */
  84. /* Allow for architectures that don't have 16-bit sizes */
  85. #if USHRT_MAX == 0xffff
  86. #define MAKE_INT_16(A) (sint16)(A)
  87. #else
  88. #undef sint16
  89. #define sint16 signed int
  90. #undef uint16
  91. #define uint16 unsigned int
  92. INLINE sint MAKE_INT_16(uint value)
  93. {
  94. return (value & 0x8000) ? value | ~0xffff : value & 0xffff;
  95. }
  96. #endif /* USHRT_MAX == 0xffff */
  97. /* Allow for architectures that don't have 32-bit sizes */
  98. #if UINT_MAX == 0xffffffff
  99. #define MAKE_INT_32(A) (sint32)(A)
  100. #else
  101. #undef sint32
  102. #define sint32 signed int
  103. #undef uint32
  104. #define uint32 unsigned int
  105. INLINE sint MAKE_INT_32(uint value)
  106. {
  107. return (value & 0x80000000) ? value | ~0xffffffff : value & 0xffffffff;
  108. }
  109. #endif /* UINT_MAX == 0xffffffff */
  110. /* ======================================================================== */
  111. /* ============================ GENERAL DEFINES =========================== */
  112. /* ======================================================================== */
  113. /* Exception Vectors handled by emulation */
  114. #define EXCEPTION_BUS_ERROR 2 /* This one is not emulated! */
  115. #define EXCEPTION_ADDRESS_ERROR 3 /* This one is partially emulated (doesn't stack a proper frame yet) */
  116. #undef EXCEPTION_ILLEGAL_INSTRUCTION
  117. #define EXCEPTION_ILLEGAL_INSTRUCTION 4
  118. #define EXCEPTION_ZERO_DIVIDE 5
  119. #define EXCEPTION_CHK 6
  120. #define EXCEPTION_TRAPV 7
  121. #define EXCEPTION_PRIVILEGE_VIOLATION 8
  122. #define EXCEPTION_TRACE 9
  123. #define EXCEPTION_1010 10
  124. #define EXCEPTION_1111 11
  125. #define EXCEPTION_FORMAT_ERROR 14
  126. #define EXCEPTION_UNINITIALIZED_INTERRUPT 15
  127. #define EXCEPTION_SPURIOUS_INTERRUPT 24
  128. #define EXCEPTION_INTERRUPT_AUTOVECTOR 24
  129. #define EXCEPTION_TRAP_BASE 32
  130. /* Function codes set by CPU during data/address bus activity */
  131. #define FUNCTION_CODE_USER_DATA 1
  132. #define FUNCTION_CODE_USER_PROGRAM 2
  133. #define FUNCTION_CODE_SUPERVISOR_DATA 5
  134. #define FUNCTION_CODE_SUPERVISOR_PROGRAM 6
  135. #define FUNCTION_CODE_CPU_SPACE 7
  136. /* CPU types for deciding what to emulate */
  137. #define CPU_TYPE_000 1
  138. #define CPU_TYPE_008 2
  139. #define CPU_TYPE_010 4
  140. #define CPU_TYPE_EC020 8
  141. #define CPU_TYPE_020 16
  142. #define CPU_TYPE_040 32
  143. /* Different ways to stop the CPU */
  144. #define STOP_LEVEL_STOP 1
  145. #define STOP_LEVEL_HALT 2
  146. /* Used for 68000 address error processing */
  147. #define INSTRUCTION_YES 0
  148. #define INSTRUCTION_NO 0x08
  149. #define MODE_READ 0x10
  150. #define MODE_WRITE 0
  151. #define RUN_MODE_NORMAL 0
  152. #define RUN_MODE_BERR_AERR_RESET 1
  153. #ifndef NULL
  154. #define NULL ((void*)0)
  155. #endif
  156. /* ======================================================================== */
  157. /* ================================ MACROS ================================ */
  158. /* ======================================================================== */
  159. /* ---------------------------- General Macros ---------------------------- */
  160. /* Bit Isolation Macros */
  161. #define BIT_0(A) ((A) & 0x00000001)
  162. #define BIT_1(A) ((A) & 0x00000002)
  163. #define BIT_2(A) ((A) & 0x00000004)
  164. #define BIT_3(A) ((A) & 0x00000008)
  165. #define BIT_4(A) ((A) & 0x00000010)
  166. #define BIT_5(A) ((A) & 0x00000020)
  167. #define BIT_6(A) ((A) & 0x00000040)
  168. #define BIT_7(A) ((A) & 0x00000080)
  169. #define BIT_8(A) ((A) & 0x00000100)
  170. #define BIT_9(A) ((A) & 0x00000200)
  171. #define BIT_A(A) ((A) & 0x00000400)
  172. #define BIT_B(A) ((A) & 0x00000800)
  173. #define BIT_C(A) ((A) & 0x00001000)
  174. #define BIT_D(A) ((A) & 0x00002000)
  175. #define BIT_E(A) ((A) & 0x00004000)
  176. #define BIT_F(A) ((A) & 0x00008000)
  177. #define BIT_10(A) ((A) & 0x00010000)
  178. #define BIT_11(A) ((A) & 0x00020000)
  179. #define BIT_12(A) ((A) & 0x00040000)
  180. #define BIT_13(A) ((A) & 0x00080000)
  181. #define BIT_14(A) ((A) & 0x00100000)
  182. #define BIT_15(A) ((A) & 0x00200000)
  183. #define BIT_16(A) ((A) & 0x00400000)
  184. #define BIT_17(A) ((A) & 0x00800000)
  185. #define BIT_18(A) ((A) & 0x01000000)
  186. #define BIT_19(A) ((A) & 0x02000000)
  187. #define BIT_1A(A) ((A) & 0x04000000)
  188. #define BIT_1B(A) ((A) & 0x08000000)
  189. #define BIT_1C(A) ((A) & 0x10000000)
  190. #define BIT_1D(A) ((A) & 0x20000000)
  191. #define BIT_1E(A) ((A) & 0x40000000)
  192. #define BIT_1F(A) ((A) & 0x80000000)
  193. /* Get the most significant bit for specific sizes */
  194. #define GET_MSB_8(A) ((A) & 0x80)
  195. #define GET_MSB_9(A) ((A) & 0x100)
  196. #define GET_MSB_16(A) ((A) & 0x8000)
  197. #define GET_MSB_17(A) ((A) & 0x10000)
  198. #define GET_MSB_32(A) ((A) & 0x80000000)
  199. #if M68K_USE_64_BIT
  200. #define GET_MSB_33(A) ((A) & 0x100000000)
  201. #endif /* M68K_USE_64_BIT */
  202. /* Isolate nibbles */
  203. #define LOW_NIBBLE(A) ((A) & 0x0f)
  204. #define HIGH_NIBBLE(A) ((A) & 0xf0)
  205. /* These are used to isolate 8, 16, and 32 bit sizes */
  206. #define MASK_OUT_ABOVE_2(A) ((A) & 3)
  207. #define MASK_OUT_ABOVE_8(A) ((A) & 0xff)
  208. #define MASK_OUT_ABOVE_16(A) ((A) & 0xffff)
  209. #define MASK_OUT_BELOW_2(A) ((A) & ~3)
  210. #define MASK_OUT_BELOW_8(A) ((A) & ~0xff)
  211. #define MASK_OUT_BELOW_16(A) ((A) & ~0xffff)
  212. /* No need to mask if we are 32 bit */
  213. #if M68K_INT_GT_32_BIT || M68K_USE_64_BIT
  214. #define MASK_OUT_ABOVE_32(A) ((A) & 0xffffffff)
  215. #define MASK_OUT_BELOW_32(A) ((A) & ~0xffffffff)
  216. #else
  217. #define MASK_OUT_ABOVE_32(A) (A)
  218. #define MASK_OUT_BELOW_32(A) 0
  219. #endif /* M68K_INT_GT_32_BIT || M68K_USE_64_BIT */
  220. /* Simulate address lines of 68k family */
  221. #define ADDRESS_68K(A) ((A)&CPU_ADDRESS_MASK)
  222. /* Shift & Rotate Macros. */
  223. #define LSL(A, C) ((A) << (C))
  224. #define LSR(A, C) ((A) >> (C))
  225. /* Some > 32-bit optimizations */
  226. #if M68K_INT_GT_32_BIT
  227. /* Shift left and right */
  228. #define LSR_32(A, C) ((A) >> (C))
  229. #define LSL_32(A, C) ((A) << (C))
  230. #else
  231. /* We have to do this because the morons at ANSI decided that shifts
  232. * by >= data size are undefined.
  233. */
  234. #define LSR_32(A, C) ((C) < 32 ? (A) >> (C) : 0)
  235. #define LSL_32(A, C) ((C) < 32 ? (A) << (C) : 0)
  236. #endif /* M68K_INT_GT_32_BIT */
  237. #if M68K_USE_64_BIT
  238. #define LSL_32_64(A, C) ((A) << (C))
  239. #define LSR_32_64(A, C) ((A) >> (C))
  240. #define ROL_33_64(A, C) (LSL_32_64(A, C) | LSR_32_64(A, 33-(C)))
  241. #define ROR_33_64(A, C) (LSR_32_64(A, C) | LSL_32_64(A, 33-(C)))
  242. #endif /* M68K_USE_64_BIT */
  243. #define ROL_8(A, C) MASK_OUT_ABOVE_8(LSL(A, C) | LSR(A, 8-(C)))
  244. #define ROL_9(A, C) (LSL(A, C) | LSR(A, 9-(C)))
  245. #define ROL_16(A, C) MASK_OUT_ABOVE_16(LSL(A, C) | LSR(A, 16-(C)))
  246. #define ROL_17(A, C) (LSL(A, C) | LSR(A, 17-(C)))
  247. #define ROL_32(A, C) MASK_OUT_ABOVE_32(LSL_32(A, C) | LSR_32(A, 32-(C)))
  248. #define ROL_33(A, C) (LSL_32(A, C) | LSR_32(A, 33-(C)))
  249. #define ROR_8(A, C) MASK_OUT_ABOVE_8(LSR(A, C) | LSL(A, 8-(C)))
  250. #define ROR_9(A, C) (LSR(A, C) | LSL(A, 9-(C)))
  251. #define ROR_16(A, C) MASK_OUT_ABOVE_16(LSR(A, C) | LSL(A, 16-(C)))
  252. #define ROR_17(A, C) (LSR(A, C) | LSL(A, 17-(C)))
  253. #define ROR_32(A, C) MASK_OUT_ABOVE_32(LSR_32(A, C) | LSL_32(A, 32-(C)))
  254. #define ROR_33(A, C) (LSR_32(A, C) | LSL_32(A, 33-(C)))
  255. /* ------------------------------ CPU Access ------------------------------ */
  256. /* Access the CPU registers */
  257. #define CPU_TYPE m68ki_cpu.cpu_type
  258. #define REG_DA m68ki_cpu.dar /* easy access to data and address regs */
  259. #define REG_D m68ki_cpu.dar
  260. #define REG_A (m68ki_cpu.dar+8)
  261. #define REG_PPC m68ki_cpu.ppc
  262. #define REG_PC m68ki_cpu.pc
  263. #define REG_SP_BASE m68ki_cpu.sp
  264. #define REG_USP m68ki_cpu.sp[0]
  265. #define REG_ISP m68ki_cpu.sp[4]
  266. #define REG_MSP m68ki_cpu.sp[6]
  267. #define REG_SP m68ki_cpu.dar[15]
  268. #define REG_VBR m68ki_cpu.vbr
  269. #define REG_SFC m68ki_cpu.sfc
  270. #define REG_DFC m68ki_cpu.dfc
  271. #define REG_CACR m68ki_cpu.cacr
  272. #define REG_CAAR m68ki_cpu.caar
  273. #define REG_IR m68ki_cpu.ir
  274. #define REG_FP m68ki_cpu.fpr
  275. #define REG_FPCR m68ki_cpu.fpcr
  276. #define REG_FPSR m68ki_cpu.fpsr
  277. #define REG_FPIAR m68ki_cpu.fpiar
  278. #define FLAG_T1 m68ki_cpu.t1_flag
  279. #define FLAG_T0 m68ki_cpu.t0_flag
  280. #define FLAG_S m68ki_cpu.s_flag
  281. #define FLAG_M m68ki_cpu.m_flag
  282. #define FLAG_X m68ki_cpu.x_flag
  283. #define FLAG_N m68ki_cpu.n_flag
  284. #define FLAG_Z m68ki_cpu.not_z_flag
  285. #define FLAG_V m68ki_cpu.v_flag
  286. #define FLAG_C m68ki_cpu.c_flag
  287. #define FLAG_INT_MASK m68ki_cpu.int_mask
  288. #define CPU_INT_LEVEL m68ki_cpu.int_level /* ASG: changed from CPU_INTS_PENDING */
  289. #define CPU_INT_CYCLES m68ki_cpu.int_cycles /* ASG */
  290. #define CPU_STOPPED m68ki_cpu.stopped
  291. #define CPU_PREF_ADDR m68ki_cpu.pref_addr
  292. #define CPU_PREF_DATA m68ki_cpu.pref_data
  293. #define CPU_ADDRESS_MASK m68ki_cpu.address_mask
  294. #define CPU_SR_MASK m68ki_cpu.sr_mask
  295. #define CPU_INSTR_MODE m68ki_cpu.instr_mode
  296. #define CPU_RUN_MODE m68ki_cpu.run_mode
  297. #define CYC_INSTRUCTION m68ki_cpu.cyc_instruction
  298. #define CYC_EXCEPTION m68ki_cpu.cyc_exception
  299. #define CYC_BCC_NOTAKE_B m68ki_cpu.cyc_bcc_notake_b
  300. #define CYC_BCC_NOTAKE_W m68ki_cpu.cyc_bcc_notake_w
  301. #define CYC_DBCC_F_NOEXP m68ki_cpu.cyc_dbcc_f_noexp
  302. #define CYC_DBCC_F_EXP m68ki_cpu.cyc_dbcc_f_exp
  303. #define CYC_SCC_R_TRUE m68ki_cpu.cyc_scc_r_true
  304. #define CYC_MOVEM_W m68ki_cpu.cyc_movem_w
  305. #define CYC_MOVEM_L m68ki_cpu.cyc_movem_l
  306. #define CYC_SHIFT m68ki_cpu.cyc_shift
  307. #define CYC_RESET m68ki_cpu.cyc_reset
  308. #define CALLBACK_INT_ACK m68ki_cpu.int_ack_callback
  309. #define CALLBACK_BKPT_ACK m68ki_cpu.bkpt_ack_callback
  310. #define CALLBACK_RESET_INSTR m68ki_cpu.reset_instr_callback
  311. #define CALLBACK_CMPILD_INSTR m68ki_cpu.cmpild_instr_callback
  312. #define CALLBACK_RTE_INSTR m68ki_cpu.rte_instr_callback
  313. #define CALLBACK_TAS_INSTR m68ki_cpu.tas_instr_callback
  314. #define CALLBACK_PC_CHANGED m68ki_cpu.pc_changed_callback
  315. #define CALLBACK_SET_FC m68ki_cpu.set_fc_callback
  316. #define CALLBACK_INSTR_HOOK m68ki_cpu.instr_hook_callback
  317. /* ----------------------------- Configuration ---------------------------- */
  318. /* These defines are dependant on the configuration defines in m68kconf.h */
  319. /* Disable certain comparisons if we're not using all CPU types */
  320. #if M68K_EMULATE_040
  321. #define CPU_TYPE_IS_040_PLUS(A) ((A) & CPU_TYPE_040)
  322. #define CPU_TYPE_IS_040_LESS(A) 1
  323. #else
  324. #define CPU_TYPE_IS_040_PLUS(A) 0
  325. #define CPU_TYPE_IS_040_LESS(A) 1
  326. #endif
  327. #if M68K_EMULATE_020
  328. #define CPU_TYPE_IS_020_PLUS(A) ((A) & (CPU_TYPE_020 | CPU_TYPE_040))
  329. #define CPU_TYPE_IS_020_LESS(A) 1
  330. #else
  331. #define CPU_TYPE_IS_020_PLUS(A) 0
  332. #define CPU_TYPE_IS_020_LESS(A) 1
  333. #endif
  334. #if M68K_EMULATE_EC020
  335. #define CPU_TYPE_IS_EC020_PLUS(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_040))
  336. #define CPU_TYPE_IS_EC020_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020))
  337. #else
  338. #define CPU_TYPE_IS_EC020_PLUS(A) CPU_TYPE_IS_020_PLUS(A)
  339. #define CPU_TYPE_IS_EC020_LESS(A) CPU_TYPE_IS_020_LESS(A)
  340. #endif
  341. #if M68K_EMULATE_010
  342. #define CPU_TYPE_IS_010(A) ((A) == CPU_TYPE_010)
  343. #define CPU_TYPE_IS_010_PLUS(A) ((A) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_040))
  344. #define CPU_TYPE_IS_010_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010))
  345. #else
  346. #define CPU_TYPE_IS_010(A) 0
  347. #define CPU_TYPE_IS_010_PLUS(A) CPU_TYPE_IS_EC020_PLUS(A)
  348. #define CPU_TYPE_IS_010_LESS(A) CPU_TYPE_IS_EC020_LESS(A)
  349. #endif
  350. #if M68K_EMULATE_020 || M68K_EMULATE_EC020
  351. #define CPU_TYPE_IS_020_VARIANT(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020))
  352. #else
  353. #define CPU_TYPE_IS_020_VARIANT(A) 0
  354. #endif
  355. #if M68K_EMULATE_040 || M68K_EMULATE_020 || M68K_EMULATE_EC020 || M68K_EMULATE_010
  356. #define CPU_TYPE_IS_000(A) ((A) == CPU_TYPE_000 || (A) == CPU_TYPE_008)
  357. #else
  358. #define CPU_TYPE_IS_000(A) 1
  359. #endif
  360. #if !M68K_SEPARATE_READS
  361. #define m68k_read_immediate_16(A) m68ki_read_program_16(A)
  362. #define m68k_read_immediate_32(A) m68ki_read_program_32(A)
  363. #define m68k_read_pcrelative_8(A) m68ki_read_program_8(A)
  364. #define m68k_read_pcrelative_16(A) m68ki_read_program_16(A)
  365. #define m68k_read_pcrelative_32(A) m68ki_read_program_32(A)
  366. #endif /* M68K_SEPARATE_READS */
  367. /* Enable or disable callback functions */
  368. #if M68K_EMULATE_INT_ACK
  369. #if M68K_EMULATE_INT_ACK == OPT_SPECIFY_HANDLER
  370. #define m68ki_int_ack(A) M68K_INT_ACK_CALLBACK(A)
  371. #else
  372. #define m68ki_int_ack(A) CALLBACK_INT_ACK(A)
  373. #endif
  374. #else
  375. /* Default action is to used autovector mode, which is most common */
  376. #define m68ki_int_ack(A) M68K_INT_ACK_AUTOVECTOR
  377. #endif /* M68K_EMULATE_INT_ACK */
  378. #if M68K_EMULATE_BKPT_ACK
  379. #if M68K_EMULATE_BKPT_ACK == OPT_SPECIFY_HANDLER
  380. #define m68ki_bkpt_ack(A) M68K_BKPT_ACK_CALLBACK(A)
  381. #else
  382. #define m68ki_bkpt_ack(A) CALLBACK_BKPT_ACK(A)
  383. #endif
  384. #else
  385. #define m68ki_bkpt_ack(A)
  386. #endif /* M68K_EMULATE_BKPT_ACK */
  387. #if M68K_EMULATE_RESET
  388. #if M68K_EMULATE_RESET == OPT_SPECIFY_HANDLER
  389. #define m68ki_output_reset() M68K_RESET_CALLBACK()
  390. #else
  391. #define m68ki_output_reset() CALLBACK_RESET_INSTR()
  392. #endif
  393. #else
  394. #define m68ki_output_reset()
  395. #endif /* M68K_EMULATE_RESET */
  396. #if M68K_CMPILD_HAS_CALLBACK
  397. #if M68K_CMPILD_HAS_CALLBACK == OPT_SPECIFY_HANDLER
  398. #define m68ki_cmpild_callback(v,r) M68K_CMPILD_CALLBACK(v,r)
  399. #else
  400. #define m68ki_cmpild_callback(v,r) CALLBACK_CMPILD_INSTR(v,r)
  401. #endif
  402. #else
  403. #define m68ki_cmpild_callback(v,r)
  404. #endif /* M68K_CMPILD_HAS_CALLBACK */
  405. #if M68K_RTE_HAS_CALLBACK
  406. #if M68K_RTE_HAS_CALLBACK == OPT_SPECIFY_HANDLER
  407. #define m68ki_rte_callback() M68K_RTE_CALLBACK()
  408. #else
  409. #define m68ki_rte_callback() CALLBACK_RTE_INSTR()
  410. #endif
  411. #else
  412. #define m68ki_rte_callback()
  413. #endif /* M68K_RTE_HAS_CALLBACK */
  414. #if M68K_TAS_HAS_CALLBACK
  415. #if M68K_TAS_HAS_CALLBACK == OPT_SPECIFY_HANDLER
  416. #define m68ki_tas_callback() M68K_TAS_CALLBACK()
  417. #else
  418. #define m68ki_tas_callback() CALLBACK_TAS_INSTR()
  419. #endif
  420. #else
  421. #define m68ki_tas_callback()
  422. #endif /* M68K_TAS_HAS_CALLBACK */
  423. #if M68K_INSTRUCTION_HOOK
  424. #if M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER
  425. #define m68ki_instr_hook() M68K_INSTRUCTION_CALLBACK()
  426. #else
  427. #define m68ki_instr_hook() CALLBACK_INSTR_HOOK()
  428. #endif
  429. #else
  430. #define m68ki_instr_hook()
  431. #endif /* M68K_INSTRUCTION_HOOK */
  432. #if M68K_MONITOR_PC
  433. #if M68K_MONITOR_PC == OPT_SPECIFY_HANDLER
  434. #define m68ki_pc_changed(A) M68K_SET_PC_CALLBACK(ADDRESS_68K(A))
  435. #else
  436. #define m68ki_pc_changed(A) CALLBACK_PC_CHANGED(ADDRESS_68K(A))
  437. #endif
  438. #else
  439. #define m68ki_pc_changed(A)
  440. #endif /* M68K_MONITOR_PC */
  441. /* Enable or disable function code emulation */
  442. #if M68K_EMULATE_FC
  443. #if M68K_EMULATE_FC == OPT_SPECIFY_HANDLER
  444. #define m68ki_set_fc(A) M68K_SET_FC_CALLBACK(A)
  445. #else
  446. #define m68ki_set_fc(A) CALLBACK_SET_FC(A)
  447. #endif
  448. #define m68ki_use_data_space() m68ki_address_space = FUNCTION_CODE_USER_DATA
  449. #define m68ki_use_program_space() m68ki_address_space = FUNCTION_CODE_USER_PROGRAM
  450. #define m68ki_get_address_space() m68ki_address_space
  451. #else
  452. #define m68ki_set_fc(A)
  453. #define m68ki_use_data_space()
  454. #define m68ki_use_program_space()
  455. #define m68ki_get_address_space() FUNCTION_CODE_USER_DATA
  456. #endif /* M68K_EMULATE_FC */
  457. /* Enable or disable trace emulation */
  458. #if M68K_EMULATE_TRACE
  459. /* Initiates trace checking before each instruction (t1) */
  460. #define m68ki_trace_t1() m68ki_tracing = FLAG_T1
  461. /* adds t0 to trace checking if we encounter change of flow */
  462. #define m68ki_trace_t0() m68ki_tracing |= FLAG_T0
  463. /* Clear all tracing */
  464. #define m68ki_clear_trace() m68ki_tracing = 0
  465. /* Cause a trace exception if we are tracing */
  466. #define m68ki_exception_if_trace() if(m68ki_tracing) m68ki_exception_trace()
  467. #else
  468. #define m68ki_trace_t1()
  469. #define m68ki_trace_t0()
  470. #define m68ki_clear_trace()
  471. #define m68ki_exception_if_trace()
  472. #endif /* M68K_EMULATE_TRACE */
  473. /* Address error */
  474. #if M68K_EMULATE_ADDRESS_ERROR
  475. #include <setjmp.h>
  476. extern jmp_buf m68ki_aerr_trap;
  477. #define m68ki_set_address_error_trap() \
  478. if(setjmp(m68ki_aerr_trap) != 0) \
  479. { \
  480. m68ki_exception_address_error(); \
  481. if(CPU_STOPPED) \
  482. { \
  483. SET_CYCLES(0); \
  484. CPU_INT_CYCLES = 0; \
  485. return m68ki_initial_cycles; \
  486. } \
  487. }
  488. #define m68ki_check_address_error(ADDR, WRITE_MODE, FC) \
  489. if((ADDR)&1) \
  490. { \
  491. m68ki_aerr_address = ADDR; \
  492. m68ki_aerr_write_mode = WRITE_MODE; \
  493. m68ki_aerr_fc = FC; \
  494. longjmp(m68ki_aerr_trap, 1); \
  495. }
  496. #define m68ki_check_address_error_010_less(ADDR, WRITE_MODE, FC) \
  497. if (CPU_TYPE_IS_010_LESS(CPU_TYPE)) \
  498. { \
  499. m68ki_check_address_error(ADDR, WRITE_MODE, FC) \
  500. }
  501. #else
  502. #define m68ki_set_address_error_trap()
  503. #define m68ki_check_address_error(ADDR, WRITE_MODE, FC)
  504. #define m68ki_check_address_error_010_less(ADDR, WRITE_MODE, FC)
  505. #endif /* M68K_ADDRESS_ERROR */
  506. /* Logging */
  507. #if M68K_LOG_ENABLE
  508. #include <stdio.h>
  509. extern FILE* M68K_LOG_FILEHANDLE
  510. extern char* m68ki_cpu_names[];
  511. #define M68K_DO_LOG(A) if(M68K_LOG_FILEHANDLE) fprintf A
  512. #if M68K_LOG_1010_1111
  513. #define M68K_DO_LOG_EMU(A) if(M68K_LOG_FILEHANDLE) fprintf A
  514. #else
  515. #define M68K_DO_LOG_EMU(A)
  516. #endif
  517. #else
  518. #define M68K_DO_LOG(A)
  519. #define M68K_DO_LOG_EMU(A)
  520. #endif
  521. /* -------------------------- EA / Operand Access ------------------------- */
  522. /*
  523. * The general instruction format follows this pattern:
  524. * .... XXX. .... .YYY
  525. * where XXX is register X and YYY is register Y
  526. */
  527. /* Data Register Isolation */
  528. #define DX (REG_D[(REG_IR >> 9) & 7])
  529. #define DY (REG_D[REG_IR & 7])
  530. /* Address Register Isolation */
  531. #define AX (REG_A[(REG_IR >> 9) & 7])
  532. #define AY (REG_A[REG_IR & 7])
  533. /* Effective Address Calculations */
  534. #define EA_AY_AI_8() AY /* address register indirect */
  535. #define EA_AY_AI_16() EA_AY_AI_8()
  536. #define EA_AY_AI_32() EA_AY_AI_8()
  537. #define EA_AY_PI_8() (AY++) /* postincrement (size = byte) */
  538. #define EA_AY_PI_16() ((AY+=2)-2) /* postincrement (size = word) */
  539. #define EA_AY_PI_32() ((AY+=4)-4) /* postincrement (size = long) */
  540. #define EA_AY_PD_8() (--AY) /* predecrement (size = byte) */
  541. #define EA_AY_PD_16() (AY-=2) /* predecrement (size = word) */
  542. #define EA_AY_PD_32() (AY-=4) /* predecrement (size = long) */
  543. #define EA_AY_DI_8() (AY+MAKE_INT_16(m68ki_read_imm_16())) /* displacement */
  544. #define EA_AY_DI_16() EA_AY_DI_8()
  545. #define EA_AY_DI_32() EA_AY_DI_8()
  546. #define EA_AY_IX_8() m68ki_get_ea_ix(AY) /* indirect + index */
  547. #define EA_AY_IX_16() EA_AY_IX_8()
  548. #define EA_AY_IX_32() EA_AY_IX_8()
  549. #define EA_AX_AI_8() AX
  550. #define EA_AX_AI_16() EA_AX_AI_8()
  551. #define EA_AX_AI_32() EA_AX_AI_8()
  552. #define EA_AX_PI_8() (AX++)
  553. #define EA_AX_PI_16() ((AX+=2)-2)
  554. #define EA_AX_PI_32() ((AX+=4)-4)
  555. #define EA_AX_PD_8() (--AX)
  556. #define EA_AX_PD_16() (AX-=2)
  557. #define EA_AX_PD_32() (AX-=4)
  558. #define EA_AX_DI_8() (AX+MAKE_INT_16(m68ki_read_imm_16()))
  559. #define EA_AX_DI_16() EA_AX_DI_8()
  560. #define EA_AX_DI_32() EA_AX_DI_8()
  561. #define EA_AX_IX_8() m68ki_get_ea_ix(AX)
  562. #define EA_AX_IX_16() EA_AX_IX_8()
  563. #define EA_AX_IX_32() EA_AX_IX_8()
  564. #define EA_A7_PI_8() ((REG_A[7]+=2)-2)
  565. #define EA_A7_PD_8() (REG_A[7]-=2)
  566. #define EA_AW_8() MAKE_INT_16(m68ki_read_imm_16()) /* absolute word */
  567. #define EA_AW_16() EA_AW_8()
  568. #define EA_AW_32() EA_AW_8()
  569. #define EA_AL_8() m68ki_read_imm_32() /* absolute long */
  570. #define EA_AL_16() EA_AL_8()
  571. #define EA_AL_32() EA_AL_8()
  572. #define EA_PCDI_8() m68ki_get_ea_pcdi() /* pc indirect + displacement */
  573. #define EA_PCDI_16() EA_PCDI_8()
  574. #define EA_PCDI_32() EA_PCDI_8()
  575. #define EA_PCIX_8() m68ki_get_ea_pcix() /* pc indirect + index */
  576. #define EA_PCIX_16() EA_PCIX_8()
  577. #define EA_PCIX_32() EA_PCIX_8()
  578. #define OPER_I_8() m68ki_read_imm_8()
  579. #define OPER_I_16() m68ki_read_imm_16()
  580. #define OPER_I_32() m68ki_read_imm_32()
  581. /* --------------------------- Status Register ---------------------------- */
  582. /* Flag Calculation Macros */
  583. #define CFLAG_8(A) (A)
  584. #define CFLAG_16(A) ((A)>>8)
  585. #if M68K_INT_GT_32_BIT
  586. #define CFLAG_ADD_32(S, D, R) ((R)>>24)
  587. #define CFLAG_SUB_32(S, D, R) ((R)>>24)
  588. #else
  589. #define CFLAG_ADD_32(S, D, R) (((S & D) | (~R & (S | D)))>>23)
  590. #define CFLAG_SUB_32(S, D, R) (((S & R) | (~D & (S | R)))>>23)
  591. #endif /* M68K_INT_GT_32_BIT */
  592. #define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R))
  593. #define VFLAG_ADD_16(S, D, R) (((S^R) & (D^R))>>8)
  594. #define VFLAG_ADD_32(S, D, R) (((S^R) & (D^R))>>24)
  595. #define VFLAG_SUB_8(S, D, R) ((S^D) & (R^D))
  596. #define VFLAG_SUB_16(S, D, R) (((S^D) & (R^D))>>8)
  597. #define VFLAG_SUB_32(S, D, R) (((S^D) & (R^D))>>24)
  598. #define NFLAG_8(A) (A)
  599. #define NFLAG_16(A) ((A)>>8)
  600. #define NFLAG_32(A) ((A)>>24)
  601. #define NFLAG_64(A) ((A)>>56)
  602. #define ZFLAG_8(A) MASK_OUT_ABOVE_8(A)
  603. #define ZFLAG_16(A) MASK_OUT_ABOVE_16(A)
  604. #define ZFLAG_32(A) MASK_OUT_ABOVE_32(A)
  605. /* Flag values */
  606. #define NFLAG_SET 0x80
  607. #define NFLAG_CLEAR 0
  608. #define CFLAG_SET 0x100
  609. #define CFLAG_CLEAR 0
  610. #define XFLAG_SET 0x100
  611. #define XFLAG_CLEAR 0
  612. #define VFLAG_SET 0x80
  613. #define VFLAG_CLEAR 0
  614. #define ZFLAG_SET 0
  615. #define ZFLAG_CLEAR 0xffffffff
  616. #define SFLAG_SET 4
  617. #define SFLAG_CLEAR 0
  618. #define MFLAG_SET 2
  619. #define MFLAG_CLEAR 0
  620. /* Turn flag values into 1 or 0 */
  621. #define XFLAG_AS_1() ((FLAG_X>>8)&1)
  622. #define NFLAG_AS_1() ((FLAG_N>>7)&1)
  623. #define VFLAG_AS_1() ((FLAG_V>>7)&1)
  624. #define ZFLAG_AS_1() (!FLAG_Z)
  625. #define CFLAG_AS_1() ((FLAG_C>>8)&1)
  626. /* Conditions */
  627. #define COND_CS() (FLAG_C&0x100)
  628. #define COND_CC() (!COND_CS())
  629. #define COND_VS() (FLAG_V&0x80)
  630. #define COND_VC() (!COND_VS())
  631. #define COND_NE() FLAG_Z
  632. #define COND_EQ() (!COND_NE())
  633. #define COND_MI() (FLAG_N&0x80)
  634. #define COND_PL() (!COND_MI())
  635. #define COND_LT() ((FLAG_N^FLAG_V)&0x80)
  636. #define COND_GE() (!COND_LT())
  637. #define COND_HI() (COND_CC() && COND_NE())
  638. #define COND_LS() (COND_CS() || COND_EQ())
  639. #define COND_GT() (COND_GE() && COND_NE())
  640. #define COND_LE() (COND_LT() || COND_EQ())
  641. /* Reversed conditions */
  642. #define COND_NOT_CS() COND_CC()
  643. #define COND_NOT_CC() COND_CS()
  644. #define COND_NOT_VS() COND_VC()
  645. #define COND_NOT_VC() COND_VS()
  646. #define COND_NOT_NE() COND_EQ()
  647. #define COND_NOT_EQ() COND_NE()
  648. #define COND_NOT_MI() COND_PL()
  649. #define COND_NOT_PL() COND_MI()
  650. #define COND_NOT_LT() COND_GE()
  651. #define COND_NOT_GE() COND_LT()
  652. #define COND_NOT_HI() COND_LS()
  653. #define COND_NOT_LS() COND_HI()
  654. #define COND_NOT_GT() COND_LE()
  655. #define COND_NOT_LE() COND_GT()
  656. /* Not real conditions, but here for convenience */
  657. #define COND_XS() (FLAG_X&0x100)
  658. #define COND_XC() (!COND_XS)
  659. /* Get the condition code register */
  660. #define m68ki_get_ccr() ((COND_XS() >> 4) | \
  661. (COND_MI() >> 4) | \
  662. (COND_EQ() << 2) | \
  663. (COND_VS() >> 6) | \
  664. (COND_CS() >> 8))
  665. /* Get the status register */
  666. #define m68ki_get_sr() ( FLAG_T1 | \
  667. FLAG_T0 | \
  668. (FLAG_S << 11) | \
  669. (FLAG_M << 11) | \
  670. FLAG_INT_MASK | \
  671. m68ki_get_ccr())
  672. /* ---------------------------- Cycle Counting ---------------------------- */
  673. #define ADD_CYCLES(A) m68ki_remaining_cycles += (A)
  674. #define USE_CYCLES(A) m68ki_remaining_cycles -= (A)
  675. #define SET_CYCLES(A) m68ki_remaining_cycles = A
  676. #define GET_CYCLES() m68ki_remaining_cycles
  677. #define USE_ALL_CYCLES() m68ki_remaining_cycles = 0
  678. /* ----------------------------- Read / Write ----------------------------- */
  679. /* Read from the current address space */
  680. #define m68ki_read_8(A) m68ki_read_8_fc (A, FLAG_S | m68ki_get_address_space())
  681. #define m68ki_read_16(A) m68ki_read_16_fc(A, FLAG_S | m68ki_get_address_space())
  682. #define m68ki_read_32(A) m68ki_read_32_fc(A, FLAG_S | m68ki_get_address_space())
  683. /* Write to the current data space */
  684. #define m68ki_write_8(A, V) m68ki_write_8_fc (A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
  685. #define m68ki_write_16(A, V) m68ki_write_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
  686. #define m68ki_write_32(A, V) m68ki_write_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
  687. #if M68K_SIMULATE_PD_WRITES
  688. #define m68ki_write_32_pd(A, V) m68ki_write_32_pd_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
  689. #else
  690. #define m68ki_write_32_pd(A, V) m68ki_write_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
  691. #endif
  692. /* map read immediate 8 to read immediate 16 */
  693. #define m68ki_read_imm_8() MASK_OUT_ABOVE_8(m68ki_read_imm_16())
  694. /* Map PC-relative reads */
  695. #define m68ki_read_pcrel_8(A) m68k_read_pcrelative_8(A)
  696. #define m68ki_read_pcrel_16(A) m68k_read_pcrelative_16(A)
  697. #define m68ki_read_pcrel_32(A) m68k_read_pcrelative_32(A)
  698. /* Read from the program space */
  699. #define m68ki_read_program_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
  700. #define m68ki_read_program_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
  701. #define m68ki_read_program_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
  702. /* Read from the data space */
  703. #define m68ki_read_data_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
  704. #define m68ki_read_data_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
  705. #define m68ki_read_data_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
  706. /* ======================================================================== */
  707. /* =============================== PROTOTYPES ============================= */
  708. /* ======================================================================== */
  709. typedef union
  710. {
  711. UINT64 i;
  712. double f;
  713. } fp_reg;
  714. typedef struct
  715. {
  716. uint cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, or 68020 */
  717. uint dar[16]; /* Data and Address Registers */
  718. uint ppc; /* Previous program counter */
  719. uint pc; /* Program Counter */
  720. uint sp[7]; /* User, Interrupt, and Master Stack Pointers */
  721. uint vbr; /* Vector Base Register (m68010+) */
  722. uint sfc; /* Source Function Code Register (m68010+) */
  723. uint dfc; /* Destination Function Code Register (m68010+) */
  724. uint cacr; /* Cache Control Register (m68020, unemulated) */
  725. uint caar; /* Cache Address Register (m68020, unemulated) */
  726. uint ir; /* Instruction Register */
  727. fp_reg fpr[8]; /* FPU Data Register (m68040) */
  728. uint fpiar; /* FPU Instruction Address Register (m68040) */
  729. uint fpsr; /* FPU Status Register (m68040) */
  730. uint fpcr; /* FPU Control Register (m68040) */
  731. uint t1_flag; /* Trace 1 */
  732. uint t0_flag; /* Trace 0 */
  733. uint s_flag; /* Supervisor */
  734. uint m_flag; /* Master/Interrupt state */
  735. uint x_flag; /* Extend */
  736. uint n_flag; /* Negative */
  737. uint not_z_flag; /* Zero, inverted for speedups */
  738. uint v_flag; /* Overflow */
  739. uint c_flag; /* Carry */
  740. uint int_mask; /* I0-I2 */
  741. uint int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
  742. uint int_cycles; /* ASG: extra cycles from generated interrupts */
  743. uint stopped; /* Stopped state */
  744. uint pref_addr; /* Last prefetch address */
  745. uint pref_data; /* Data in the prefetch queue */
  746. uint address_mask; /* Available address pins */
  747. uint sr_mask; /* Implemented status register bits */
  748. uint instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
  749. uint run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
  750. /* Clocks required for instructions / exceptions */
  751. uint cyc_bcc_notake_b;
  752. uint cyc_bcc_notake_w;
  753. uint cyc_dbcc_f_noexp;
  754. uint cyc_dbcc_f_exp;
  755. uint cyc_scc_r_true;
  756. uint cyc_movem_w;
  757. uint cyc_movem_l;
  758. uint cyc_shift;
  759. uint cyc_reset;
  760. uint8* cyc_instruction;
  761. uint8* cyc_exception;
  762. /* Callbacks to host */
  763. int (*int_ack_callback)(int int_line); /* Interrupt Acknowledge */
  764. void (*bkpt_ack_callback)(unsigned int data); /* Breakpoint Acknowledge */
  765. void (*reset_instr_callback)(void); /* Called when a RESET instruction is encountered */
  766. void (*cmpild_instr_callback)(unsigned int, int); /* Called when a CMPI.L #v, Dn instruction is encountered */
  767. void (*rte_instr_callback)(void); /* Called when a RTE instruction is encountered */
  768. int (*tas_instr_callback)(void); /* Called when a TAS instruction is encountered, allows / disallows writeback */
  769. void (*pc_changed_callback)(unsigned int new_pc); /* Called when the PC changes by a large amount */
  770. void (*set_fc_callback)(unsigned int new_fc); /* Called when the CPU function code changes */
  771. void (*instr_hook_callback)(void); /* Called every instruction cycle prior to execution */
  772. // notaz
  773. sint cyc_remaining_cycles;
  774. sint not_polling;
  775. } m68ki_cpu_core;
  776. // notaz
  777. extern m68ki_cpu_core *m68ki_cpu_p;
  778. #define m68ki_cpu (*m68ki_cpu_p)
  779. #define m68ki_remaining_cycles m68ki_cpu_p->cyc_remaining_cycles
  780. //extern m68ki_cpu_core m68ki_cpu;
  781. //extern sint m68ki_remaining_cycles;
  782. extern uint m68ki_tracing;
  783. extern uint8 m68ki_shift_8_table[];
  784. extern uint16 m68ki_shift_16_table[];
  785. extern uint m68ki_shift_32_table[];
  786. extern uint8 m68ki_exception_cycle_table[][256];
  787. extern uint m68ki_address_space;
  788. extern uint8 m68ki_ea_idx_cycle_table[];
  789. extern uint m68ki_aerr_address;
  790. extern uint m68ki_aerr_write_mode;
  791. extern uint m68ki_aerr_fc;
  792. /* Read data immediately after the program counter */
  793. INLINE uint m68ki_read_imm_16(void);
  794. INLINE uint m68ki_read_imm_32(void);
  795. /* Read data with specific function code */
  796. INLINE uint m68ki_read_8_fc (uint address, uint fc);
  797. INLINE uint m68ki_read_16_fc (uint address, uint fc);
  798. INLINE uint m68ki_read_32_fc (uint address, uint fc);
  799. /* Write data with specific function code */
  800. INLINE void m68ki_write_8_fc (uint address, uint fc, uint value);
  801. INLINE void m68ki_write_16_fc(uint address, uint fc, uint value);
  802. INLINE void m68ki_write_32_fc(uint address, uint fc, uint value);
  803. #if M68K_SIMULATE_PD_WRITES
  804. INLINE void m68ki_write_32_pd_fc(uint address, uint fc, uint value);
  805. #endif /* M68K_SIMULATE_PD_WRITES */
  806. /* Indexed and PC-relative ea fetching */
  807. INLINE uint m68ki_get_ea_pcdi(void);
  808. INLINE uint m68ki_get_ea_pcix(void);
  809. INLINE uint m68ki_get_ea_ix(uint An);
  810. /* Operand fetching */
  811. INLINE uint OPER_AY_AI_8(void);
  812. INLINE uint OPER_AY_AI_16(void);
  813. INLINE uint OPER_AY_AI_32(void);
  814. INLINE uint OPER_AY_PI_8(void);
  815. INLINE uint OPER_AY_PI_16(void);
  816. INLINE uint OPER_AY_PI_32(void);
  817. INLINE uint OPER_AY_PD_8(void);
  818. INLINE uint OPER_AY_PD_16(void);
  819. INLINE uint OPER_AY_PD_32(void);
  820. INLINE uint OPER_AY_DI_8(void);
  821. INLINE uint OPER_AY_DI_16(void);
  822. INLINE uint OPER_AY_DI_32(void);
  823. INLINE uint OPER_AY_IX_8(void);
  824. INLINE uint OPER_AY_IX_16(void);
  825. INLINE uint OPER_AY_IX_32(void);
  826. INLINE uint OPER_AX_AI_8(void);
  827. INLINE uint OPER_AX_AI_16(void);
  828. INLINE uint OPER_AX_AI_32(void);
  829. INLINE uint OPER_AX_PI_8(void);
  830. INLINE uint OPER_AX_PI_16(void);
  831. INLINE uint OPER_AX_PI_32(void);
  832. INLINE uint OPER_AX_PD_8(void);
  833. INLINE uint OPER_AX_PD_16(void);
  834. INLINE uint OPER_AX_PD_32(void);
  835. INLINE uint OPER_AX_DI_8(void);
  836. INLINE uint OPER_AX_DI_16(void);
  837. INLINE uint OPER_AX_DI_32(void);
  838. INLINE uint OPER_AX_IX_8(void);
  839. INLINE uint OPER_AX_IX_16(void);
  840. INLINE uint OPER_AX_IX_32(void);
  841. INLINE uint OPER_A7_PI_8(void);
  842. INLINE uint OPER_A7_PD_8(void);
  843. INLINE uint OPER_AW_8(void);
  844. INLINE uint OPER_AW_16(void);
  845. INLINE uint OPER_AW_32(void);
  846. INLINE uint OPER_AL_8(void);
  847. INLINE uint OPER_AL_16(void);
  848. INLINE uint OPER_AL_32(void);
  849. INLINE uint OPER_PCDI_8(void);
  850. INLINE uint OPER_PCDI_16(void);
  851. INLINE uint OPER_PCDI_32(void);
  852. INLINE uint OPER_PCIX_8(void);
  853. INLINE uint OPER_PCIX_16(void);
  854. INLINE uint OPER_PCIX_32(void);
  855. /* Stack operations */
  856. INLINE void m68ki_push_16(uint value);
  857. INLINE void m68ki_push_32(uint value);
  858. INLINE uint m68ki_pull_16(void);
  859. INLINE uint m68ki_pull_32(void);
  860. /* Program flow operations */
  861. INLINE void m68ki_jump(uint new_pc);
  862. INLINE void m68ki_jump_vector(uint vector);
  863. INLINE void m68ki_branch_8(uint offset);
  864. INLINE void m68ki_branch_16(uint offset);
  865. INLINE void m68ki_branch_32(uint offset);
  866. /* Status register operations. */
  867. INLINE void m68ki_set_s_flag(uint value); /* Only bit 2 of value should be set (i.e. 4 or 0) */
  868. INLINE void m68ki_set_sm_flag(uint value); /* only bits 1 and 2 of value should be set */
  869. INLINE void m68ki_set_ccr(uint value); /* set the condition code register */
  870. INLINE void m68ki_set_sr(uint value); /* set the status register */
  871. INLINE void m68ki_set_sr_noint(uint value); /* set the status register */
  872. /* Exception processing */
  873. INLINE uint m68ki_init_exception(void); /* Initial exception processing */
  874. INLINE void m68ki_stack_frame_3word(uint pc, uint sr); /* Stack various frame types */
  875. INLINE void m68ki_stack_frame_buserr(uint sr);
  876. INLINE void m68ki_stack_frame_0000(uint pc, uint sr, uint vector);
  877. INLINE void m68ki_stack_frame_0001(uint pc, uint sr, uint vector);
  878. INLINE void m68ki_stack_frame_0010(uint sr, uint vector);
  879. INLINE void m68ki_stack_frame_1000(uint pc, uint sr, uint vector);
  880. INLINE void m68ki_stack_frame_1010(uint sr, uint vector, uint pc);
  881. INLINE void m68ki_stack_frame_1011(uint sr, uint vector, uint pc);
  882. INLINE void m68ki_exception_trap(uint vector);
  883. INLINE void m68ki_exception_trapN(uint vector);
  884. INLINE void m68ki_exception_trace(void);
  885. INLINE void m68ki_exception_privilege_violation(void);
  886. INLINE void m68ki_exception_1010(void);
  887. INLINE void m68ki_exception_1111(void);
  888. INLINE void m68ki_exception_illegal(void);
  889. INLINE void m68ki_exception_format_error(void);
  890. INLINE void m68ki_exception_address_error(void);
  891. INLINE void m68ki_exception_interrupt(uint int_level);
  892. INLINE void m68ki_check_interrupts(void); /* ASG: check for interrupts */
  893. /* quick disassembly (used for logging) */
  894. char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type);
  895. /* ======================================================================== */
  896. /* =========================== UTILITY FUNCTIONS ========================== */
  897. /* ======================================================================== */
  898. /* ---------------------------- Read Immediate ---------------------------- */
  899. /* Handles all immediate reads, does address error check, function code setting,
  900. * and prefetching if they are enabled in m68kconf.h
  901. */
  902. INLINE uint m68ki_read_imm_16(void)
  903. {
  904. m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
  905. m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
  906. #if M68K_EMULATE_PREFETCH
  907. if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
  908. {
  909. CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
  910. CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
  911. }
  912. REG_PC += 2;
  913. return MASK_OUT_ABOVE_16(CPU_PREF_DATA >> ((2-((REG_PC-2)&2))<<3));
  914. #else
  915. REG_PC += 2;
  916. return m68k_read_immediate_16(ADDRESS_68K(REG_PC-2));
  917. #endif /* M68K_EMULATE_PREFETCH */
  918. }
  919. INLINE uint m68ki_read_imm_32(void)
  920. {
  921. #if M68K_EMULATE_PREFETCH
  922. uint temp_val;
  923. m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
  924. m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
  925. if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
  926. {
  927. CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
  928. CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
  929. }
  930. temp_val = CPU_PREF_DATA;
  931. REG_PC += 2;
  932. if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
  933. {
  934. CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
  935. CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
  936. temp_val = MASK_OUT_ABOVE_32((temp_val << 16) | (CPU_PREF_DATA >> 16));
  937. }
  938. REG_PC += 2;
  939. return temp_val;
  940. #else
  941. m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
  942. m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
  943. REG_PC += 4;
  944. return m68k_read_immediate_32(ADDRESS_68K(REG_PC-4));
  945. #endif /* M68K_EMULATE_PREFETCH */
  946. }
  947. /* ------------------------- Top level read/write ------------------------- */
  948. /* Handles all memory accesses (except for immediate reads if they are
  949. * configured to use separate functions in m68kconf.h).
  950. * All memory accesses must go through these top level functions.
  951. * These functions will also check for address error and set the function
  952. * code if they are enabled in m68kconf.h.
  953. */
  954. INLINE uint m68ki_read_8_fc(uint address, uint fc)
  955. {
  956. m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
  957. return m68k_read_memory_8(ADDRESS_68K(address));
  958. }
  959. INLINE uint m68ki_read_16_fc(uint address, uint fc)
  960. {
  961. m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
  962. m68ki_check_address_error_010_less(address, MODE_READ, fc); /* auto-disable (see m68kcpu.h) */
  963. return m68k_read_memory_16(ADDRESS_68K(address));
  964. }
  965. INLINE uint m68ki_read_32_fc(uint address, uint fc)
  966. {
  967. m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
  968. m68ki_check_address_error_010_less(address, MODE_READ, fc); /* auto-disable (see m68kcpu.h) */
  969. return m68k_read_memory_32(ADDRESS_68K(address));
  970. }
  971. INLINE void m68ki_write_8_fc(uint address, uint fc, uint value)
  972. {
  973. m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
  974. m68k_write_memory_8(ADDRESS_68K(address), value);
  975. }
  976. INLINE void m68ki_write_16_fc(uint address, uint fc, uint value)
  977. {
  978. m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
  979. m68ki_check_address_error_010_less(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
  980. m68k_write_memory_16(ADDRESS_68K(address), value);
  981. }
  982. INLINE void m68ki_write_32_fc(uint address, uint fc, uint value)
  983. {
  984. m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
  985. m68ki_check_address_error_010_less(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
  986. m68k_write_memory_32(ADDRESS_68K(address), value);
  987. }
  988. #if M68K_SIMULATE_PD_WRITES
  989. INLINE void m68ki_write_32_pd_fc(uint address, uint fc, uint value)
  990. {
  991. m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
  992. m68ki_check_address_error_010_less(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
  993. m68k_write_memory_32_pd(ADDRESS_68K(address), value);
  994. }
  995. #endif
  996. /* --------------------- Effective Address Calculation -------------------- */
  997. /* The program counter relative addressing modes cause operands to be
  998. * retrieved from program space, not data space.
  999. */
  1000. INLINE uint m68ki_get_ea_pcdi(void)
  1001. {
  1002. uint old_pc = REG_PC;
  1003. m68ki_use_program_space(); /* auto-disable */
  1004. return old_pc + MAKE_INT_16(m68ki_read_imm_16());
  1005. }
  1006. INLINE uint m68ki_get_ea_pcix(void)
  1007. {
  1008. m68ki_use_program_space(); /* auto-disable */
  1009. return m68ki_get_ea_ix(REG_PC);
  1010. }
  1011. /* Indexed addressing modes are encoded as follows:
  1012. *
  1013. * Base instruction format:
  1014. * F E D C B A 9 8 7 6 | 5 4 3 | 2 1 0
  1015. * x x x x x x x x x x | 1 1 0 | BASE REGISTER (An)
  1016. *
  1017. * Base instruction format for destination EA in move instructions:
  1018. * F E D C | B A 9 | 8 7 6 | 5 4 3 2 1 0
  1019. * x x x x | BASE REG | 1 1 0 | X X X X X X (An)
  1020. *
  1021. * Brief extension format:
  1022. * F | E D C | B | A 9 | 8 | 7 6 5 4 3 2 1 0
  1023. * D/A | REGISTER | W/L | SCALE | 0 | DISPLACEMENT
  1024. *
  1025. * Full extension format:
  1026. * F E D C B A 9 8 7 6 5 4 3 2 1 0
  1027. * D/A | REGISTER | W/L | SCALE | 1 | BS | IS | BD SIZE | 0 | I/IS
  1028. * BASE DISPLACEMENT (0, 16, 32 bit) (bd)
  1029. * OUTER DISPLACEMENT (0, 16, 32 bit) (od)
  1030. *
  1031. * D/A: 0 = Dn, 1 = An (Xn)
  1032. * W/L: 0 = W (sign extend), 1 = L (.SIZE)
  1033. * SCALE: 00=1, 01=2, 10=4, 11=8 (*SCALE)
  1034. * BS: 0=add base reg, 1=suppress base reg (An suppressed)
  1035. * IS: 0=add index, 1=suppress index (Xn suppressed)
  1036. * BD SIZE: 00=reserved, 01=NULL, 10=Word, 11=Long (size of bd)
  1037. *
  1038. * IS I/IS Operation
  1039. * 0 000 No Memory Indirect
  1040. * 0 001 indir prex with null outer
  1041. * 0 010 indir prex with word outer
  1042. * 0 011 indir prex with long outer
  1043. * 0 100 reserved
  1044. * 0 101 indir postx with null outer
  1045. * 0 110 indir postx with word outer
  1046. * 0 111 indir postx with long outer
  1047. * 1 000 no memory indirect
  1048. * 1 001 mem indir with null outer
  1049. * 1 010 mem indir with word outer
  1050. * 1 011 mem indir with long outer
  1051. * 1 100-111 reserved
  1052. */
  1053. INLINE uint m68ki_get_ea_ix(uint An)
  1054. {
  1055. /* An = base register */
  1056. uint extension = m68ki_read_imm_16();
  1057. uint Xn = 0; /* Index register */
  1058. uint bd = 0; /* Base Displacement */
  1059. uint od = 0; /* Outer Displacement */
  1060. if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
  1061. {
  1062. /* Calculate index */
  1063. Xn = REG_DA[extension>>12]; /* Xn */
  1064. if(!BIT_B(extension)) /* W/L */
  1065. Xn = MAKE_INT_16(Xn);
  1066. /* Add base register and displacement and return */
  1067. return An + Xn + MAKE_INT_8(extension);
  1068. }
  1069. /* Brief extension format */
  1070. if(!BIT_8(extension))
  1071. {
  1072. /* Calculate index */
  1073. Xn = REG_DA[extension>>12]; /* Xn */
  1074. if(!BIT_B(extension)) /* W/L */
  1075. Xn = MAKE_INT_16(Xn);
  1076. /* Add scale if proper CPU type */
  1077. if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
  1078. Xn <<= (extension>>9) & 3; /* SCALE */
  1079. /* Add base register and displacement and return */
  1080. return An + Xn + MAKE_INT_8(extension);
  1081. }
  1082. /* Full extension format */
  1083. USE_CYCLES(m68ki_ea_idx_cycle_table[extension&0x3f]);
  1084. /* Check if base register is present */
  1085. if(BIT_7(extension)) /* BS */
  1086. An = 0; /* An */
  1087. /* Check if index is present */
  1088. if(!BIT_6(extension)) /* IS */
  1089. {
  1090. Xn = REG_DA[extension>>12]; /* Xn */
  1091. if(!BIT_B(extension)) /* W/L */
  1092. Xn = MAKE_INT_16(Xn);
  1093. Xn <<= (extension>>9) & 3; /* SCALE */
  1094. }
  1095. /* Check if base displacement is present */
  1096. if(BIT_5(extension)) /* BD SIZE */
  1097. bd = BIT_4(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16());
  1098. /* If no indirect action, we are done */
  1099. if(!(extension&7)) /* No Memory Indirect */
  1100. return An + bd + Xn;
  1101. /* Check if outer displacement is present */
  1102. if(BIT_1(extension)) /* I/IS: od */
  1103. od = BIT_0(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16());
  1104. /* Postindex */
  1105. if(BIT_2(extension)) /* I/IS: 0 = preindex, 1 = postindex */
  1106. return m68ki_read_32(An + bd) + Xn + od;
  1107. /* Preindex */
  1108. return m68ki_read_32(An + bd + Xn) + od;
  1109. }
  1110. /* Fetch operands */
  1111. INLINE uint OPER_AY_AI_8(void) {uint ea = EA_AY_AI_8(); return m68ki_read_8(ea); }
  1112. INLINE uint OPER_AY_AI_16(void) {uint ea = EA_AY_AI_16(); return m68ki_read_16(ea);}
  1113. INLINE uint OPER_AY_AI_32(void) {uint ea = EA_AY_AI_32(); return m68ki_read_32(ea);}
  1114. INLINE uint OPER_AY_PI_8(void) {uint ea = EA_AY_PI_8(); return m68ki_read_8(ea); }
  1115. INLINE uint OPER_AY_PI_16(void) {uint ea = EA_AY_PI_16(); return m68ki_read_16(ea);}
  1116. INLINE uint OPER_AY_PI_32(void) {uint ea = EA_AY_PI_32(); return m68ki_read_32(ea);}
  1117. INLINE uint OPER_AY_PD_8(void) {uint ea = EA_AY_PD_8(); return m68ki_read_8(ea); }
  1118. INLINE uint OPER_AY_PD_16(void) {uint ea = EA_AY_PD_16(); return m68ki_read_16(ea);}
  1119. INLINE uint OPER_AY_PD_32(void) {uint ea = EA_AY_PD_32(); return m68ki_read_32(ea);}
  1120. INLINE uint OPER_AY_DI_8(void) {uint ea = EA_AY_DI_8(); return m68ki_read_8(ea); }
  1121. INLINE uint OPER_AY_DI_16(void) {uint ea = EA_AY_DI_16(); return m68ki_read_16(ea);}
  1122. INLINE uint OPER_AY_DI_32(void) {uint ea = EA_AY_DI_32(); return m68ki_read_32(ea);}
  1123. INLINE uint OPER_AY_IX_8(void) {uint ea = EA_AY_IX_8(); return m68ki_read_8(ea); }
  1124. INLINE uint OPER_AY_IX_16(void) {uint ea = EA_AY_IX_16(); return m68ki_read_16(ea);}
  1125. INLINE uint OPER_AY_IX_32(void) {uint ea = EA_AY_IX_32(); return m68ki_read_32(ea);}
  1126. INLINE uint OPER_AX_AI_8(void) {uint ea = EA_AX_AI_8(); return m68ki_read_8(ea); }
  1127. INLINE uint OPER_AX_AI_16(void) {uint ea = EA_AX_AI_16(); return m68ki_read_16(ea);}
  1128. INLINE uint OPER_AX_AI_32(void) {uint ea = EA_AX_AI_32(); return m68ki_read_32(ea);}
  1129. INLINE uint OPER_AX_PI_8(void) {uint ea = EA_AX_PI_8(); return m68ki_read_8(ea); }
  1130. INLINE uint OPER_AX_PI_16(void) {uint ea = EA_AX_PI_16(); return m68ki_read_16(ea);}
  1131. INLINE uint OPER_AX_PI_32(void) {uint ea = EA_AX_PI_32(); return m68ki_read_32(ea);}
  1132. INLINE uint OPER_AX_PD_8(void) {uint ea = EA_AX_PD_8(); return m68ki_read_8(ea); }
  1133. INLINE uint OPER_AX_PD_16(void) {uint ea = EA_AX_PD_16(); return m68ki_read_16(ea);}
  1134. INLINE uint OPER_AX_PD_32(void) {uint ea = EA_AX_PD_32(); return m68ki_read_32(ea);}
  1135. INLINE uint OPER_AX_DI_8(void) {uint ea = EA_AX_DI_8(); return m68ki_read_8(ea); }
  1136. INLINE uint OPER_AX_DI_16(void) {uint ea = EA_AX_DI_16(); return m68ki_read_16(ea);}
  1137. INLINE uint OPER_AX_DI_32(void) {uint ea = EA_AX_DI_32(); return m68ki_read_32(ea);}
  1138. INLINE uint OPER_AX_IX_8(void) {uint ea = EA_AX_IX_8(); return m68ki_read_8(ea); }
  1139. INLINE uint OPER_AX_IX_16(void) {uint ea = EA_AX_IX_16(); return m68ki_read_16(ea);}
  1140. INLINE uint OPER_AX_IX_32(void) {uint ea = EA_AX_IX_32(); return m68ki_read_32(ea);}
  1141. INLINE uint OPER_A7_PI_8(void) {uint ea = EA_A7_PI_8(); return m68ki_read_8(ea); }
  1142. INLINE uint OPER_A7_PD_8(void) {uint ea = EA_A7_PD_8(); return m68ki_read_8(ea); }
  1143. INLINE uint OPER_AW_8(void) {uint ea = EA_AW_8(); return m68ki_read_8(ea); }
  1144. INLINE uint OPER_AW_16(void) {uint ea = EA_AW_16(); return m68ki_read_16(ea);}
  1145. INLINE uint OPER_AW_32(void) {uint ea = EA_AW_32(); return m68ki_read_32(ea);}
  1146. INLINE uint OPER_AL_8(void) {uint ea = EA_AL_8(); return m68ki_read_8(ea); }
  1147. INLINE uint OPER_AL_16(void) {uint ea = EA_AL_16(); return m68ki_read_16(ea);}
  1148. INLINE uint OPER_AL_32(void) {uint ea = EA_AL_32(); return m68ki_read_32(ea);}
  1149. INLINE uint OPER_PCDI_8(void) {uint ea = EA_PCDI_8(); return m68ki_read_pcrel_8(ea); }
  1150. INLINE uint OPER_PCDI_16(void) {uint ea = EA_PCDI_16(); return m68ki_read_pcrel_16(ea);}
  1151. INLINE uint OPER_PCDI_32(void) {uint ea = EA_PCDI_32(); return m68ki_read_pcrel_32(ea);}
  1152. INLINE uint OPER_PCIX_8(void) {uint ea = EA_PCIX_8(); return m68ki_read_pcrel_8(ea); }
  1153. INLINE uint OPER_PCIX_16(void) {uint ea = EA_PCIX_16(); return m68ki_read_pcrel_16(ea);}
  1154. INLINE uint OPER_PCIX_32(void) {uint ea = EA_PCIX_32(); return m68ki_read_pcrel_32(ea);}
  1155. /* ---------------------------- Stack Functions --------------------------- */
  1156. /* Push/pull data from the stack */
  1157. INLINE void m68ki_push_16(uint value)
  1158. {
  1159. REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
  1160. m68ki_write_16(REG_SP, value);
  1161. }
  1162. INLINE void m68ki_push_32(uint value)
  1163. {
  1164. REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
  1165. m68ki_write_32(REG_SP, value);
  1166. }
  1167. INLINE uint m68ki_pull_16(void)
  1168. {
  1169. REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
  1170. return m68ki_read_16(REG_SP-2);
  1171. }
  1172. INLINE uint m68ki_pull_32(void)
  1173. {
  1174. REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
  1175. return m68ki_read_32(REG_SP-4);
  1176. }
  1177. /* Increment/decrement the stack as if doing a push/pull but
  1178. * don't do any memory access.
  1179. */
  1180. INLINE void m68ki_fake_push_16(void)
  1181. {
  1182. REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
  1183. }
  1184. INLINE void m68ki_fake_push_32(void)
  1185. {
  1186. REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
  1187. }
  1188. INLINE void m68ki_fake_pull_16(void)
  1189. {
  1190. REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
  1191. }
  1192. INLINE void m68ki_fake_pull_32(void)
  1193. {
  1194. REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
  1195. }
  1196. /* ----------------------------- Program Flow ----------------------------- */
  1197. /* Jump to a new program location or vector.
  1198. * These functions will also call the pc_changed callback if it was enabled
  1199. * in m68kconf.h.
  1200. */
  1201. INLINE void m68ki_jump(uint new_pc)
  1202. {
  1203. REG_PC = new_pc;
  1204. m68ki_pc_changed(REG_PC);
  1205. }
  1206. INLINE void m68ki_jump_vector(uint vector)
  1207. {
  1208. REG_PC = (vector<<2) + REG_VBR;
  1209. REG_PC = m68ki_read_data_32(REG_PC);
  1210. m68ki_pc_changed(REG_PC);
  1211. }
  1212. /* Branch to a new memory location.
  1213. * The 32-bit branch will call pc_changed if it was enabled in m68kconf.h.
  1214. * So far I've found no problems with not calling pc_changed for 8 or 16
  1215. * bit branches.
  1216. */
  1217. INLINE void m68ki_branch_8(uint offset)
  1218. {
  1219. REG_PC += MAKE_INT_8(offset);
  1220. }
  1221. INLINE void m68ki_branch_16(uint offset)
  1222. {
  1223. REG_PC += MAKE_INT_16(offset);
  1224. }
  1225. INLINE void m68ki_branch_32(uint offset)
  1226. {
  1227. REG_PC += offset;
  1228. m68ki_pc_changed(REG_PC);
  1229. }
  1230. /* ---------------------------- Status Register --------------------------- */
  1231. /* Set the S flag and change the active stack pointer.
  1232. * Note that value MUST be 4 or 0.
  1233. */
  1234. INLINE void m68ki_set_s_flag(uint value)
  1235. {
  1236. /* Backup the old stack pointer */
  1237. REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
  1238. /* Set the S flag */
  1239. FLAG_S = value;
  1240. /* Set the new stack pointer */
  1241. REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
  1242. }
  1243. /* Set the S and M flags and change the active stack pointer.
  1244. * Note that value MUST be 0, 2, 4, or 6 (bit2 = S, bit1 = M).
  1245. */
  1246. INLINE void m68ki_set_sm_flag(uint value)
  1247. {
  1248. /* Backup the old stack pointer */
  1249. REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
  1250. /* Set the S and M flags */
  1251. FLAG_S = value & SFLAG_SET;
  1252. FLAG_M = value & MFLAG_SET;
  1253. /* Set the new stack pointer */
  1254. REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
  1255. }
  1256. /* Set the S and M flags. Don't touch the stack pointer. */
  1257. INLINE void m68ki_set_sm_flag_nosp(uint value)
  1258. {
  1259. /* Set the S and M flags */
  1260. FLAG_S = value & SFLAG_SET;
  1261. FLAG_M = value & MFLAG_SET;
  1262. }
  1263. /* Set the condition code register */
  1264. INLINE void m68ki_set_ccr(uint value)
  1265. {
  1266. FLAG_X = BIT_4(value) << 4;
  1267. FLAG_N = BIT_3(value) << 4;
  1268. FLAG_Z = !BIT_2(value);
  1269. FLAG_V = BIT_1(value) << 6;
  1270. FLAG_C = BIT_0(value) << 8;
  1271. }
  1272. /* Set the status register but don't check for interrupts */
  1273. INLINE void m68ki_set_sr_noint(uint value)
  1274. {
  1275. /* Mask out the "unimplemented" bits */
  1276. value &= CPU_SR_MASK;
  1277. /* Now set the status register */
  1278. FLAG_T1 = BIT_F(value);
  1279. FLAG_T0 = BIT_E(value);
  1280. FLAG_INT_MASK = value & 0x0700;
  1281. m68ki_set_ccr(value);
  1282. m68ki_set_sm_flag((value >> 11) & 6);
  1283. }
  1284. /* Set the status register but don't check for interrupts nor
  1285. * change the stack pointer
  1286. */
  1287. INLINE void m68ki_set_sr_noint_nosp(uint value)
  1288. {
  1289. /* Mask out the "unimplemented" bits */
  1290. value &= CPU_SR_MASK;
  1291. /* Now set the status register */
  1292. FLAG_T1 = BIT_F(value);
  1293. FLAG_T0 = BIT_E(value);
  1294. FLAG_INT_MASK = value & 0x0700;
  1295. m68ki_set_ccr(value);
  1296. m68ki_set_sm_flag_nosp((value >> 11) & 6);
  1297. }
  1298. /* Set the status register and check for interrupts */
  1299. INLINE void m68ki_set_sr(uint value)
  1300. {
  1301. m68ki_set_sr_noint(value);
  1302. if (GET_CYCLES() >= 0) // notaz
  1303. m68ki_check_interrupts();
  1304. }
  1305. /* ------------------------- Exception Processing ------------------------- */
  1306. /* Initiate exception processing */
  1307. INLINE uint m68ki_init_exception(void)
  1308. {
  1309. /* Save the old status register */
  1310. uint sr = m68ki_get_sr();
  1311. /* Turn off trace flag, clear pending traces */
  1312. FLAG_T1 = FLAG_T0 = 0;
  1313. m68ki_clear_trace();
  1314. /* Enter supervisor mode */
  1315. m68ki_set_s_flag(SFLAG_SET);
  1316. return sr;
  1317. }
  1318. /* 3 word stack frame (68000 only) */
  1319. INLINE void m68ki_stack_frame_3word(uint pc, uint sr)
  1320. {
  1321. m68ki_push_32(pc);
  1322. m68ki_push_16(sr);
  1323. }
  1324. /* Format 0 stack frame.
  1325. * This is the standard stack frame for 68010+.
  1326. */
  1327. INLINE void m68ki_stack_frame_0000(uint pc, uint sr, uint vector)
  1328. {
  1329. /* Stack a 3-word frame if we are 68000 */
  1330. if(CPU_TYPE == CPU_TYPE_000 || CPU_TYPE == CPU_TYPE_008)
  1331. {
  1332. m68ki_stack_frame_3word(pc, sr);
  1333. return;
  1334. }
  1335. m68ki_push_16(vector<<2);
  1336. m68ki_push_32(pc);
  1337. m68ki_push_16(sr);
  1338. }
  1339. /* Format 1 stack frame (68020).
  1340. * For 68020, this is the 4 word throwaway frame.
  1341. */
  1342. INLINE void m68ki_stack_frame_0001(uint pc, uint sr, uint vector)
  1343. {
  1344. m68ki_push_16(0x1000 | (vector<<2));
  1345. m68ki_push_32(pc);
  1346. m68ki_push_16(sr);
  1347. }
  1348. /* Format 2 stack frame.
  1349. * This is used only by 68020 for trap exceptions.
  1350. */
  1351. INLINE void m68ki_stack_frame_0010(uint sr, uint vector)
  1352. {
  1353. m68ki_push_32(REG_PPC);
  1354. m68ki_push_16(0x2000 | (vector<<2));
  1355. m68ki_push_32(REG_PC);
  1356. m68ki_push_16(sr);
  1357. }
  1358. /* Bus error stack frame (68000 only).
  1359. */
  1360. INLINE void m68ki_stack_frame_buserr(uint sr)
  1361. {
  1362. m68ki_push_32(REG_PC);
  1363. m68ki_push_16(sr);
  1364. m68ki_push_16(REG_IR);
  1365. m68ki_push_32(m68ki_aerr_address); /* access address */
  1366. /* 0 0 0 0 0 0 0 0 0 0 0 R/W I/N FC
  1367. * R/W 0 = write, 1 = read
  1368. * I/N 0 = instruction, 1 = not
  1369. * FC 3-bit function code
  1370. */
  1371. m68ki_push_16(m68ki_aerr_write_mode | CPU_INSTR_MODE | m68ki_aerr_fc);
  1372. }
  1373. /* Format 8 stack frame (68010).
  1374. * 68010 only. This is the 29 word bus/address error frame.
  1375. */
  1376. INLINE void m68ki_stack_frame_1000(uint pc, uint sr, uint vector)
  1377. {
  1378. /* VERSION
  1379. * NUMBER
  1380. * INTERNAL INFORMATION, 16 WORDS
  1381. */
  1382. m68ki_fake_push_32();
  1383. m68ki_fake_push_32();
  1384. m68ki_fake_push_32();
  1385. m68ki_fake_push_32();
  1386. m68ki_fake_push_32();
  1387. m68ki_fake_push_32();
  1388. m68ki_fake_push_32();
  1389. m68ki_fake_push_32();
  1390. /* INSTRUCTION INPUT BUFFER */
  1391. m68ki_push_16(0);
  1392. /* UNUSED, RESERVED (not written) */
  1393. m68ki_fake_push_16();
  1394. /* DATA INPUT BUFFER */
  1395. m68ki_push_16(0);
  1396. /* UNUSED, RESERVED (not written) */
  1397. m68ki_fake_push_16();
  1398. /* DATA OUTPUT BUFFER */
  1399. m68ki_push_16(0);
  1400. /* UNUSED, RESERVED (not written) */
  1401. m68ki_fake_push_16();
  1402. /* FAULT ADDRESS */
  1403. m68ki_push_32(0);
  1404. /* SPECIAL STATUS WORD */
  1405. m68ki_push_16(0);
  1406. /* 1000, VECTOR OFFSET */
  1407. m68ki_push_16(0x8000 | (vector<<2));
  1408. /* PROGRAM COUNTER */
  1409. m68ki_push_32(pc);
  1410. /* STATUS REGISTER */
  1411. m68ki_push_16(sr);
  1412. }
  1413. /* Format A stack frame (short bus fault).
  1414. * This is used only by 68020 for bus fault and address error
  1415. * if the error happens at an instruction boundary.
  1416. * PC stacked is address of next instruction.
  1417. */
  1418. INLINE void m68ki_stack_frame_1010(uint sr, uint vector, uint pc)
  1419. {
  1420. /* INTERNAL REGISTER */
  1421. m68ki_push_16(0);
  1422. /* INTERNAL REGISTER */
  1423. m68ki_push_16(0);
  1424. /* DATA OUTPUT BUFFER (2 words) */
  1425. m68ki_push_32(0);
  1426. /* INTERNAL REGISTER */
  1427. m68ki_push_16(0);
  1428. /* INTERNAL REGISTER */
  1429. m68ki_push_16(0);
  1430. /* DATA CYCLE FAULT ADDRESS (2 words) */
  1431. m68ki_push_32(0);
  1432. /* INSTRUCTION PIPE STAGE B */
  1433. m68ki_push_16(0);
  1434. /* INSTRUCTION PIPE STAGE C */
  1435. m68ki_push_16(0);
  1436. /* SPECIAL STATUS REGISTER */
  1437. m68ki_push_16(0);
  1438. /* INTERNAL REGISTER */
  1439. m68ki_push_16(0);
  1440. /* 1010, VECTOR OFFSET */
  1441. m68ki_push_16(0xa000 | (vector<<2));
  1442. /* PROGRAM COUNTER */
  1443. m68ki_push_32(pc);
  1444. /* STATUS REGISTER */
  1445. m68ki_push_16(sr);
  1446. }
  1447. /* Format B stack frame (long bus fault).
  1448. * This is used only by 68020 for bus fault and address error
  1449. * if the error happens during instruction execution.
  1450. * PC stacked is address of instruction in progress.
  1451. */
  1452. INLINE void m68ki_stack_frame_1011(uint sr, uint vector, uint pc)
  1453. {
  1454. /* INTERNAL REGISTERS (18 words) */
  1455. m68ki_push_32(0);
  1456. m68ki_push_32(0);
  1457. m68ki_push_32(0);
  1458. m68ki_push_32(0);
  1459. m68ki_push_32(0);
  1460. m68ki_push_32(0);
  1461. m68ki_push_32(0);
  1462. m68ki_push_32(0);
  1463. m68ki_push_32(0);
  1464. /* VERSION# (4 bits), INTERNAL INFORMATION */
  1465. m68ki_push_16(0);
  1466. /* INTERNAL REGISTERS (3 words) */
  1467. m68ki_push_32(0);
  1468. m68ki_push_16(0);
  1469. /* DATA INTPUT BUFFER (2 words) */
  1470. m68ki_push_32(0);
  1471. /* INTERNAL REGISTERS (2 words) */
  1472. m68ki_push_32(0);
  1473. /* STAGE B ADDRESS (2 words) */
  1474. m68ki_push_32(0);
  1475. /* INTERNAL REGISTER (4 words) */
  1476. m68ki_push_32(0);
  1477. m68ki_push_32(0);
  1478. /* DATA OUTPUT BUFFER (2 words) */
  1479. m68ki_push_32(0);
  1480. /* INTERNAL REGISTER */
  1481. m68ki_push_16(0);
  1482. /* INTERNAL REGISTER */
  1483. m68ki_push_16(0);
  1484. /* DATA CYCLE FAULT ADDRESS (2 words) */
  1485. m68ki_push_32(0);
  1486. /* INSTRUCTION PIPE STAGE B */
  1487. m68ki_push_16(0);
  1488. /* INSTRUCTION PIPE STAGE C */
  1489. m68ki_push_16(0);
  1490. /* SPECIAL STATUS REGISTER */
  1491. m68ki_push_16(0);
  1492. /* INTERNAL REGISTER */
  1493. m68ki_push_16(0);
  1494. /* 1011, VECTOR OFFSET */
  1495. m68ki_push_16(0xb000 | (vector<<2));
  1496. /* PROGRAM COUNTER */
  1497. m68ki_push_32(pc);
  1498. /* STATUS REGISTER */
  1499. m68ki_push_16(sr);
  1500. }
  1501. /* Used for Group 2 exceptions.
  1502. * These stack a type 2 frame on the 020.
  1503. */
  1504. INLINE void m68ki_exception_trap(uint vector)
  1505. {
  1506. uint sr = m68ki_init_exception();
  1507. if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
  1508. m68ki_stack_frame_0000(REG_PC, sr, vector);
  1509. else
  1510. m68ki_stack_frame_0010(sr, vector);
  1511. m68ki_jump_vector(vector);
  1512. /* Use up some clock cycles */
  1513. USE_CYCLES(CYC_EXCEPTION[vector]);
  1514. }
  1515. /* Trap#n stacks a 0 frame but behaves like group2 otherwise */
  1516. INLINE void m68ki_exception_trapN(uint vector)
  1517. {
  1518. uint sr = m68ki_init_exception();
  1519. m68ki_stack_frame_0000(REG_PC, sr, vector);
  1520. m68ki_jump_vector(vector);
  1521. /* Use up some clock cycles */
  1522. USE_CYCLES(CYC_EXCEPTION[vector]);
  1523. }
  1524. /* Exception for trace mode */
  1525. INLINE void m68ki_exception_trace(void)
  1526. {
  1527. uint sr = m68ki_init_exception();
  1528. if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
  1529. {
  1530. #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
  1531. if(CPU_TYPE_IS_000(CPU_TYPE))
  1532. {
  1533. CPU_INSTR_MODE = INSTRUCTION_NO;
  1534. }
  1535. #endif /* M68K_EMULATE_ADDRESS_ERROR */
  1536. m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_TRACE);
  1537. }
  1538. else
  1539. m68ki_stack_frame_0010(sr, EXCEPTION_TRACE);
  1540. m68ki_jump_vector(EXCEPTION_TRACE);
  1541. /* Trace nullifies a STOP instruction */
  1542. CPU_STOPPED &= ~STOP_LEVEL_STOP;
  1543. /* Use up some clock cycles */
  1544. USE_CYCLES(CYC_EXCEPTION[EXCEPTION_TRACE]);
  1545. }
  1546. /* Exception for privilege violation */
  1547. INLINE void m68ki_exception_privilege_violation(void)
  1548. {
  1549. uint sr = m68ki_init_exception();
  1550. #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
  1551. if(CPU_TYPE_IS_000(CPU_TYPE))
  1552. {
  1553. CPU_INSTR_MODE = INSTRUCTION_NO;
  1554. }
  1555. #endif /* M68K_EMULATE_ADDRESS_ERROR */
  1556. m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_PRIVILEGE_VIOLATION);
  1557. m68ki_jump_vector(EXCEPTION_PRIVILEGE_VIOLATION);
  1558. /* Use up some clock cycles and undo the instruction's cycles */
  1559. USE_CYCLES(CYC_EXCEPTION[EXCEPTION_PRIVILEGE_VIOLATION] - CYC_INSTRUCTION[REG_IR]);
  1560. }
  1561. /* Exception for A-Line instructions */
  1562. INLINE void m68ki_exception_1010(void)
  1563. {
  1564. uint sr;
  1565. #if M68K_LOG_1010_1111 == OPT_ON
  1566. M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1010 instruction %04x (%s)\n",
  1567. m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
  1568. m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
  1569. #endif
  1570. sr = m68ki_init_exception();
  1571. m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_1010);
  1572. m68ki_jump_vector(EXCEPTION_1010);
  1573. /* Use up some clock cycles and undo the instruction's cycles */
  1574. USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1010] - CYC_INSTRUCTION[REG_IR]);
  1575. }
  1576. /* Exception for F-Line instructions */
  1577. INLINE void m68ki_exception_1111(void)
  1578. {
  1579. uint sr;
  1580. #if M68K_LOG_1010_1111 == OPT_ON
  1581. M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1111 instruction %04x (%s)\n",
  1582. m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
  1583. m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
  1584. #endif
  1585. sr = m68ki_init_exception();
  1586. m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_1111);
  1587. m68ki_jump_vector(EXCEPTION_1111);
  1588. /* Use up some clock cycles and undo the instruction's cycles */
  1589. USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1111] - CYC_INSTRUCTION[REG_IR]);
  1590. }
  1591. /* Exception for illegal instructions */
  1592. INLINE void m68ki_exception_illegal(void)
  1593. {
  1594. uint sr;
  1595. M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: illegal instruction %04x (%s)\n",
  1596. m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
  1597. m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
  1598. sr = m68ki_init_exception();
  1599. #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
  1600. if(CPU_TYPE_IS_000(CPU_TYPE))
  1601. {
  1602. CPU_INSTR_MODE = INSTRUCTION_NO;
  1603. }
  1604. #endif /* M68K_EMULATE_ADDRESS_ERROR */
  1605. m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_ILLEGAL_INSTRUCTION);
  1606. m68ki_jump_vector(EXCEPTION_ILLEGAL_INSTRUCTION);
  1607. /* Use up some clock cycles and undo the instruction's cycles */
  1608. USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ILLEGAL_INSTRUCTION] - CYC_INSTRUCTION[REG_IR]);
  1609. }
  1610. /* Exception for format errror in RTE */
  1611. INLINE void m68ki_exception_format_error(void)
  1612. {
  1613. uint sr = m68ki_init_exception();
  1614. m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_FORMAT_ERROR);
  1615. m68ki_jump_vector(EXCEPTION_FORMAT_ERROR);
  1616. /* Use up some clock cycles and undo the instruction's cycles */
  1617. USE_CYCLES(CYC_EXCEPTION[EXCEPTION_FORMAT_ERROR] - CYC_INSTRUCTION[REG_IR]);
  1618. }
  1619. /* Exception for address error */
  1620. INLINE void m68ki_exception_address_error(void)
  1621. {
  1622. uint sr = m68ki_init_exception();
  1623. /* If we were processing a bus error, address error, or reset,
  1624. * this is a catastrophic failure.
  1625. * Halt the CPU
  1626. */
  1627. if(CPU_RUN_MODE == RUN_MODE_BERR_AERR_RESET)
  1628. {
  1629. m68k_read_memory_8(0x00ffff01);
  1630. CPU_STOPPED = STOP_LEVEL_HALT;
  1631. return;
  1632. }
  1633. CPU_RUN_MODE = RUN_MODE_BERR_AERR_RESET;
  1634. /* Note: This is implemented for 68000 only! */
  1635. m68ki_stack_frame_buserr(sr);
  1636. m68ki_jump_vector(EXCEPTION_ADDRESS_ERROR);
  1637. /* Use up some clock cycles and undo the instruction's cycles */
  1638. USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ADDRESS_ERROR] - CYC_INSTRUCTION[REG_IR]);
  1639. }
  1640. /* Service an interrupt request and start exception processing */
  1641. INLINE void m68ki_exception_interrupt(uint int_level)
  1642. {
  1643. uint vector;
  1644. uint sr;
  1645. uint new_pc;
  1646. #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
  1647. if(CPU_TYPE_IS_000(CPU_TYPE))
  1648. {
  1649. CPU_INSTR_MODE = INSTRUCTION_NO;
  1650. }
  1651. #endif /* M68K_EMULATE_ADDRESS_ERROR */
  1652. /* Turn off the stopped state */
  1653. CPU_STOPPED &= ~STOP_LEVEL_STOP;
  1654. /* If we are halted, don't do anything */
  1655. if(CPU_STOPPED)
  1656. return;
  1657. /* Acknowledge the interrupt */
  1658. vector = m68ki_int_ack(int_level);
  1659. /* Get the interrupt vector */
  1660. if(vector == M68K_INT_ACK_AUTOVECTOR)
  1661. /* Use the autovectors. This is the most commonly used implementation */
  1662. vector = EXCEPTION_INTERRUPT_AUTOVECTOR+int_level;
  1663. else if(vector == M68K_INT_ACK_SPURIOUS)
  1664. /* Called if no devices respond to the interrupt acknowledge */
  1665. vector = EXCEPTION_SPURIOUS_INTERRUPT;
  1666. else if(vector > 255)
  1667. {
  1668. M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: Interrupt acknowledge returned invalid vector $%x\n",
  1669. m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC), vector));
  1670. return;
  1671. }
  1672. /* Start exception processing */
  1673. sr = m68ki_init_exception();
  1674. /* Set the interrupt mask to the level of the one being serviced */
  1675. FLAG_INT_MASK = int_level<<8;
  1676. /* Get the new PC */
  1677. new_pc = m68ki_read_data_32((vector<<2) + REG_VBR);
  1678. //new_pc = m68k_read_immediate_32((vector<<2) + REG_VBR); // notaz hack
  1679. /* If vector is uninitialized, call the uninitialized interrupt vector */
  1680. if(new_pc == 0)
  1681. new_pc = m68ki_read_data_32((EXCEPTION_UNINITIALIZED_INTERRUPT<<2) + REG_VBR);
  1682. /* Generate a stack frame */
  1683. m68ki_stack_frame_0000(REG_PC, sr, vector);
  1684. if(FLAG_M && CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
  1685. {
  1686. /* Create throwaway frame */
  1687. m68ki_set_sm_flag(FLAG_S); /* clear M */
  1688. sr |= 0x2000; /* Same as SR in master stack frame except S is forced high */
  1689. m68ki_stack_frame_0001(REG_PC, sr, vector);
  1690. }
  1691. m68ki_jump(new_pc);
  1692. /* Defer cycle counting until later */
  1693. CPU_INT_CYCLES += CYC_EXCEPTION[vector];
  1694. #if !M68K_EMULATE_INT_ACK
  1695. /* Automatically clear IRQ if we are not using an acknowledge scheme */
  1696. CPU_INT_LEVEL = 0;
  1697. #endif /* M68K_EMULATE_INT_ACK */
  1698. }
  1699. /* ASG: Check for interrupts */
  1700. INLINE void m68ki_check_interrupts(void)
  1701. {
  1702. if(CPU_INT_LEVEL > FLAG_INT_MASK)
  1703. m68ki_exception_interrupt(CPU_INT_LEVEL>>8);
  1704. }
  1705. /* ======================================================================== */
  1706. /* ============================== END OF FILE ============================= */
  1707. /* ======================================================================== */
  1708. #endif /* M68KCPU__HEADER */