ym2612.c 56 KB

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  1. /*
  2. ** This is a bunch of remains of original fm.c from MAME project. All stuff
  3. ** unrelated to ym2612 was removed, multiple chip support was removed,
  4. ** some parts of code were slightly rewritten and tied to the emulator.
  5. **
  6. ** SSG-EG was also removed, because it's rarely used, Sega2.doc even does not
  7. ** document it ("proprietary") and tells to write 0 to SSG-EG control register.
  8. */
  9. /*
  10. **
  11. ** File: fm.c -- software implementation of Yamaha FM sound generator
  12. **
  13. ** Copyright (C) 2001, 2002, 2003 Jarek Burczynski (bujar at mame dot net)
  14. ** Copyright (C) 1998 Tatsuyuki Satoh , MultiArcadeMachineEmulator development
  15. **
  16. ** Version 1.4 (final beta)
  17. **
  18. */
  19. /*
  20. ** History:
  21. **
  22. ** 03-08-2003 Jarek Burczynski:
  23. ** - fixed YM2608 initial values (after the reset)
  24. ** - fixed flag and irqmask handling (YM2608)
  25. ** - fixed BUFRDY flag handling (YM2608)
  26. **
  27. ** 14-06-2003 Jarek Burczynski:
  28. ** - implemented all of the YM2608 status register flags
  29. ** - implemented support for external memory read/write via YM2608
  30. ** - implemented support for deltat memory limit register in YM2608 emulation
  31. **
  32. ** 22-05-2003 Jarek Burczynski:
  33. ** - fixed LFO PM calculations (copy&paste bugfix)
  34. **
  35. ** 08-05-2003 Jarek Burczynski:
  36. ** - fixed SSG support
  37. **
  38. ** 22-04-2003 Jarek Burczynski:
  39. ** - implemented 100% correct LFO generator (verified on real YM2610 and YM2608)
  40. **
  41. ** 15-04-2003 Jarek Burczynski:
  42. ** - added support for YM2608's register 0x110 - status mask
  43. **
  44. ** 01-12-2002 Jarek Burczynski:
  45. ** - fixed register addressing in YM2608, YM2610, YM2610B chips. (verified on real YM2608)
  46. ** The addressing patch used for early Neo-Geo games can be removed now.
  47. **
  48. ** 26-11-2002 Jarek Burczynski, Nicola Salmoria:
  49. ** - recreated YM2608 ADPCM ROM using data from real YM2608's output which leads to:
  50. ** - added emulation of YM2608 drums.
  51. ** - output of YM2608 is two times lower now - same as YM2610 (verified on real YM2608)
  52. **
  53. ** 16-08-2002 Jarek Burczynski:
  54. ** - binary exact Envelope Generator (verified on real YM2203);
  55. ** identical to YM2151
  56. ** - corrected 'off by one' error in feedback calculations (when feedback is off)
  57. ** - corrected connection (algorithm) calculation (verified on real YM2203 and YM2610)
  58. **
  59. ** 18-12-2001 Jarek Burczynski:
  60. ** - added SSG-EG support (verified on real YM2203)
  61. **
  62. ** 12-08-2001 Jarek Burczynski:
  63. ** - corrected ym_sin_tab and ym_tl_tab data (verified on real chip)
  64. ** - corrected feedback calculations (verified on real chip)
  65. ** - corrected phase generator calculations (verified on real chip)
  66. ** - corrected envelope generator calculations (verified on real chip)
  67. ** - corrected FM volume level (YM2610 and YM2610B).
  68. ** - changed YMxxxUpdateOne() functions (YM2203, YM2608, YM2610, YM2610B, YM2612) :
  69. ** this was needed to calculate YM2610 FM channels output correctly.
  70. ** (Each FM channel is calculated as in other chips, but the output of the channel
  71. ** gets shifted right by one *before* sending to accumulator. That was impossible to do
  72. ** with previous implementation).
  73. **
  74. ** 23-07-2001 Jarek Burczynski, Nicola Salmoria:
  75. ** - corrected YM2610 ADPCM type A algorithm and tables (verified on real chip)
  76. **
  77. ** 11-06-2001 Jarek Burczynski:
  78. ** - corrected end of sample bug in ADPCMA_calc_cha().
  79. ** Real YM2610 checks for equality between current and end addresses (only 20 LSB bits).
  80. **
  81. ** 08-12-98 hiro-shi:
  82. ** rename ADPCMA -> ADPCMB, ADPCMB -> ADPCMA
  83. ** move ROM limit check.(CALC_CH? -> 2610Write1/2)
  84. ** test program (ADPCMB_TEST)
  85. ** move ADPCM A/B end check.
  86. ** ADPCMB repeat flag(no check)
  87. ** change ADPCM volume rate (8->16) (32->48).
  88. **
  89. ** 09-12-98 hiro-shi:
  90. ** change ADPCM volume. (8->16, 48->64)
  91. ** replace ym2610 ch0/3 (YM-2610B)
  92. ** change ADPCM_SHIFT (10->8) missing bank change 0x4000-0xffff.
  93. ** add ADPCM_SHIFT_MASK
  94. ** change ADPCMA_DECODE_MIN/MAX.
  95. */
  96. /************************************************************************/
  97. /* comment of hiro-shi(Hiromitsu Shioya) */
  98. /* YM2610(B) = OPN-B */
  99. /* YM2610 : PSG:3ch FM:4ch ADPCM(18.5KHz):6ch DeltaT ADPCM:1ch */
  100. /* YM2610B : PSG:3ch FM:6ch ADPCM(18.5KHz):6ch DeltaT ADPCM:1ch */
  101. /************************************************************************/
  102. //#include <stdio.h>
  103. #include <string.h>
  104. #include <math.h>
  105. #include "ym2612.h"
  106. #ifndef EXTERNAL_YM2612
  107. #include <stdlib.h>
  108. // let it be 1 global to simplify things
  109. YM2612 ym2612;
  110. #else
  111. extern YM2612 *ym2612_940;
  112. #define ym2612 (*ym2612_940)
  113. #endif
  114. void memset32(int *dest, int c, int count);
  115. #ifndef __GNUC__
  116. #pragma warning (disable:4100) // unreferenced formal parameter
  117. #pragma warning (disable:4244)
  118. #pragma warning (disable:4245) // signed/unsigned in conversion
  119. #pragma warning (disable:4710)
  120. #pragma warning (disable:4018) // signed/unsigned
  121. #endif
  122. #ifndef INLINE
  123. #define INLINE static __inline
  124. #endif
  125. #ifndef M_PI
  126. #define M_PI 3.14159265358979323846
  127. #endif
  128. /* globals */
  129. #define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
  130. #define EG_SH 16 /* 16.16 fixed point (envelope generator timing) */
  131. #define LFO_SH 25 /* 7.25 fixed point (LFO calculations) */
  132. #define TIMER_SH 16 /* 16.16 fixed point (timers calculations) */
  133. #define ENV_BITS 10
  134. #define ENV_LEN (1<<ENV_BITS)
  135. #define ENV_STEP (128.0/ENV_LEN)
  136. #define MAX_ATT_INDEX (ENV_LEN-1) /* 1023 */
  137. #define MIN_ATT_INDEX (0) /* 0 */
  138. #define EG_ATT 4
  139. #define EG_DEC 3
  140. #define EG_SUS 2
  141. #define EG_REL 1
  142. #define EG_OFF 0
  143. #define SIN_BITS 10
  144. #define SIN_LEN (1<<SIN_BITS)
  145. #define SIN_MASK (SIN_LEN-1)
  146. #define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
  147. #define EG_TIMER_OVERFLOW (3*(1<<EG_SH)) /* envelope generator timer overflows every 3 samples (on real chip) */
  148. #define MAXOUT (+32767)
  149. #define MINOUT (-32768)
  150. /* limitter */
  151. #define Limit(val, max,min) { \
  152. if ( val > max ) val = max; \
  153. else if ( val < min ) val = min; \
  154. }
  155. /* TL_TAB_LEN is calculated as:
  156. * 13 - sinus amplitude bits (Y axis)
  157. * 2 - sinus sign bit (Y axis)
  158. * TL_RES_LEN - sinus resolution (X axis)
  159. */
  160. //#define TL_TAB_LEN (13*2*TL_RES_LEN)
  161. #define TL_TAB_LEN (13*TL_RES_LEN*256/8) // 106496*2
  162. UINT16 ym_tl_tab[TL_TAB_LEN];
  163. /* ~3K wasted but oh well */
  164. UINT16 ym_tl_tab2[13*TL_RES_LEN];
  165. #define ENV_QUIET (2*13*TL_RES_LEN/8)
  166. /* sin waveform table in 'decibel' scale (use only period/4 values) */
  167. static UINT16 ym_sin_tab[256];
  168. /* sustain level table (3dB per step) */
  169. /* bit0, bit1, bit2, bit3, bit4, bit5, bit6 */
  170. /* 1, 2, 4, 8, 16, 32, 64 (value)*/
  171. /* 0.75, 1.5, 3, 6, 12, 24, 48 (dB)*/
  172. /* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/
  173. #define SC(db) (UINT32) ( db * (4.0/ENV_STEP) )
  174. static const UINT32 sl_table[16]={
  175. SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
  176. SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
  177. };
  178. #undef SC
  179. #if 0
  180. #define RATE_STEPS (8)
  181. static const UINT8 eg_inc[19*RATE_STEPS]={
  182. /*cycle:0 1 2 3 4 5 6 7*/
  183. /* 0 */ 0,1, 0,1, 0,1, 0,1, /* rates 00..11 0 (increment by 0 or 1) */
  184. /* 1 */ 0,1, 0,1, 1,1, 0,1, /* rates 00..11 1 */
  185. /* 2 */ 0,1, 1,1, 0,1, 1,1, /* rates 00..11 2 */
  186. /* 3 */ 0,1, 1,1, 1,1, 1,1, /* rates 00..11 3 */
  187. /* 4 */ 1,1, 1,1, 1,1, 1,1, /* rate 12 0 (increment by 1) */
  188. /* 5 */ 1,1, 1,2, 1,1, 1,2, /* rate 12 1 */
  189. /* 6 */ 1,2, 1,2, 1,2, 1,2, /* rate 12 2 */
  190. /* 7 */ 1,2, 2,2, 1,2, 2,2, /* rate 12 3 */
  191. /* 8 */ 2,2, 2,2, 2,2, 2,2, /* rate 13 0 (increment by 2) */
  192. /* 9 */ 2,2, 2,4, 2,2, 2,4, /* rate 13 1 */
  193. /*10 */ 2,4, 2,4, 2,4, 2,4, /* rate 13 2 */
  194. /*11 */ 2,4, 4,4, 2,4, 4,4, /* rate 13 3 */
  195. /*12 */ 4,4, 4,4, 4,4, 4,4, /* rate 14 0 (increment by 4) */
  196. /*13 */ 4,4, 4,8, 4,4, 4,8, /* rate 14 1 */
  197. /*14 */ 4,8, 4,8, 4,8, 4,8, /* rate 14 2 */
  198. /*15 */ 4,8, 8,8, 4,8, 8,8, /* rate 14 3 */
  199. /*16 */ 8,8, 8,8, 8,8, 8,8, /* rates 15 0, 15 1, 15 2, 15 3 (increment by 8) */
  200. /*17 */ 16,16,16,16,16,16,16,16, /* rates 15 2, 15 3 for attack */
  201. /*18 */ 0,0, 0,0, 0,0, 0,0, /* infinity rates for attack and decay(s) */
  202. };
  203. #endif
  204. #define PACK(a0,a1,a2,a3,a4,a5,a6,a7) ((a7<<21)|(a6<<18)|(a5<<15)|(a4<<12)|(a3<<9)|(a2<<6)|(a1<<3)|(a0<<0))
  205. static const UINT32 eg_inc_pack[19] =
  206. {
  207. /* 0 */ PACK(0,1,0,1,0,1,0,1), /* rates 00..11 0 (increment by 0 or 1) */
  208. /* 1 */ PACK(0,1,0,1,1,1,0,1), /* rates 00..11 1 */
  209. /* 2 */ PACK(0,1,1,1,0,1,1,1), /* rates 00..11 2 */
  210. /* 3 */ PACK(0,1,1,1,1,1,1,1), /* rates 00..11 3 */
  211. /* 4 */ PACK(1,1,1,1,1,1,1,1), /* rate 12 0 (increment by 1) */
  212. /* 5 */ PACK(1,1,1,2,1,1,1,2), /* rate 12 1 */
  213. /* 6 */ PACK(1,2,1,2,1,2,1,2), /* rate 12 2 */
  214. /* 7 */ PACK(1,2,2,2,1,2,2,2), /* rate 12 3 */
  215. /* 8 */ PACK(2,2,2,2,2,2,2,2), /* rate 13 0 (increment by 2) */
  216. /* 9 */ PACK(2,2,2,3,2,2,2,3), /* rate 13 1 */
  217. /*10 */ PACK(2,3,2,3,2,3,2,3), /* rate 13 2 */
  218. /*11 */ PACK(2,3,3,3,2,3,3,3), /* rate 13 3 */
  219. /*12 */ PACK(3,3,3,3,3,3,3,3), /* rate 14 0 (increment by 4) */
  220. /*13 */ PACK(3,3,3,4,3,3,3,4), /* rate 14 1 */
  221. /*14 */ PACK(3,4,3,4,3,4,3,4), /* rate 14 2 */
  222. /*15 */ PACK(3,4,4,4,3,4,4,4), /* rate 14 3 */
  223. /*16 */ PACK(4,4,4,4,4,4,4,4), /* rates 15 0, 15 1, 15 2, 15 3 (increment by 8) */
  224. /*17 */ PACK(5,5,5,5,5,5,5,5), /* rates 15 2, 15 3 for attack */
  225. /*18 */ PACK(0,0,0,0,0,0,0,0), /* infinity rates for attack and decay(s) */
  226. };
  227. //#define O(a) (a*RATE_STEPS)
  228. #define O(a) a
  229. /*note that there is no O(17) in this table - it's directly in the code */
  230. static const UINT8 eg_rate_select[32+64+32]={ /* Envelope Generator rates (32 + 64 rates + 32 RKS) */
  231. /* 32 infinite time rates */
  232. O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
  233. O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
  234. O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
  235. O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
  236. /* rates 00-11 */
  237. O( 0),O( 1),O( 2),O( 3),
  238. O( 0),O( 1),O( 2),O( 3),
  239. O( 0),O( 1),O( 2),O( 3),
  240. O( 0),O( 1),O( 2),O( 3),
  241. O( 0),O( 1),O( 2),O( 3),
  242. O( 0),O( 1),O( 2),O( 3),
  243. O( 0),O( 1),O( 2),O( 3),
  244. O( 0),O( 1),O( 2),O( 3),
  245. O( 0),O( 1),O( 2),O( 3),
  246. O( 0),O( 1),O( 2),O( 3),
  247. O( 0),O( 1),O( 2),O( 3),
  248. O( 0),O( 1),O( 2),O( 3),
  249. /* rate 12 */
  250. O( 4),O( 5),O( 6),O( 7),
  251. /* rate 13 */
  252. O( 8),O( 9),O(10),O(11),
  253. /* rate 14 */
  254. O(12),O(13),O(14),O(15),
  255. /* rate 15 */
  256. O(16),O(16),O(16),O(16),
  257. /* 32 dummy rates (same as 15 3) */
  258. O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16),
  259. O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16),
  260. O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16),
  261. O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16)
  262. };
  263. #undef O
  264. /*rate 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15*/
  265. /*shift 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0, 0 */
  266. /*mask 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0, 0, 0 */
  267. #define O(a) (a*1)
  268. static const UINT8 eg_rate_shift[32+64+32]={ /* Envelope Generator counter shifts (32 + 64 rates + 32 RKS) */
  269. /* 32 infinite time rates */
  270. O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
  271. O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
  272. O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
  273. O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
  274. /* rates 00-11 */
  275. O(11),O(11),O(11),O(11),
  276. O(10),O(10),O(10),O(10),
  277. O( 9),O( 9),O( 9),O( 9),
  278. O( 8),O( 8),O( 8),O( 8),
  279. O( 7),O( 7),O( 7),O( 7),
  280. O( 6),O( 6),O( 6),O( 6),
  281. O( 5),O( 5),O( 5),O( 5),
  282. O( 4),O( 4),O( 4),O( 4),
  283. O( 3),O( 3),O( 3),O( 3),
  284. O( 2),O( 2),O( 2),O( 2),
  285. O( 1),O( 1),O( 1),O( 1),
  286. O( 0),O( 0),O( 0),O( 0),
  287. /* rate 12 */
  288. O( 0),O( 0),O( 0),O( 0),
  289. /* rate 13 */
  290. O( 0),O( 0),O( 0),O( 0),
  291. /* rate 14 */
  292. O( 0),O( 0),O( 0),O( 0),
  293. /* rate 15 */
  294. O( 0),O( 0),O( 0),O( 0),
  295. /* 32 dummy rates (same as 15 3) */
  296. O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
  297. O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
  298. O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
  299. O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0)
  300. };
  301. #undef O
  302. static const UINT8 dt_tab[4 * 32]={
  303. /* this is YM2151 and YM2612 phase increment data (in 10.10 fixed point format)*/
  304. /* FD=0 */
  305. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  306. 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  307. /* FD=1 */
  308. 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2,
  309. 2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 8, 8, 8, 8,
  310. /* FD=2 */
  311. 1, 1, 1, 1, 2, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5,
  312. 5, 6, 6, 7, 8, 8, 9,10,11,12,13,14,16,16,16,16,
  313. /* FD=3 */
  314. 2, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7,
  315. 8 ,8, 9,10,11,12,13,14,16,17,19,20,22,22,22,22
  316. };
  317. /* OPN key frequency number -> key code follow table */
  318. /* fnum higher 4bit -> keycode lower 2bit */
  319. static const UINT8 opn_fktable[16] = {0,0,0,0,0,0,0,1,2,3,3,3,3,3,3,3};
  320. /* 8 LFO speed parameters */
  321. /* each value represents number of samples that one LFO level will last for */
  322. static const UINT32 lfo_samples_per_step[8] = {108, 77, 71, 67, 62, 44, 8, 5};
  323. /*There are 4 different LFO AM depths available, they are:
  324. 0 dB, 1.4 dB, 5.9 dB, 11.8 dB
  325. Here is how it is generated (in EG steps):
  326. 11.8 dB = 0, 2, 4, 6, 8, 10,12,14,16...126,126,124,122,120,118,....4,2,0
  327. 5.9 dB = 0, 1, 2, 3, 4, 5, 6, 7, 8....63, 63, 62, 61, 60, 59,.....2,1,0
  328. 1.4 dB = 0, 0, 0, 0, 1, 1, 1, 1, 2,...15, 15, 15, 15, 14, 14,.....0,0,0
  329. (1.4 dB is loosing precision as you can see)
  330. It's implemented as generator from 0..126 with step 2 then a shift
  331. right N times, where N is:
  332. 8 for 0 dB
  333. 3 for 1.4 dB
  334. 1 for 5.9 dB
  335. 0 for 11.8 dB
  336. */
  337. static const UINT8 lfo_ams_depth_shift[4] = {8, 3, 1, 0};
  338. /*There are 8 different LFO PM depths available, they are:
  339. 0, 3.4, 6.7, 10, 14, 20, 40, 80 (cents)
  340. Modulation level at each depth depends on F-NUMBER bits: 4,5,6,7,8,9,10
  341. (bits 8,9,10 = FNUM MSB from OCT/FNUM register)
  342. Here we store only first quarter (positive one) of full waveform.
  343. Full table (lfo_pm_table) containing all 128 waveforms is build
  344. at run (init) time.
  345. One value in table below represents 4 (four) basic LFO steps
  346. (1 PM step = 4 AM steps).
  347. For example:
  348. at LFO SPEED=0 (which is 108 samples per basic LFO step)
  349. one value from "lfo_pm_output" table lasts for 432 consecutive
  350. samples (4*108=432) and one full LFO waveform cycle lasts for 13824
  351. samples (32*432=13824; 32 because we store only a quarter of whole
  352. waveform in the table below)
  353. */
  354. static const UINT8 lfo_pm_output[7*8][8]={ /* 7 bits meaningful (of F-NUMBER), 8 LFO output levels per one depth (out of 32), 8 LFO depths */
  355. /* FNUM BIT 4: 000 0001xxxx */
  356. /* DEPTH 0 */ {0, 0, 0, 0, 0, 0, 0, 0},
  357. /* DEPTH 1 */ {0, 0, 0, 0, 0, 0, 0, 0},
  358. /* DEPTH 2 */ {0, 0, 0, 0, 0, 0, 0, 0},
  359. /* DEPTH 3 */ {0, 0, 0, 0, 0, 0, 0, 0},
  360. /* DEPTH 4 */ {0, 0, 0, 0, 0, 0, 0, 0},
  361. /* DEPTH 5 */ {0, 0, 0, 0, 0, 0, 0, 0},
  362. /* DEPTH 6 */ {0, 0, 0, 0, 0, 0, 0, 0},
  363. /* DEPTH 7 */ {0, 0, 0, 0, 1, 1, 1, 1},
  364. /* FNUM BIT 5: 000 0010xxxx */
  365. /* DEPTH 0 */ {0, 0, 0, 0, 0, 0, 0, 0},
  366. /* DEPTH 1 */ {0, 0, 0, 0, 0, 0, 0, 0},
  367. /* DEPTH 2 */ {0, 0, 0, 0, 0, 0, 0, 0},
  368. /* DEPTH 3 */ {0, 0, 0, 0, 0, 0, 0, 0},
  369. /* DEPTH 4 */ {0, 0, 0, 0, 0, 0, 0, 0},
  370. /* DEPTH 5 */ {0, 0, 0, 0, 0, 0, 0, 0},
  371. /* DEPTH 6 */ {0, 0, 0, 0, 1, 1, 1, 1},
  372. /* DEPTH 7 */ {0, 0, 1, 1, 2, 2, 2, 3},
  373. /* FNUM BIT 6: 000 0100xxxx */
  374. /* DEPTH 0 */ {0, 0, 0, 0, 0, 0, 0, 0},
  375. /* DEPTH 1 */ {0, 0, 0, 0, 0, 0, 0, 0},
  376. /* DEPTH 2 */ {0, 0, 0, 0, 0, 0, 0, 0},
  377. /* DEPTH 3 */ {0, 0, 0, 0, 0, 0, 0, 0},
  378. /* DEPTH 4 */ {0, 0, 0, 0, 0, 0, 0, 1},
  379. /* DEPTH 5 */ {0, 0, 0, 0, 1, 1, 1, 1},
  380. /* DEPTH 6 */ {0, 0, 1, 1, 2, 2, 2, 3},
  381. /* DEPTH 7 */ {0, 0, 2, 3, 4, 4, 5, 6},
  382. /* FNUM BIT 7: 000 1000xxxx */
  383. /* DEPTH 0 */ {0, 0, 0, 0, 0, 0, 0, 0},
  384. /* DEPTH 1 */ {0, 0, 0, 0, 0, 0, 0, 0},
  385. /* DEPTH 2 */ {0, 0, 0, 0, 0, 0, 1, 1},
  386. /* DEPTH 3 */ {0, 0, 0, 0, 1, 1, 1, 1},
  387. /* DEPTH 4 */ {0, 0, 0, 1, 1, 1, 1, 2},
  388. /* DEPTH 5 */ {0, 0, 1, 1, 2, 2, 2, 3},
  389. /* DEPTH 6 */ {0, 0, 2, 3, 4, 4, 5, 6},
  390. /* DEPTH 7 */ {0, 0, 4, 6, 8, 8, 0xa, 0xc},
  391. /* FNUM BIT 8: 001 0000xxxx */
  392. /* DEPTH 0 */ {0, 0, 0, 0, 0, 0, 0, 0},
  393. /* DEPTH 1 */ {0, 0, 0, 0, 1, 1, 1, 1},
  394. /* DEPTH 2 */ {0, 0, 0, 1, 1, 1, 2, 2},
  395. /* DEPTH 3 */ {0, 0, 1, 1, 2, 2, 3, 3},
  396. /* DEPTH 4 */ {0, 0, 1, 2, 2, 2, 3, 4},
  397. /* DEPTH 5 */ {0, 0, 2, 3, 4, 4, 5, 6},
  398. /* DEPTH 6 */ {0, 0, 4, 6, 8, 8, 0xa, 0xc},
  399. /* DEPTH 7 */ {0, 0, 8, 0xc,0x10,0x10,0x14,0x18},
  400. /* FNUM BIT 9: 010 0000xxxx */
  401. /* DEPTH 0 */ {0, 0, 0, 0, 0, 0, 0, 0},
  402. /* DEPTH 1 */ {0, 0, 0, 0, 2, 2, 2, 2},
  403. /* DEPTH 2 */ {0, 0, 0, 2, 2, 2, 4, 4},
  404. /* DEPTH 3 */ {0, 0, 2, 2, 4, 4, 6, 6},
  405. /* DEPTH 4 */ {0, 0, 2, 4, 4, 4, 6, 8},
  406. /* DEPTH 5 */ {0, 0, 4, 6, 8, 8, 0xa, 0xc},
  407. /* DEPTH 6 */ {0, 0, 8, 0xc,0x10,0x10,0x14,0x18},
  408. /* DEPTH 7 */ {0, 0,0x10,0x18,0x20,0x20,0x28,0x30},
  409. /* FNUM BIT10: 100 0000xxxx */
  410. /* DEPTH 0 */ {0, 0, 0, 0, 0, 0, 0, 0},
  411. /* DEPTH 1 */ {0, 0, 0, 0, 4, 4, 4, 4},
  412. /* DEPTH 2 */ {0, 0, 0, 4, 4, 4, 8, 8},
  413. /* DEPTH 3 */ {0, 0, 4, 4, 8, 8, 0xc, 0xc},
  414. /* DEPTH 4 */ {0, 0, 4, 8, 8, 8, 0xc,0x10},
  415. /* DEPTH 5 */ {0, 0, 8, 0xc,0x10,0x10,0x14,0x18},
  416. /* DEPTH 6 */ {0, 0,0x10,0x18,0x20,0x20,0x28,0x30},
  417. /* DEPTH 7 */ {0, 0,0x20,0x30,0x40,0x40,0x50,0x60},
  418. };
  419. /* all 128 LFO PM waveforms */
  420. static INT32 lfo_pm_table[128*8*32]; /* 128 combinations of 7 bits meaningful (of F-NUMBER), 8 LFO depths, 32 LFO output levels per one depth */
  421. /* there are 2048 FNUMs that can be generated using FNUM/BLK registers
  422. but LFO works with one more bit of a precision so we really need 4096 elements */
  423. static UINT32 fn_table[4096]; /* fnumber->increment counter */
  424. static int g_lfo_ampm = 0;
  425. /* register number to channel number , slot offset */
  426. #define OPN_CHAN(N) (N&3)
  427. #define OPN_SLOT(N) ((N>>2)&3)
  428. /* slot number */
  429. #define SLOT1 0
  430. #define SLOT2 2
  431. #define SLOT3 1
  432. #define SLOT4 3
  433. /* OPN Mode Register Write */
  434. INLINE void set_timers( int v )
  435. {
  436. /* b7 = CSM MODE */
  437. /* b6 = 3 slot mode */
  438. /* b5 = reset b */
  439. /* b4 = reset a */
  440. /* b3 = timer enable b */
  441. /* b2 = timer enable a */
  442. /* b1 = load b */
  443. /* b0 = load a */
  444. ym2612.OPN.ST.mode = v;
  445. /* reset Timer b flag */
  446. if( v & 0x20 )
  447. ym2612.OPN.ST.status &= ~2;
  448. /* reset Timer a flag */
  449. if( v & 0x10 )
  450. ym2612.OPN.ST.status &= ~1;
  451. }
  452. INLINE void FM_KEYON(int c , int s )
  453. {
  454. FM_SLOT *SLOT = &ym2612.CH[c].SLOT[s];
  455. if( !SLOT->key )
  456. {
  457. SLOT->key = 1;
  458. SLOT->phase = 0; /* restart Phase Generator */
  459. SLOT->state = EG_ATT; /* phase -> Attack */
  460. SLOT->volume = MAX_ATT_INDEX; /* fix Ecco 2 splash sound */
  461. ym2612.slot_mask |= (1<<s) << (c*4);
  462. }
  463. }
  464. INLINE void FM_KEYOFF(int c , int s )
  465. {
  466. FM_SLOT *SLOT = &ym2612.CH[c].SLOT[s];
  467. if( SLOT->key )
  468. {
  469. SLOT->key = 0;
  470. if (SLOT->state>EG_REL)
  471. SLOT->state = EG_REL;/* phase -> Release */
  472. }
  473. }
  474. /* set detune & multiple */
  475. INLINE void set_det_mul(FM_CH *CH, FM_SLOT *SLOT, int v)
  476. {
  477. SLOT->mul = (v&0x0f)? (v&0x0f)*2 : 1;
  478. SLOT->DT = ym2612.OPN.ST.dt_tab[(v>>4)&7];
  479. CH->SLOT[SLOT1].Incr=-1;
  480. }
  481. /* set total level */
  482. INLINE void set_tl(FM_SLOT *SLOT, int v)
  483. {
  484. SLOT->tl = (v&0x7f)<<(ENV_BITS-7); /* 7bit TL */
  485. }
  486. /* set attack rate & key scale */
  487. INLINE void set_ar_ksr(FM_CH *CH, FM_SLOT *SLOT, int v)
  488. {
  489. UINT8 old_KSR = SLOT->KSR;
  490. SLOT->ar = (v&0x1f) ? 32 + ((v&0x1f)<<1) : 0;
  491. SLOT->KSR = 3-(v>>6);
  492. if (SLOT->KSR != old_KSR)
  493. {
  494. CH->SLOT[SLOT1].Incr=-1;
  495. }
  496. else
  497. {
  498. int eg_sh_ar, eg_sel_ar;
  499. /* refresh Attack rate */
  500. if ((SLOT->ar + SLOT->ksr) < 32+62)
  501. {
  502. eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ];
  503. eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ];
  504. }
  505. else
  506. {
  507. eg_sh_ar = 0;
  508. eg_sel_ar = 17;
  509. }
  510. SLOT->eg_pack_ar = eg_inc_pack[eg_sel_ar] | (eg_sh_ar<<24);
  511. }
  512. }
  513. /* set decay rate */
  514. INLINE void set_dr(FM_SLOT *SLOT, int v)
  515. {
  516. int eg_sh_d1r, eg_sel_d1r;
  517. SLOT->d1r = (v&0x1f) ? 32 + ((v&0x1f)<<1) : 0;
  518. eg_sh_d1r = eg_rate_shift [SLOT->d1r + SLOT->ksr];
  519. eg_sel_d1r= eg_rate_select[SLOT->d1r + SLOT->ksr];
  520. SLOT->eg_pack_d1r = eg_inc_pack[eg_sel_d1r] | (eg_sh_d1r<<24);
  521. }
  522. /* set sustain rate */
  523. INLINE void set_sr(FM_SLOT *SLOT, int v)
  524. {
  525. int eg_sh_d2r, eg_sel_d2r;
  526. SLOT->d2r = (v&0x1f) ? 32 + ((v&0x1f)<<1) : 0;
  527. eg_sh_d2r = eg_rate_shift [SLOT->d2r + SLOT->ksr];
  528. eg_sel_d2r= eg_rate_select[SLOT->d2r + SLOT->ksr];
  529. SLOT->eg_pack_d2r = eg_inc_pack[eg_sel_d2r] | (eg_sh_d2r<<24);
  530. }
  531. /* set release rate */
  532. INLINE void set_sl_rr(FM_SLOT *SLOT, int v)
  533. {
  534. int eg_sh_rr, eg_sel_rr;
  535. SLOT->sl = sl_table[ v>>4 ];
  536. SLOT->rr = 34 + ((v&0x0f)<<2);
  537. eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr];
  538. eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr];
  539. SLOT->eg_pack_rr = eg_inc_pack[eg_sel_rr] | (eg_sh_rr<<24);
  540. }
  541. INLINE signed int op_calc(UINT32 phase, unsigned int env, signed int pm)
  542. {
  543. int ret, sin = (phase>>16) + (pm>>1);
  544. int neg = sin & 0x200;
  545. if (sin & 0x100) sin ^= 0xff;
  546. sin&=0xff;
  547. env&=~1;
  548. // this was already checked
  549. // if (env >= ENV_QUIET) // 384
  550. // return 0;
  551. ret = ym_tl_tab[sin | (env<<7)];
  552. return neg ? -ret : ret;
  553. }
  554. INLINE signed int op_calc1(UINT32 phase, unsigned int env, signed int pm)
  555. {
  556. int ret, sin = (phase+pm)>>16;
  557. int neg = sin & 0x200;
  558. if (sin & 0x100) sin ^= 0xff;
  559. sin&=0xff;
  560. env&=~1;
  561. // if (env >= ENV_QUIET) // 384
  562. // return 0;
  563. ret = ym_tl_tab[sin | (env<<7)];
  564. return neg ? -ret : ret;
  565. }
  566. #if !defined(_ASM_YM2612_C) || defined(EXTERNAL_YM2612)
  567. /* advance LFO to next sample */
  568. INLINE int advance_lfo(int lfo_ampm, UINT32 lfo_cnt_old, UINT32 lfo_cnt)
  569. {
  570. UINT8 pos;
  571. UINT8 prev_pos;
  572. prev_pos = (lfo_cnt_old >> LFO_SH) & 127;
  573. pos = (lfo_cnt >> LFO_SH) & 127;
  574. /* update AM when LFO output changes */
  575. if (prev_pos != pos)
  576. {
  577. lfo_ampm &= 0xff;
  578. /* triangle */
  579. /* AM: 0 to 126 step +2, 126 to 0 step -2 */
  580. if (pos<64)
  581. lfo_ampm |= ((pos&63) * 2) << 8; /* 0 - 126 */
  582. else
  583. lfo_ampm |= (126 - (pos&63)*2) << 8;
  584. }
  585. else
  586. {
  587. return lfo_ampm;
  588. }
  589. /* PM works with 4 times slower clock */
  590. prev_pos >>= 2;
  591. pos >>= 2;
  592. /* update PM when LFO output changes */
  593. if (prev_pos != pos)
  594. {
  595. lfo_ampm &= ~0xff;
  596. lfo_ampm |= pos; /* 0 - 32 */
  597. }
  598. return lfo_ampm;
  599. }
  600. #define EG_INC_VAL() \
  601. ((1 << ((pack >> ((eg_cnt>>shift)&7)*3)&7)) >> 1)
  602. INLINE UINT32 update_eg_phase(FM_SLOT *SLOT, UINT32 eg_cnt)
  603. {
  604. INT32 volume = SLOT->volume;
  605. switch(SLOT->state)
  606. {
  607. case EG_ATT: /* attack phase */
  608. {
  609. UINT32 pack = SLOT->eg_pack_ar;
  610. UINT32 shift = pack>>24;
  611. if ( !(eg_cnt & ((1<<shift)-1) ) )
  612. {
  613. volume += ( ~volume * EG_INC_VAL() ) >>4;
  614. if (volume <= MIN_ATT_INDEX)
  615. {
  616. volume = MIN_ATT_INDEX;
  617. SLOT->state = EG_DEC;
  618. }
  619. }
  620. break;
  621. }
  622. case EG_DEC: /* decay phase */
  623. {
  624. UINT32 pack = SLOT->eg_pack_d1r;
  625. UINT32 shift = pack>>24;
  626. if ( !(eg_cnt & ((1<<shift)-1) ) )
  627. {
  628. volume += EG_INC_VAL();
  629. if ( volume >= (INT32) SLOT->sl )
  630. SLOT->state = EG_SUS;
  631. }
  632. break;
  633. }
  634. case EG_SUS: /* sustain phase */
  635. {
  636. UINT32 pack = SLOT->eg_pack_d2r;
  637. UINT32 shift = pack>>24;
  638. if ( !(eg_cnt & ((1<<shift)-1) ) )
  639. {
  640. volume += EG_INC_VAL();
  641. if ( volume >= MAX_ATT_INDEX )
  642. {
  643. volume = MAX_ATT_INDEX;
  644. /* do not change SLOT->state (verified on real chip) */
  645. }
  646. }
  647. break;
  648. }
  649. case EG_REL: /* release phase */
  650. {
  651. UINT32 pack = SLOT->eg_pack_rr;
  652. UINT32 shift = pack>>24;
  653. if ( !(eg_cnt & ((1<<shift)-1) ) )
  654. {
  655. volume += EG_INC_VAL();
  656. if ( volume >= MAX_ATT_INDEX )
  657. {
  658. volume = MAX_ATT_INDEX;
  659. SLOT->state = EG_OFF;
  660. }
  661. }
  662. break;
  663. }
  664. }
  665. SLOT->volume = volume;
  666. return SLOT->tl + ((UINT32)volume); /* tl is 7bit<<3, volume 0-1023 (0-2039 total) */
  667. }
  668. #endif
  669. typedef struct
  670. {
  671. UINT16 vol_out1; /* 00: current output from EG circuit (without AM from LFO) */
  672. UINT16 vol_out2;
  673. UINT16 vol_out3;
  674. UINT16 vol_out4;
  675. UINT32 pad[2];
  676. UINT32 phase1; /* 10 */
  677. UINT32 phase2;
  678. UINT32 phase3;
  679. UINT32 phase4;
  680. UINT32 incr1; /* 20: phase step */
  681. UINT32 incr2;
  682. UINT32 incr3;
  683. UINT32 incr4;
  684. UINT32 lfo_cnt; /* 30 */
  685. UINT32 lfo_inc;
  686. INT32 mem; /* one sample delay memory */
  687. UINT32 eg_cnt; /* envelope generator counter */
  688. FM_CH *CH; /* 40: envelope generator counter */
  689. UINT32 eg_timer;
  690. UINT32 eg_timer_add;
  691. UINT32 pack; // 4c: stereo, lastchan, disabled, lfo_enabled | pan_r, pan_l, ams[2] | AMmasks[4] | FB[4] | lfo_ampm[16]
  692. UINT32 algo; /* 50: algo[3], was_update */
  693. INT32 op1_out;
  694. #ifdef _MIPS_ARCH_ALLEGREX
  695. UINT32 pad1[3+8];
  696. #endif
  697. } chan_rend_context;
  698. #if !defined(_ASM_YM2612_C) || defined(EXTERNAL_YM2612)
  699. static void chan_render_loop(chan_rend_context *ct, int *buffer, int length)
  700. {
  701. int scounter; /* sample counter */
  702. /* sample generating loop */
  703. for (scounter = 0; scounter < length; scounter++)
  704. {
  705. int smp = 0; /* produced sample */
  706. unsigned int eg_out, eg_out2, eg_out4;
  707. if (ct->pack & 8) { /* LFO enabled ? (test Earthworm Jim in between demo 1 and 2) */
  708. ct->pack = (ct->pack&0xffff) | (advance_lfo(ct->pack >> 16, ct->lfo_cnt, ct->lfo_cnt + ct->lfo_inc) << 16);
  709. ct->lfo_cnt += ct->lfo_inc;
  710. }
  711. ct->eg_timer += ct->eg_timer_add;
  712. while (ct->eg_timer >= EG_TIMER_OVERFLOW)
  713. {
  714. ct->eg_timer -= EG_TIMER_OVERFLOW;
  715. ct->eg_cnt++;
  716. if (ct->CH->SLOT[SLOT1].state != EG_OFF) ct->vol_out1 = update_eg_phase(&ct->CH->SLOT[SLOT1], ct->eg_cnt);
  717. if (ct->CH->SLOT[SLOT2].state != EG_OFF) ct->vol_out2 = update_eg_phase(&ct->CH->SLOT[SLOT2], ct->eg_cnt);
  718. if (ct->CH->SLOT[SLOT3].state != EG_OFF) ct->vol_out3 = update_eg_phase(&ct->CH->SLOT[SLOT3], ct->eg_cnt);
  719. if (ct->CH->SLOT[SLOT4].state != EG_OFF) ct->vol_out4 = update_eg_phase(&ct->CH->SLOT[SLOT4], ct->eg_cnt);
  720. }
  721. if (ct->pack & 4) continue; /* output disabled */
  722. /* calculate channel sample */
  723. eg_out = ct->vol_out1;
  724. if ( (ct->pack & 8) && (ct->pack&(1<<(SLOT1+8))) ) eg_out += ct->pack >> (((ct->pack&0xc0)>>6)+24);
  725. if( eg_out < ENV_QUIET ) /* SLOT 1 */
  726. {
  727. int out = 0;
  728. if (ct->pack&0xf000) out = ((ct->op1_out>>16) + ((ct->op1_out<<16)>>16)) << ((ct->pack&0xf000)>>12); /* op1_out0 + op1_out1 */
  729. ct->op1_out <<= 16;
  730. ct->op1_out |= (unsigned short)op_calc1(ct->phase1, eg_out, out);
  731. } else {
  732. ct->op1_out <<= 16; /* op1_out0 = op1_out1; op1_out1 = 0; */
  733. }
  734. eg_out = ct->vol_out3; // volume_calc(&CH->SLOT[SLOT3]);
  735. eg_out2 = ct->vol_out2; // volume_calc(&CH->SLOT[SLOT2]);
  736. eg_out4 = ct->vol_out4; // volume_calc(&CH->SLOT[SLOT4]);
  737. if (ct->pack & 8) {
  738. unsigned int add = ct->pack >> (((ct->pack&0xc0)>>6)+24);
  739. if (ct->pack & (1<<(SLOT3+8))) eg_out += add;
  740. if (ct->pack & (1<<(SLOT2+8))) eg_out2 += add;
  741. if (ct->pack & (1<<(SLOT4+8))) eg_out4 += add;
  742. }
  743. switch( ct->CH->ALGO )
  744. {
  745. case 0:
  746. {
  747. /* M1---C1---MEM---M2---C2---OUT */
  748. int m2,c1,c2=0; /* Phase Modulation input for operators 2,3,4 */
  749. m2 = ct->mem;
  750. c1 = ct->op1_out>>16;
  751. if( eg_out < ENV_QUIET ) { /* SLOT 3 */
  752. c2 = op_calc(ct->phase3, eg_out, m2);
  753. }
  754. if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
  755. ct->mem = op_calc(ct->phase2, eg_out2, c1);
  756. }
  757. else ct->mem = 0;
  758. if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
  759. smp = op_calc(ct->phase4, eg_out4, c2);
  760. }
  761. break;
  762. }
  763. case 1:
  764. {
  765. /* M1------+-MEM---M2---C2---OUT */
  766. /* C1-+ */
  767. int m2,c2=0;
  768. m2 = ct->mem;
  769. ct->mem = ct->op1_out>>16;
  770. if( eg_out < ENV_QUIET ) { /* SLOT 3 */
  771. c2 = op_calc(ct->phase3, eg_out, m2);
  772. }
  773. if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
  774. ct->mem+= op_calc(ct->phase2, eg_out2, 0);
  775. }
  776. if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
  777. smp = op_calc(ct->phase4, eg_out4, c2);
  778. }
  779. break;
  780. }
  781. case 2:
  782. {
  783. /* M1-----------------+-C2---OUT */
  784. /* C1---MEM---M2-+ */
  785. int m2,c2;
  786. m2 = ct->mem;
  787. c2 = ct->op1_out>>16;
  788. if( eg_out < ENV_QUIET ) { /* SLOT 3 */
  789. c2 += op_calc(ct->phase3, eg_out, m2);
  790. }
  791. if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
  792. ct->mem = op_calc(ct->phase2, eg_out2, 0);
  793. }
  794. else ct->mem = 0;
  795. if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
  796. smp = op_calc(ct->phase4, eg_out4, c2);
  797. }
  798. break;
  799. }
  800. case 3:
  801. {
  802. /* M1---C1---MEM------+-C2---OUT */
  803. /* M2-+ */
  804. int c1,c2;
  805. c2 = ct->mem;
  806. c1 = ct->op1_out>>16;
  807. if( eg_out < ENV_QUIET ) { /* SLOT 3 */
  808. c2 += op_calc(ct->phase3, eg_out, 0);
  809. }
  810. if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
  811. ct->mem = op_calc(ct->phase2, eg_out2, c1);
  812. }
  813. else ct->mem = 0;
  814. if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
  815. smp = op_calc(ct->phase4, eg_out4, c2);
  816. }
  817. break;
  818. }
  819. case 4:
  820. {
  821. /* M1---C1-+-OUT */
  822. /* M2---C2-+ */
  823. /* MEM: not used */
  824. int c1,c2=0;
  825. c1 = ct->op1_out>>16;
  826. if( eg_out < ENV_QUIET ) { /* SLOT 3 */
  827. c2 = op_calc(ct->phase3, eg_out, 0);
  828. }
  829. if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
  830. smp = op_calc(ct->phase2, eg_out2, c1);
  831. }
  832. if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
  833. smp+= op_calc(ct->phase4, eg_out4, c2);
  834. }
  835. break;
  836. }
  837. case 5:
  838. {
  839. /* +----C1----+ */
  840. /* M1-+-MEM---M2-+-OUT */
  841. /* +----C2----+ */
  842. int m2,c1,c2;
  843. m2 = ct->mem;
  844. ct->mem = c1 = c2 = ct->op1_out>>16;
  845. if( eg_out < ENV_QUIET ) { /* SLOT 3 */
  846. smp = op_calc(ct->phase3, eg_out, m2);
  847. }
  848. if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
  849. smp+= op_calc(ct->phase2, eg_out2, c1);
  850. }
  851. if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
  852. smp+= op_calc(ct->phase4, eg_out4, c2);
  853. }
  854. break;
  855. }
  856. case 6:
  857. {
  858. /* M1---C1-+ */
  859. /* M2-+-OUT */
  860. /* C2-+ */
  861. /* MEM: not used */
  862. int c1;
  863. c1 = ct->op1_out>>16;
  864. if( eg_out < ENV_QUIET ) { /* SLOT 3 */
  865. smp = op_calc(ct->phase3, eg_out, 0);
  866. }
  867. if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
  868. smp+= op_calc(ct->phase2, eg_out2, c1);
  869. }
  870. if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
  871. smp+= op_calc(ct->phase4, eg_out4, 0);
  872. }
  873. break;
  874. }
  875. case 7:
  876. {
  877. /* M1-+ */
  878. /* C1-+-OUT */
  879. /* M2-+ */
  880. /* C2-+ */
  881. /* MEM: not used*/
  882. smp = ct->op1_out>>16;
  883. if( eg_out < ENV_QUIET ) { /* SLOT 3 */
  884. smp += op_calc(ct->phase3, eg_out, 0);
  885. }
  886. if( eg_out2 < ENV_QUIET ) { /* SLOT 2 */
  887. smp += op_calc(ct->phase2, eg_out2, 0);
  888. }
  889. if( eg_out4 < ENV_QUIET ) { /* SLOT 4 */
  890. smp += op_calc(ct->phase4, eg_out4, 0);
  891. }
  892. break;
  893. }
  894. }
  895. /* done calculating channel sample */
  896. /* mix sample to output buffer */
  897. if (smp) {
  898. if (ct->pack & 1) { /* stereo */
  899. if (ct->pack & 0x20) /* L */ /* TODO: check correctness */
  900. buffer[scounter*2] += smp;
  901. if (ct->pack & 0x10) /* R */
  902. buffer[scounter*2+1] += smp;
  903. } else {
  904. buffer[scounter] += smp;
  905. }
  906. ct->algo = 8; // algo is only used in asm, here only bit3 is used
  907. }
  908. /* update phase counters AFTER output calculations */
  909. ct->phase1 += ct->incr1;
  910. ct->phase2 += ct->incr2;
  911. ct->phase3 += ct->incr3;
  912. ct->phase4 += ct->incr4;
  913. }
  914. }
  915. #else
  916. void chan_render_loop(chan_rend_context *ct, int *buffer, unsigned short length);
  917. #endif
  918. static chan_rend_context crct;
  919. static void chan_render_prep(void)
  920. {
  921. crct.eg_timer_add = ym2612.OPN.eg_timer_add;
  922. crct.lfo_inc = ym2612.OPN.lfo_inc;
  923. }
  924. static void chan_render_finish(void)
  925. {
  926. ym2612.OPN.eg_cnt = crct.eg_cnt;
  927. ym2612.OPN.eg_timer = crct.eg_timer;
  928. g_lfo_ampm = crct.pack >> 16; // need_save
  929. ym2612.OPN.lfo_cnt = crct.lfo_cnt;
  930. }
  931. static int chan_render(int *buffer, int length, int c, UINT32 flags) // flags: stereo, ?, disabled, ?, pan_r, pan_l
  932. {
  933. crct.CH = &ym2612.CH[c];
  934. crct.mem = crct.CH->mem_value; /* one sample delay memory */
  935. crct.lfo_cnt = ym2612.OPN.lfo_cnt;
  936. flags &= 0x35;
  937. if (crct.lfo_inc) {
  938. flags |= 8;
  939. flags |= g_lfo_ampm << 16;
  940. flags |= crct.CH->AMmasks << 8;
  941. if (crct.CH->ams == 8) // no ams
  942. flags &= ~0xf00;
  943. else flags |= (crct.CH->ams&3)<<6;
  944. }
  945. flags |= (crct.CH->FB&0xf)<<12; /* feedback shift */
  946. crct.pack = flags;
  947. crct.eg_cnt = ym2612.OPN.eg_cnt; /* envelope generator counter */
  948. crct.eg_timer = ym2612.OPN.eg_timer;
  949. /* precalculate phase modulation incr */
  950. crct.phase1 = crct.CH->SLOT[SLOT1].phase;
  951. crct.phase2 = crct.CH->SLOT[SLOT2].phase;
  952. crct.phase3 = crct.CH->SLOT[SLOT3].phase;
  953. crct.phase4 = crct.CH->SLOT[SLOT4].phase;
  954. /* current output from EG circuit (without AM from LFO) */
  955. crct.vol_out1 = crct.CH->SLOT[SLOT1].tl + ((UINT32)crct.CH->SLOT[SLOT1].volume);
  956. crct.vol_out2 = crct.CH->SLOT[SLOT2].tl + ((UINT32)crct.CH->SLOT[SLOT2].volume);
  957. crct.vol_out3 = crct.CH->SLOT[SLOT3].tl + ((UINT32)crct.CH->SLOT[SLOT3].volume);
  958. crct.vol_out4 = crct.CH->SLOT[SLOT4].tl + ((UINT32)crct.CH->SLOT[SLOT4].volume);
  959. crct.op1_out = crct.CH->op1_out;
  960. crct.algo = crct.CH->ALGO & 7;
  961. if(crct.CH->pms)
  962. {
  963. /* add support for 3 slot mode */
  964. UINT32 block_fnum = crct.CH->block_fnum;
  965. UINT32 fnum_lfo = ((block_fnum & 0x7f0) >> 4) * 32 * 8;
  966. INT32 lfo_fn_table_index_offset = lfo_pm_table[ fnum_lfo + crct.CH->pms + ((crct.pack>>16)&0xff) ];
  967. if (lfo_fn_table_index_offset) /* LFO phase modulation active */
  968. {
  969. UINT8 blk;
  970. UINT32 fn;
  971. int kc,fc;
  972. blk = block_fnum >> 11;
  973. block_fnum = block_fnum*2 + lfo_fn_table_index_offset;
  974. fn = block_fnum & 0xfff;
  975. /* keyscale code */
  976. kc = (blk<<2) | opn_fktable[fn >> 8];
  977. /* phase increment counter */
  978. fc = fn_table[fn]>>(7-blk);
  979. crct.incr1 = ((fc+crct.CH->SLOT[SLOT1].DT[kc])*crct.CH->SLOT[SLOT1].mul) >> 1;
  980. crct.incr2 = ((fc+crct.CH->SLOT[SLOT2].DT[kc])*crct.CH->SLOT[SLOT2].mul) >> 1;
  981. crct.incr3 = ((fc+crct.CH->SLOT[SLOT3].DT[kc])*crct.CH->SLOT[SLOT3].mul) >> 1;
  982. crct.incr4 = ((fc+crct.CH->SLOT[SLOT4].DT[kc])*crct.CH->SLOT[SLOT4].mul) >> 1;
  983. }
  984. else /* LFO phase modulation = zero */
  985. {
  986. crct.incr1 = crct.CH->SLOT[SLOT1].Incr;
  987. crct.incr2 = crct.CH->SLOT[SLOT2].Incr;
  988. crct.incr3 = crct.CH->SLOT[SLOT3].Incr;
  989. crct.incr4 = crct.CH->SLOT[SLOT4].Incr;
  990. }
  991. }
  992. else /* no LFO phase modulation */
  993. {
  994. crct.incr1 = crct.CH->SLOT[SLOT1].Incr;
  995. crct.incr2 = crct.CH->SLOT[SLOT2].Incr;
  996. crct.incr3 = crct.CH->SLOT[SLOT3].Incr;
  997. crct.incr4 = crct.CH->SLOT[SLOT4].Incr;
  998. }
  999. chan_render_loop(&crct, buffer, length);
  1000. crct.CH->op1_out = crct.op1_out;
  1001. crct.CH->mem_value = crct.mem;
  1002. if (crct.CH->SLOT[SLOT1].state | crct.CH->SLOT[SLOT2].state | crct.CH->SLOT[SLOT3].state | crct.CH->SLOT[SLOT4].state)
  1003. {
  1004. crct.CH->SLOT[SLOT1].phase = crct.phase1;
  1005. crct.CH->SLOT[SLOT2].phase = crct.phase2;
  1006. crct.CH->SLOT[SLOT3].phase = crct.phase3;
  1007. crct.CH->SLOT[SLOT4].phase = crct.phase4;
  1008. }
  1009. else
  1010. ym2612.slot_mask &= ~(0xf << (c*4));
  1011. return (crct.algo & 8) >> 3; // had output
  1012. }
  1013. /* update phase increment and envelope generator */
  1014. INLINE void refresh_fc_eg_slot(FM_SLOT *SLOT, int fc, int kc)
  1015. {
  1016. int ksr, fdt;
  1017. /* (frequency) phase increment counter */
  1018. fdt = fc+SLOT->DT[kc];
  1019. /* detect overflow */
  1020. // if (fdt < 0) fdt += fn_table[0x7ff*2] >> (7-blk-1);
  1021. if (fdt < 0) fdt += fn_table[0x7ff*2] >> 2;
  1022. SLOT->Incr = fdt*SLOT->mul >> 1;
  1023. ksr = kc >> SLOT->KSR;
  1024. if( SLOT->ksr != ksr )
  1025. {
  1026. int eg_sh, eg_sel;
  1027. SLOT->ksr = ksr;
  1028. /* calculate envelope generator rates */
  1029. if ((SLOT->ar + ksr) < 32+62)
  1030. {
  1031. eg_sh = eg_rate_shift [SLOT->ar + ksr ];
  1032. eg_sel = eg_rate_select[SLOT->ar + ksr ];
  1033. }
  1034. else
  1035. {
  1036. eg_sh = 0;
  1037. eg_sel = 17;
  1038. }
  1039. SLOT->eg_pack_ar = eg_inc_pack[eg_sel] | (eg_sh<<24);
  1040. eg_sh = eg_rate_shift [SLOT->d1r + ksr];
  1041. eg_sel = eg_rate_select[SLOT->d1r + ksr];
  1042. SLOT->eg_pack_d1r = eg_inc_pack[eg_sel] | (eg_sh<<24);
  1043. eg_sh = eg_rate_shift [SLOT->d2r + ksr];
  1044. eg_sel = eg_rate_select[SLOT->d2r + ksr];
  1045. SLOT->eg_pack_d2r = eg_inc_pack[eg_sel] | (eg_sh<<24);
  1046. eg_sh = eg_rate_shift [SLOT->rr + ksr];
  1047. eg_sel = eg_rate_select[SLOT->rr + ksr];
  1048. SLOT->eg_pack_rr = eg_inc_pack[eg_sel] | (eg_sh<<24);
  1049. }
  1050. }
  1051. /* update phase increment counters */
  1052. INLINE void refresh_fc_eg_chan(FM_CH *CH)
  1053. {
  1054. if( CH->SLOT[SLOT1].Incr==-1){
  1055. int fc = CH->fc;
  1056. int kc = CH->kcode;
  1057. refresh_fc_eg_slot(&CH->SLOT[SLOT1] , fc , kc );
  1058. refresh_fc_eg_slot(&CH->SLOT[SLOT2] , fc , kc );
  1059. refresh_fc_eg_slot(&CH->SLOT[SLOT3] , fc , kc );
  1060. refresh_fc_eg_slot(&CH->SLOT[SLOT4] , fc , kc );
  1061. }
  1062. }
  1063. INLINE void refresh_fc_eg_chan_sl3(void)
  1064. {
  1065. if( ym2612.CH[2].SLOT[SLOT1].Incr==-1)
  1066. {
  1067. refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT1], ym2612.OPN.SL3.fc[1], ym2612.OPN.SL3.kcode[1] );
  1068. refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT2], ym2612.OPN.SL3.fc[2], ym2612.OPN.SL3.kcode[2] );
  1069. refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT3], ym2612.OPN.SL3.fc[0], ym2612.OPN.SL3.kcode[0] );
  1070. refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT4], ym2612.CH[2].fc , ym2612.CH[2].kcode );
  1071. }
  1072. }
  1073. /* initialize time tables */
  1074. static void init_timetables(const UINT8 *dttable)
  1075. {
  1076. int i,d;
  1077. double rate;
  1078. /* DeTune table */
  1079. for (d = 0;d <= 3;d++){
  1080. for (i = 0;i <= 31;i++){
  1081. rate = ((double)dttable[d*32 + i]) * SIN_LEN * ym2612.OPN.ST.freqbase * (1<<FREQ_SH) / ((double)(1<<20));
  1082. ym2612.OPN.ST.dt_tab[d][i] = (INT32) rate;
  1083. ym2612.OPN.ST.dt_tab[d+4][i] = -ym2612.OPN.ST.dt_tab[d][i];
  1084. }
  1085. }
  1086. }
  1087. static void reset_channels(FM_CH *CH)
  1088. {
  1089. int c,s;
  1090. ym2612.OPN.ST.mode = 0; /* normal mode */
  1091. ym2612.OPN.ST.TA = 0;
  1092. ym2612.OPN.ST.TAC = 0;
  1093. ym2612.OPN.ST.TB = 0;
  1094. ym2612.OPN.ST.TBC = 0;
  1095. for( c = 0 ; c < 6 ; c++ )
  1096. {
  1097. CH[c].fc = 0;
  1098. for(s = 0 ; s < 4 ; s++ )
  1099. {
  1100. CH[c].SLOT[s].state= EG_OFF;
  1101. CH[c].SLOT[s].volume = MAX_ATT_INDEX;
  1102. }
  1103. CH[c].mem_value = CH[c].op1_out = 0;
  1104. }
  1105. ym2612.slot_mask = 0;
  1106. }
  1107. /* initialize generic tables */
  1108. static void init_tables(void)
  1109. {
  1110. signed int i,x,y,p;
  1111. signed int n;
  1112. double o,m;
  1113. for (i=0; i < 256; i++)
  1114. {
  1115. /* non-standard sinus */
  1116. m = sin( ((i*2)+1) * M_PI / SIN_LEN ); /* checked against the real chip */
  1117. /* we never reach zero here due to ((i*2)+1) */
  1118. if (m>0.0)
  1119. o = 8*log(1.0/m)/log(2); /* convert to 'decibels' */
  1120. else
  1121. o = 8*log(-1.0/m)/log(2); /* convert to 'decibels' */
  1122. o = o / (ENV_STEP/4);
  1123. n = (int)(2.0*o);
  1124. if (n&1) /* round to nearest */
  1125. n = (n>>1)+1;
  1126. else
  1127. n = n>>1;
  1128. ym_sin_tab[ i ] = n;
  1129. //dprintf("FM.C: sin [%4i]= %4i", i, ym_sin_tab[i]);
  1130. }
  1131. //dprintf("FM.C: ENV_QUIET= %08x", ENV_QUIET );
  1132. for (x=0; x < TL_RES_LEN; x++)
  1133. {
  1134. m = (1<<16) / pow(2, (x+1) * (ENV_STEP/4.0) / 8.0);
  1135. m = floor(m);
  1136. /* we never reach (1<<16) here due to the (x+1) */
  1137. /* result fits within 16 bits at maximum */
  1138. n = (int)m; /* 16 bits here */
  1139. n >>= 4; /* 12 bits here */
  1140. if (n&1) /* round to nearest */
  1141. n = (n>>1)+1;
  1142. else
  1143. n = n>>1;
  1144. /* 11 bits here (rounded) */
  1145. n <<= 2; /* 13 bits here (as in real chip) */
  1146. ym_tl_tab2[ x ] = n;
  1147. for (i=1; i < 13; i++)
  1148. {
  1149. ym_tl_tab2[ x + i*TL_RES_LEN ] = n >> i;
  1150. }
  1151. }
  1152. for (x=0; x < 256; x++)
  1153. {
  1154. int sin = ym_sin_tab[ x ];
  1155. for (y=0; y < 2*13*TL_RES_LEN/8; y+=2)
  1156. {
  1157. p = (y<<2) + sin;
  1158. if (p >= 13*TL_RES_LEN)
  1159. ym_tl_tab[(y<<7) | x] = 0;
  1160. else ym_tl_tab[(y<<7) | x] = ym_tl_tab2[p];
  1161. }
  1162. }
  1163. /* build LFO PM modulation table */
  1164. for(i = 0; i < 8; i++) /* 8 PM depths */
  1165. {
  1166. UINT8 fnum;
  1167. for (fnum=0; fnum<128; fnum++) /* 7 bits meaningful of F-NUMBER */
  1168. {
  1169. UINT8 value;
  1170. UINT8 step;
  1171. UINT32 offset_depth = i;
  1172. UINT32 offset_fnum_bit;
  1173. UINT32 bit_tmp;
  1174. for (step=0; step<8; step++)
  1175. {
  1176. value = 0;
  1177. for (bit_tmp=0; bit_tmp<7; bit_tmp++) /* 7 bits */
  1178. {
  1179. if (fnum & (1<<bit_tmp)) /* only if bit "bit_tmp" is set */
  1180. {
  1181. offset_fnum_bit = bit_tmp * 8;
  1182. value += lfo_pm_output[offset_fnum_bit + offset_depth][step];
  1183. }
  1184. }
  1185. lfo_pm_table[(fnum*32*8) + (i*32) + step + 0] = value;
  1186. lfo_pm_table[(fnum*32*8) + (i*32) +(step^7)+ 8] = value;
  1187. lfo_pm_table[(fnum*32*8) + (i*32) + step +16] = -value;
  1188. lfo_pm_table[(fnum*32*8) + (i*32) +(step^7)+24] = -value;
  1189. }
  1190. }
  1191. }
  1192. }
  1193. /* CSM Key Controll */
  1194. #if 0
  1195. INLINE void CSMKeyControll(FM_CH *CH)
  1196. {
  1197. /* this is wrong, atm */
  1198. /* all key on */
  1199. FM_KEYON(CH,SLOT1);
  1200. FM_KEYON(CH,SLOT2);
  1201. FM_KEYON(CH,SLOT3);
  1202. FM_KEYON(CH,SLOT4);
  1203. }
  1204. #endif
  1205. /* prescaler set (and make time tables) */
  1206. static void OPNSetPres(int pres)
  1207. {
  1208. int i;
  1209. /* frequency base */
  1210. ym2612.OPN.ST.freqbase = (ym2612.OPN.ST.rate) ? ((double)ym2612.OPN.ST.clock / ym2612.OPN.ST.rate) / pres : 0;
  1211. ym2612.OPN.eg_timer_add = (1<<EG_SH) * ym2612.OPN.ST.freqbase;
  1212. /* make time tables */
  1213. init_timetables( dt_tab );
  1214. /* there are 2048 FNUMs that can be generated using FNUM/BLK registers
  1215. but LFO works with one more bit of a precision so we really need 4096 elements */
  1216. /* calculate fnumber -> increment counter table */
  1217. for(i = 0; i < 4096; i++)
  1218. {
  1219. /* freq table for octave 7 */
  1220. /* OPN phase increment counter = 20bit */
  1221. fn_table[i] = (UINT32)( (double)i * 32 * ym2612.OPN.ST.freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */
  1222. }
  1223. /* LFO freq. table */
  1224. for(i = 0; i < 8; i++)
  1225. {
  1226. /* Amplitude modulation: 64 output levels (triangle waveform); 1 level lasts for one of "lfo_samples_per_step" samples */
  1227. /* Phase modulation: one entry from lfo_pm_output lasts for one of 4 * "lfo_samples_per_step" samples */
  1228. ym2612.OPN.lfo_freq[i] = (1.0 / lfo_samples_per_step[i]) * (1<<LFO_SH) * ym2612.OPN.ST.freqbase;
  1229. }
  1230. }
  1231. /* write a OPN register (0x30-0xff) */
  1232. static int OPNWriteReg(int r, int v)
  1233. {
  1234. int ret = 1;
  1235. FM_CH *CH;
  1236. FM_SLOT *SLOT;
  1237. UINT8 c = OPN_CHAN(r);
  1238. if (c == 3) return 0; /* 0xX3,0xX7,0xXB,0xXF */
  1239. if (r >= 0x100) c+=3;
  1240. CH = &ym2612.CH[c];
  1241. SLOT = &(CH->SLOT[OPN_SLOT(r)]);
  1242. switch( r & 0xf0 ) {
  1243. case 0x30: /* DET , MUL */
  1244. set_det_mul(CH,SLOT,v);
  1245. break;
  1246. case 0x40: /* TL */
  1247. set_tl(SLOT,v);
  1248. break;
  1249. case 0x50: /* KS, AR */
  1250. set_ar_ksr(CH,SLOT,v);
  1251. break;
  1252. case 0x60: /* bit7 = AM ENABLE, DR | depends on ksr */
  1253. set_dr(SLOT,v);
  1254. if(v&0x80) CH->AMmasks |= 1<<OPN_SLOT(r);
  1255. else CH->AMmasks &= ~(1<<OPN_SLOT(r));
  1256. break;
  1257. case 0x70: /* SR | depends on ksr */
  1258. set_sr(SLOT,v);
  1259. break;
  1260. case 0x80: /* SL, RR | depends on ksr */
  1261. set_sl_rr(SLOT,v);
  1262. break;
  1263. case 0x90: /* SSG-EG */
  1264. // removed.
  1265. ret = 0;
  1266. break;
  1267. case 0xa0:
  1268. switch( OPN_SLOT(r) ){
  1269. case 0: /* 0xa0-0xa2 : FNUM1 | depends on fn_h (below) */
  1270. {
  1271. UINT32 fn = (((UINT32)( (CH->fn_h)&7))<<8) + v;
  1272. UINT8 blk = CH->fn_h>>3;
  1273. /* keyscale code */
  1274. CH->kcode = (blk<<2) | opn_fktable[fn >> 7];
  1275. /* phase increment counter */
  1276. CH->fc = fn_table[fn*2]>>(7-blk);
  1277. /* store fnum in clear form for LFO PM calculations */
  1278. CH->block_fnum = (blk<<11) | fn;
  1279. CH->SLOT[SLOT1].Incr=-1;
  1280. }
  1281. break;
  1282. case 1: /* 0xa4-0xa6 : FNUM2,BLK */
  1283. CH->fn_h = v&0x3f;
  1284. ret = 0;
  1285. break;
  1286. case 2: /* 0xa8-0xaa : 3CH FNUM1 */
  1287. if(r < 0x100)
  1288. {
  1289. UINT32 fn = (((UINT32)(ym2612.OPN.SL3.fn_h&7))<<8) + v;
  1290. UINT8 blk = ym2612.OPN.SL3.fn_h>>3;
  1291. /* keyscale code */
  1292. ym2612.OPN.SL3.kcode[c]= (blk<<2) | opn_fktable[fn >> 7];
  1293. /* phase increment counter */
  1294. ym2612.OPN.SL3.fc[c] = fn_table[fn*2]>>(7-blk);
  1295. ym2612.OPN.SL3.block_fnum[c] = (blk<<11) | fn;
  1296. ym2612.CH[2].SLOT[SLOT1].Incr=-1;
  1297. }
  1298. break;
  1299. case 3: /* 0xac-0xae : 3CH FNUM2,BLK */
  1300. if(r < 0x100)
  1301. ym2612.OPN.SL3.fn_h = v&0x3f;
  1302. ret = 0;
  1303. break;
  1304. default:
  1305. ret = 0;
  1306. break;
  1307. }
  1308. break;
  1309. case 0xb0:
  1310. switch( OPN_SLOT(r) ){
  1311. case 0: /* 0xb0-0xb2 : FB,ALGO */
  1312. {
  1313. int feedback = (v>>3)&7;
  1314. CH->ALGO = v&7;
  1315. CH->FB = feedback ? feedback+6 : 0;
  1316. }
  1317. break;
  1318. case 1: /* 0xb4-0xb6 : L , R , AMS , PMS (YM2612/YM2610B/YM2610/YM2608) */
  1319. {
  1320. int panshift = c<<1;
  1321. /* b0-2 PMS */
  1322. CH->pms = (v & 7) * 32; /* CH->pms = PM depth * 32 (index in lfo_pm_table) */
  1323. /* b4-5 AMS */
  1324. CH->ams = lfo_ams_depth_shift[(v>>4) & 3];
  1325. /* PAN : b7 = L, b6 = R */
  1326. ym2612.OPN.pan &= ~(3<<panshift);
  1327. ym2612.OPN.pan |= ((v & 0xc0) >> 6) << panshift; // ..LRLR
  1328. }
  1329. break;
  1330. default:
  1331. ret = 0;
  1332. break;
  1333. }
  1334. break;
  1335. default:
  1336. ret = 0;
  1337. break;
  1338. }
  1339. return ret;
  1340. }
  1341. /*******************************************************************************/
  1342. /* YM2612 local section */
  1343. /*******************************************************************************/
  1344. /* Generate samples for YM2612 */
  1345. int YM2612UpdateOne_(int *buffer, int length, int stereo, int is_buf_empty)
  1346. {
  1347. int pan;
  1348. int active_chs = 0;
  1349. // if !is_buf_empty, it means it has valid samples to mix with, else it may contain trash
  1350. if (is_buf_empty) memset32(buffer, 0, length<<stereo);
  1351. /*
  1352. {
  1353. int c, s;
  1354. ppp();
  1355. for (c = 0; c < 6; c++) {
  1356. int slr = 0, slm;
  1357. printf("%i: ", c);
  1358. for (s = 0; s < 4; s++) {
  1359. if (ym2612.CH[c].SLOT[s].state != EG_OFF) slr = 1;
  1360. printf(" %i", ym2612.CH[c].SLOT[s].state != EG_OFF);
  1361. }
  1362. slm = (ym2612.slot_mask&(0xf<<(c*4))) ? 1 : 0;
  1363. printf(" | %i", slm);
  1364. printf(" | %i\n", ym2612.CH[c].SLOT[SLOT1].Incr==-1);
  1365. if (slr != slm) exit(1);
  1366. }
  1367. }
  1368. */
  1369. /* refresh PG and EG */
  1370. refresh_fc_eg_chan( &ym2612.CH[0] );
  1371. refresh_fc_eg_chan( &ym2612.CH[1] );
  1372. if( (ym2612.OPN.ST.mode & 0xc0) )
  1373. /* 3SLOT MODE */
  1374. refresh_fc_eg_chan_sl3();
  1375. else
  1376. refresh_fc_eg_chan( &ym2612.CH[2] );
  1377. refresh_fc_eg_chan( &ym2612.CH[3] );
  1378. refresh_fc_eg_chan( &ym2612.CH[4] );
  1379. refresh_fc_eg_chan( &ym2612.CH[5] );
  1380. pan = ym2612.OPN.pan;
  1381. if (stereo) stereo = 1;
  1382. /* mix to 32bit dest */
  1383. // flags: stereo, ?, disabled, ?, pan_r, pan_l
  1384. chan_render_prep();
  1385. if (ym2612.slot_mask & 0x00000f) active_chs |= chan_render(buffer, length, 0, stereo|((pan&0x003)<<4)) << 0;
  1386. if (ym2612.slot_mask & 0x0000f0) active_chs |= chan_render(buffer, length, 1, stereo|((pan&0x00c)<<2)) << 1;
  1387. if (ym2612.slot_mask & 0x000f00) active_chs |= chan_render(buffer, length, 2, stereo|((pan&0x030) )) << 2;
  1388. if (ym2612.slot_mask & 0x00f000) active_chs |= chan_render(buffer, length, 3, stereo|((pan&0x0c0)>>2)) << 3;
  1389. if (ym2612.slot_mask & 0x0f0000) active_chs |= chan_render(buffer, length, 4, stereo|((pan&0x300)>>4)) << 4;
  1390. if (ym2612.slot_mask & 0xf00000) active_chs |= chan_render(buffer, length, 5, stereo|((pan&0xc00)>>6)|(ym2612.dacen<<2)) << 5;
  1391. chan_render_finish();
  1392. return active_chs; // 1 if buffer updated
  1393. }
  1394. /* initialize YM2612 emulator */
  1395. void YM2612Init_(int clock, int rate)
  1396. {
  1397. memset(&ym2612, 0, sizeof(ym2612));
  1398. init_tables();
  1399. ym2612.OPN.ST.clock = clock;
  1400. ym2612.OPN.ST.rate = rate;
  1401. OPNSetPres( 6*24 );
  1402. /* Extend handler */
  1403. YM2612ResetChip_();
  1404. }
  1405. /* reset */
  1406. void YM2612ResetChip_(void)
  1407. {
  1408. int i;
  1409. memset(ym2612.REGS, 0, sizeof(ym2612.REGS));
  1410. set_timers( 0x30 ); /* mode 0 , timer reset */
  1411. ym2612.REGS[0x27] = 0x30;
  1412. ym2612.OPN.eg_timer = 0;
  1413. ym2612.OPN.eg_cnt = 0;
  1414. ym2612.OPN.ST.status = 0;
  1415. reset_channels( &ym2612.CH[0] );
  1416. for(i = 0xb6 ; i >= 0xb4 ; i-- )
  1417. {
  1418. OPNWriteReg(i ,0xc0);
  1419. OPNWriteReg(i|0x100,0xc0);
  1420. ym2612.REGS[i ] = 0xc0;
  1421. ym2612.REGS[i|0x100] = 0xc0;
  1422. }
  1423. for(i = 0xb2 ; i >= 0x30 ; i-- )
  1424. {
  1425. OPNWriteReg(i ,0);
  1426. OPNWriteReg(i|0x100,0);
  1427. }
  1428. for(i = 0x26 ; i >= 0x20 ; i-- ) OPNWriteReg(i,0);
  1429. /* DAC mode clear */
  1430. ym2612.dacen = 0;
  1431. ym2612.addr_A1 = 0;
  1432. }
  1433. /* YM2612 write */
  1434. /* a = address */
  1435. /* v = value */
  1436. /* returns 1 if sample affecting state changed */
  1437. int YM2612Write_(unsigned int a, unsigned int v)
  1438. {
  1439. int addr, ret=1;
  1440. v &= 0xff; /* adjust to 8 bit bus */
  1441. switch( a&3){
  1442. case 0: /* address port 0 */
  1443. ym2612.OPN.ST.address = v;
  1444. ym2612.addr_A1 = 0;
  1445. ret=0;
  1446. break;
  1447. case 1: /* data port 0 */
  1448. if (ym2612.addr_A1 != 0) {
  1449. ret=0;
  1450. break; /* verified on real YM2608 */
  1451. }
  1452. addr = ym2612.OPN.ST.address;
  1453. switch( addr & 0xf0 )
  1454. {
  1455. case 0x20: /* 0x20-0x2f Mode */
  1456. switch( addr )
  1457. {
  1458. case 0x22: /* LFO FREQ (YM2608/YM2610/YM2610B/YM2612) */
  1459. if (v&0x08) /* LFO enabled ? */
  1460. {
  1461. ym2612.OPN.lfo_inc = ym2612.OPN.lfo_freq[v&7];
  1462. }
  1463. else
  1464. {
  1465. ym2612.OPN.lfo_inc = 0;
  1466. }
  1467. break;
  1468. #if 0 // handled elsewhere
  1469. case 0x24: { // timer A High 8
  1470. int TAnew = (ym2612.OPN.ST.TA & 0x03)|(((int)v)<<2);
  1471. if(ym2612.OPN.ST.TA != TAnew) {
  1472. // we should reset ticker only if new value is written. Outrun requires this.
  1473. ym2612.OPN.ST.TA = TAnew;
  1474. ym2612.OPN.ST.TAC = (1024-TAnew)*18;
  1475. ym2612.OPN.ST.TAT = 0;
  1476. }
  1477. }
  1478. ret=0;
  1479. break;
  1480. case 0x25: { // timer A Low 2
  1481. int TAnew = (ym2612.OPN.ST.TA & 0x3fc)|(v&3);
  1482. if(ym2612.OPN.ST.TA != TAnew) {
  1483. ym2612.OPN.ST.TA = TAnew;
  1484. ym2612.OPN.ST.TAC = (1024-TAnew)*18;
  1485. ym2612.OPN.ST.TAT = 0;
  1486. }
  1487. }
  1488. ret=0;
  1489. break;
  1490. case 0x26: // timer B
  1491. if(ym2612.OPN.ST.TB != v) {
  1492. ym2612.OPN.ST.TB = v;
  1493. ym2612.OPN.ST.TBC = (256-v)<<4;
  1494. ym2612.OPN.ST.TBC *= 18;
  1495. ym2612.OPN.ST.TBT = 0;
  1496. }
  1497. ret=0;
  1498. break;
  1499. #endif
  1500. case 0x27: /* mode, timer control */
  1501. set_timers( v );
  1502. ret=0;
  1503. break;
  1504. case 0x28: /* key on / off */
  1505. {
  1506. UINT8 c;
  1507. c = v & 0x03;
  1508. if( c == 3 ) { ret=0; break; }
  1509. if( v&0x04 ) c+=3;
  1510. if(v&0x10) FM_KEYON(c,SLOT1); else FM_KEYOFF(c,SLOT1);
  1511. if(v&0x20) FM_KEYON(c,SLOT2); else FM_KEYOFF(c,SLOT2);
  1512. if(v&0x40) FM_KEYON(c,SLOT3); else FM_KEYOFF(c,SLOT3);
  1513. if(v&0x80) FM_KEYON(c,SLOT4); else FM_KEYOFF(c,SLOT4);
  1514. break;
  1515. }
  1516. case 0x2a: /* DAC data (YM2612) */
  1517. ym2612.dacout = ((int)v - 0x80) << 6; /* level unknown (notaz: 8 seems to be too much) */
  1518. ret=0;
  1519. break;
  1520. case 0x2b: /* DAC Sel (YM2612) */
  1521. /* b7 = dac enable */
  1522. ym2612.dacen = v & 0x80;
  1523. ret=0;
  1524. break;
  1525. default:
  1526. break;
  1527. }
  1528. break;
  1529. default: /* 0x30-0xff OPN section */
  1530. /* write register */
  1531. ret = OPNWriteReg(addr,v);
  1532. }
  1533. break;
  1534. case 2: /* address port 1 */
  1535. ym2612.OPN.ST.address = v;
  1536. ym2612.addr_A1 = 1;
  1537. ret=0;
  1538. break;
  1539. case 3: /* data port 1 */
  1540. if (ym2612.addr_A1 != 1) {
  1541. ret=0;
  1542. break; /* verified on real YM2608 */
  1543. }
  1544. addr = ym2612.OPN.ST.address | 0x100;
  1545. ret = OPNWriteReg(addr, v);
  1546. break;
  1547. }
  1548. return ret;
  1549. }
  1550. #if 0
  1551. UINT8 YM2612Read_(void)
  1552. {
  1553. return ym2612.OPN.ST.status;
  1554. }
  1555. int YM2612PicoTick_(int n)
  1556. {
  1557. int ret = 0;
  1558. // timer A
  1559. if(ym2612.OPN.ST.mode & 0x01 && (ym2612.OPN.ST.TAT+=64*n) >= ym2612.OPN.ST.TAC) {
  1560. ym2612.OPN.ST.TAT -= ym2612.OPN.ST.TAC;
  1561. if(ym2612.OPN.ST.mode & 0x04) ym2612.OPN.ST.status |= 1;
  1562. // CSM mode total level latch and auto key on
  1563. if(ym2612.OPN.ST.mode & 0x80) {
  1564. CSMKeyControll( &(ym2612.CH[2]) ); // Vectorman2, etc.
  1565. ret = 1;
  1566. }
  1567. }
  1568. // timer B
  1569. if(ym2612.OPN.ST.mode & 0x02 && (ym2612.OPN.ST.TBT+=64*n) >= ym2612.OPN.ST.TBC) {
  1570. ym2612.OPN.ST.TBT -= ym2612.OPN.ST.TBC;
  1571. if(ym2612.OPN.ST.mode & 0x08) ym2612.OPN.ST.status |= 2;
  1572. }
  1573. return ret;
  1574. }
  1575. #endif
  1576. void YM2612PicoStateLoad_(void)
  1577. {
  1578. reset_channels( &ym2612.CH[0] );
  1579. ym2612.slot_mask = 0xffffff;
  1580. }
  1581. /* rather stupid design because I wanted to fit in unused register "space" */
  1582. typedef struct
  1583. {
  1584. UINT32 state_phase;
  1585. INT16 volume;
  1586. } ym_save_addon_slot;
  1587. typedef struct
  1588. {
  1589. UINT32 magic;
  1590. UINT8 address;
  1591. UINT8 status;
  1592. UINT8 addr_A1;
  1593. UINT8 unused;
  1594. int TAT;
  1595. int TBT;
  1596. UINT32 eg_cnt; // 10
  1597. UINT32 eg_timer;
  1598. UINT32 lfo_cnt;
  1599. UINT16 lfo_ampm;
  1600. UINT16 unused2;
  1601. UINT32 keyon_field; // 20
  1602. UINT32 kcode_fc_sl3_3;
  1603. UINT32 reserved[2];
  1604. } ym_save_addon;
  1605. typedef struct
  1606. {
  1607. UINT16 block_fnum[6];
  1608. UINT16 block_fnum_sl3[3];
  1609. UINT16 reserved[7];
  1610. } ym_save_addon2;
  1611. void YM2612PicoStateSave2(int tat, int tbt)
  1612. {
  1613. ym_save_addon_slot ss;
  1614. ym_save_addon2 sa2;
  1615. ym_save_addon sa;
  1616. unsigned char *ptr;
  1617. int c, s;
  1618. memset(&sa, 0, sizeof(sa));
  1619. memset(&sa2, 0, sizeof(sa2));
  1620. // chans 1,2,3
  1621. ptr = &ym2612.REGS[0x0b8];
  1622. for (c = 0; c < 3; c++)
  1623. {
  1624. for (s = 0; s < 4; s++) {
  1625. ss.state_phase = (ym2612.CH[c].SLOT[s].state << 29) | (ym2612.CH[c].SLOT[s].phase >> 3);
  1626. ss.volume = ym2612.CH[c].SLOT[s].volume;
  1627. if (ym2612.CH[c].SLOT[s].key)
  1628. sa.keyon_field |= 1 << (c*4 + s);
  1629. memcpy(ptr, &ss, 6);
  1630. ptr += 6;
  1631. }
  1632. sa2.block_fnum[c] = ym2612.CH[c].block_fnum;
  1633. }
  1634. // chans 4,5,6
  1635. ptr = &ym2612.REGS[0x1b8];
  1636. for (; c < 6; c++)
  1637. {
  1638. for (s = 0; s < 4; s++) {
  1639. ss.state_phase = (ym2612.CH[c].SLOT[s].state << 29) | (ym2612.CH[c].SLOT[s].phase >> 3);
  1640. ss.volume = ym2612.CH[c].SLOT[s].volume;
  1641. if (ym2612.CH[c].SLOT[s].key)
  1642. sa.keyon_field |= 1 << (c*4 + s);
  1643. memcpy(ptr, &ss, 6);
  1644. ptr += 6;
  1645. }
  1646. sa2.block_fnum[c] = ym2612.CH[c].block_fnum;
  1647. }
  1648. for (c = 0; c < 3; c++)
  1649. {
  1650. sa2.block_fnum_sl3[c] = ym2612.OPN.SL3.block_fnum[c];
  1651. }
  1652. memcpy(&ym2612.REGS[0], &sa2, sizeof(sa2)); // 0x20 max
  1653. // other things
  1654. ptr = &ym2612.REGS[0x100];
  1655. sa.magic = 0x41534d59; // 'YMSA'
  1656. sa.address = ym2612.OPN.ST.address;
  1657. sa.status = ym2612.OPN.ST.status;
  1658. sa.addr_A1 = ym2612.addr_A1;
  1659. sa.TAT = tat;
  1660. sa.TBT = tbt;
  1661. sa.eg_cnt = ym2612.OPN.eg_cnt;
  1662. sa.eg_timer = ym2612.OPN.eg_timer;
  1663. sa.lfo_cnt = ym2612.OPN.lfo_cnt;
  1664. sa.lfo_ampm = g_lfo_ampm;
  1665. memcpy(ptr, &sa, sizeof(sa)); // 0x30 max
  1666. }
  1667. int YM2612PicoStateLoad2(int *tat, int *tbt)
  1668. {
  1669. ym_save_addon_slot ss;
  1670. ym_save_addon2 sa2;
  1671. ym_save_addon sa;
  1672. unsigned char *ptr;
  1673. UINT32 fn;
  1674. UINT8 blk;
  1675. int c, s;
  1676. ptr = &ym2612.REGS[0x100];
  1677. memcpy(&sa, ptr, sizeof(sa)); // 0x30 max
  1678. if (sa.magic != 0x41534d59) return -1;
  1679. ptr = &ym2612.REGS[0];
  1680. memcpy(&sa2, ptr, sizeof(sa2));
  1681. ym2612.OPN.ST.address = sa.address;
  1682. ym2612.OPN.ST.status = sa.status;
  1683. ym2612.addr_A1 = sa.addr_A1;
  1684. ym2612.OPN.eg_cnt = sa.eg_cnt;
  1685. ym2612.OPN.eg_timer = sa.eg_timer;
  1686. ym2612.OPN.lfo_cnt = sa.lfo_cnt;
  1687. g_lfo_ampm = sa.lfo_ampm;
  1688. if (tat != NULL) *tat = sa.TAT;
  1689. if (tbt != NULL) *tbt = sa.TBT;
  1690. // chans 1,2,3
  1691. ptr = &ym2612.REGS[0x0b8];
  1692. for (c = 0; c < 3; c++)
  1693. {
  1694. for (s = 0; s < 4; s++) {
  1695. memcpy(&ss, ptr, 6);
  1696. ym2612.CH[c].SLOT[s].state = ss.state_phase >> 29;
  1697. ym2612.CH[c].SLOT[s].phase = ss.state_phase << 3;
  1698. ym2612.CH[c].SLOT[s].volume = ss.volume;
  1699. ym2612.CH[c].SLOT[s].key = (sa.keyon_field & (1 << (c*4 + s))) ? 1 : 0;
  1700. ym2612.CH[c].SLOT[s].ksr = (UINT8)-1;
  1701. ptr += 6;
  1702. }
  1703. ym2612.CH[c].SLOT[SLOT1].Incr=-1;
  1704. ym2612.CH[c].block_fnum = sa2.block_fnum[c];
  1705. fn = ym2612.CH[c].block_fnum & 0x7ff;
  1706. blk = ym2612.CH[c].block_fnum >> 11;
  1707. ym2612.CH[c].kcode= (blk<<2) | opn_fktable[fn >> 7];
  1708. ym2612.CH[c].fc = fn_table[fn*2]>>(7-blk);
  1709. }
  1710. // chans 4,5,6
  1711. ptr = &ym2612.REGS[0x1b8];
  1712. for (; c < 6; c++)
  1713. {
  1714. for (s = 0; s < 4; s++) {
  1715. memcpy(&ss, ptr, 6);
  1716. ym2612.CH[c].SLOT[s].state = ss.state_phase >> 29;
  1717. ym2612.CH[c].SLOT[s].phase = ss.state_phase << 3;
  1718. ym2612.CH[c].SLOT[s].volume = ss.volume;
  1719. ym2612.CH[c].SLOT[s].key = (sa.keyon_field & (1 << (c*4 + s))) ? 1 : 0;
  1720. ym2612.CH[c].SLOT[s].ksr = (UINT8)-1;
  1721. ptr += 6;
  1722. }
  1723. ym2612.CH[c].SLOT[SLOT1].Incr=-1;
  1724. ym2612.CH[c].block_fnum = sa2.block_fnum[c];
  1725. fn = ym2612.CH[c].block_fnum & 0x7ff;
  1726. blk = ym2612.CH[c].block_fnum >> 11;
  1727. ym2612.CH[c].kcode= (blk<<2) | opn_fktable[fn >> 7];
  1728. ym2612.CH[c].fc = fn_table[fn*2]>>(7-blk);
  1729. }
  1730. for (c = 0; c < 3; c++)
  1731. {
  1732. ym2612.OPN.SL3.block_fnum[c] = sa2.block_fnum_sl3[c];
  1733. fn = ym2612.OPN.SL3.block_fnum[c] & 0x7ff;
  1734. blk = ym2612.OPN.SL3.block_fnum[c] >> 11;
  1735. ym2612.OPN.SL3.kcode[c]= (blk<<2) | opn_fktable[fn >> 7];
  1736. ym2612.OPN.SL3.fc[c] = fn_table[fn*2]>>(7-blk);
  1737. }
  1738. return 0;
  1739. }
  1740. void *YM2612GetRegs(void)
  1741. {
  1742. return ym2612.REGS;
  1743. }