sms.c 22 KB

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  1. /*
  2. * SMS emulation
  3. * (C) notaz, 2009-2010
  4. * (C) kub, 2021
  5. *
  6. * This work is licensed under the terms of MAME license.
  7. * See COPYING file in the top-level directory.
  8. */
  9. /*
  10. * TODO:
  11. * - start in a state as if BIOS ran (partly done for VDP registers, RAM)
  12. * - region support (currently only very limited PAL and Mark-III support)
  13. * - mapper for EEPROM support
  14. */
  15. #include "pico_int.h"
  16. #include "memory.h"
  17. #include "sound/sn76496.h"
  18. #include "sound/emu2413/emu2413.h"
  19. extern void YM2413_regWrite(unsigned reg);
  20. extern void YM2413_dataWrite(unsigned data);
  21. extern unsigned sprites_status; // TODO put in some hdr file!
  22. static unsigned char vdp_data_read(void)
  23. {
  24. struct PicoVideo *pv = &Pico.video;
  25. unsigned char d;
  26. d = Pico.ms.vdp_buffer;
  27. Pico.ms.vdp_buffer = PicoMem.vramb[MEM_LE2(pv->addr)];
  28. pv->addr = (pv->addr + 1) & 0x3fff;
  29. pv->pending = 0;
  30. return d;
  31. }
  32. static unsigned char vdp_ctl_read(void)
  33. {
  34. struct PicoVideo *pv = &Pico.video;
  35. unsigned char d;
  36. z80_int_assert(0);
  37. d = pv->status | (pv->pending_ints << 7);
  38. pv->pending = pv->pending_ints = 0;
  39. pv->status = 0;
  40. if (pv->reg[0] & 0x04)
  41. d |= 0x1f; // unused bits in mode 4 read as 1
  42. elprintf(EL_SR, "VDP sr: %02x", d);
  43. return d;
  44. }
  45. static void vdp_data_write(unsigned char d)
  46. {
  47. struct PicoVideo *pv = &Pico.video;
  48. if (pv->type == 3) {
  49. // cram. 32 on SMS, but 64 on MD. Fill 2nd half of cram for prio bit mirror
  50. if (Pico.m.hardware & 0x1) { // GG, same layout as MD
  51. unsigned a = pv->addr & 0x3f;
  52. if (a & 0x1) { // write complete color on high byte write
  53. u16 c = ((d&0x0f) << 8) | Pico.ms.vdp_buffer;
  54. if (PicoMem.cram[a >> 1] != c) Pico.m.dirtyPal = 1;
  55. PicoMem.cram[a >> 1] = PicoMem.cram[(a >> 1)+0x20] = c;
  56. }
  57. } else { // SMS, convert to MD layout (00BbGgRr to 0000BbBbGgGgRrRr)
  58. unsigned a = pv->addr & 0x1f;
  59. u16 c = ((d&0x30)<<6) + ((d&0x0c)<<4) + ((d&0x03)<<2);
  60. if (PicoMem.cram[a] != (c | (c>>2))) Pico.m.dirtyPal = 1;
  61. PicoMem.cram[a] = PicoMem.cram[a+0x20] = c | (c>>2);
  62. }
  63. } else {
  64. PicoMem.vramb[MEM_LE2(pv->addr)] = d;
  65. }
  66. pv->addr = (pv->addr + 1) & 0x3fff;
  67. Pico.ms.vdp_buffer = d;
  68. pv->pending = 0;
  69. }
  70. static NOINLINE void vdp_reg_write(struct PicoVideo *pv, u8 a, u8 d)
  71. {
  72. int l;
  73. pv->reg[a] = d;
  74. switch (a) {
  75. case 0:
  76. l = pv->pending_ints & (d >> 3) & 2;
  77. elprintf(EL_INTS, "hint %d", l);
  78. z80_int_assert(l);
  79. break;
  80. case 1:
  81. l = pv->pending_ints & (d >> 5) & 1;
  82. elprintf(EL_INTS, "vint %d", l);
  83. z80_int_assert(l);
  84. break;
  85. }
  86. }
  87. static void vdp_ctl_write(u8 d)
  88. {
  89. struct PicoVideo *pv = &Pico.video;
  90. if (pv->pending) {
  91. pv->type = d >> 6;
  92. if (pv->type == 2) {
  93. elprintf(EL_IO, " VDP r%02x=%02x", d & 0x0f, pv->addr & 0xff);
  94. if (pv->reg[d & 0x0f] != (u8)pv->addr)
  95. vdp_reg_write(pv, d & 0x0f, pv->addr);
  96. }
  97. pv->addr &= 0x00ff;
  98. pv->addr |= (d & 0x3f) << 8;
  99. if (pv->type == 0) {
  100. Pico.ms.vdp_buffer = PicoMem.vramb[MEM_LE2(pv->addr)];
  101. pv->addr = (pv->addr + 1) & 0x3fff;
  102. }
  103. } else {
  104. pv->addr &= 0x3f00;
  105. pv->addr |= d;
  106. }
  107. pv->pending ^= 1;
  108. }
  109. static u8 vdp_hcounter(int cycles)
  110. {
  111. // 171 slots per scanline of 228 clocks, counted 0xf4-0x93, 0xe9-0xf3
  112. // this matches h counter tables in SMSVDPTest:
  113. // hc = (cycles+2) * 171 /228 -1 + 0xf4;
  114. int hc = (((cycles+2) * ((171<<8)/228))>>8)-1 + 0xf4; // Q8 to avoid dividing
  115. if (hc > 0x193) hc += 0xe9-0x93-1;
  116. return hc;
  117. }
  118. static unsigned char z80_sms_in(unsigned short a)
  119. {
  120. unsigned char d = 0xff;
  121. a &= 0xff;
  122. elprintf(EL_IO, "z80 port %04x read", a);
  123. if(a >= 0xf0){
  124. if (PicoIn.opt & POPT_EN_YM2413){
  125. switch(a)
  126. {
  127. case 0xf0:
  128. // FM reg port
  129. break;
  130. case 0xf1:
  131. // FM data port
  132. break;
  133. case 0xf2:
  134. // bit 0 = 1 active FM Pac
  135. d = 0xf8 | Pico.ms.fm_ctl;
  136. break;
  137. }
  138. }
  139. }
  140. else{
  141. switch (a & 0xc1)
  142. {
  143. case 0x00:
  144. case 0x01:
  145. if ((Pico.m.hardware & 0x1) && a < 0x8) { // GG I/O area
  146. switch (a) {
  147. case 0: d = 0xff & ~(PicoIn.pad[0] & 0x80); break;
  148. case 1: d = Pico.ms.io_gg[1] | (Pico.ms.io_gg[2] & 0x7f); break;
  149. case 5: d = Pico.ms.io_gg[5] & 0xf8; break;
  150. default: d = Pico.ms.io_gg[a]; break;
  151. }
  152. }
  153. break;
  154. case 0x40: /* V counter */
  155. d = Pico.video.v_counter;
  156. elprintf(EL_HVCNT, "V counter read: %02x", d);
  157. break;
  158. case 0x41: /* H counter */
  159. d = Pico.ms.vdp_hlatch;
  160. elprintf(EL_HVCNT, "H counter read: %02x", d);
  161. break;
  162. case 0x80:
  163. d = vdp_data_read();
  164. break;
  165. case 0x81:
  166. d = vdp_ctl_read();
  167. break;
  168. case 0xc0: /* I/O port A and B */
  169. d = ~((PicoIn.pad[0] & 0x3f) | (PicoIn.pad[1] << 6));
  170. break;
  171. case 0xc1: /* I/O port B and miscellaneous */
  172. d = (Pico.ms.io_ctl & 0x80) | ((Pico.ms.io_ctl << 1) & 0x40) | 0x30;
  173. d |= ~(PicoIn.pad[1] >> 2) & 0x0f;
  174. if (Pico.ms.io_ctl & 0x08) d |= 0x80; // TH as input is unconnected
  175. if (Pico.ms.io_ctl & 0x02) d |= 0x40;
  176. break;
  177. }
  178. }
  179. elprintf(EL_IO, "ret = %02x", d);
  180. return d;
  181. }
  182. static void z80_sms_out(unsigned short a, unsigned char d)
  183. {
  184. elprintf(EL_IO, "z80 port %04x write %02x", a, d);
  185. a &= 0xff;
  186. if(a >= 0xf0){
  187. if (PicoIn.opt & POPT_EN_YM2413){
  188. switch(a)
  189. {
  190. case 0xf0:
  191. // FM reg port
  192. YM2413_regWrite(d);
  193. break;
  194. case 0xf1:
  195. // FM data port
  196. YM2413_dataWrite(d);
  197. break;
  198. case 0xf2:
  199. // bit 0 = 1 active FM Pac
  200. Pico.ms.fm_ctl = d & 0x1;
  201. break;
  202. }
  203. }
  204. }
  205. else{
  206. switch (a & 0xc1)
  207. {
  208. case 0x00:
  209. if ((Pico.m.hardware & 0x1) && a < 0x8) // GG I/O area
  210. Pico.ms.io_gg[a] = d;
  211. break;
  212. case 0x01:
  213. if ((Pico.m.hardware & 0x1) && a < 0x8) { // GG I/O area
  214. Pico.ms.io_gg[a] = d;
  215. } else {
  216. // pad. latch hcounter if one of the TH lines is switched to 1
  217. if ((Pico.ms.io_ctl ^ d) & d & 0xa0)
  218. Pico.ms.vdp_hlatch = vdp_hcounter(z80_cyclesDone() - Pico.t.z80c_line_start);
  219. Pico.ms.io_ctl = d;
  220. }
  221. break;
  222. case 0x40:
  223. case 0x41:
  224. PsndDoPSG(z80_cyclesDone());
  225. SN76496Write(d);
  226. break;
  227. case 0x80:
  228. vdp_data_write(d);
  229. break;
  230. case 0x81:
  231. vdp_ctl_write(d);
  232. break;
  233. }
  234. }
  235. }
  236. static void z80_exec(int aim)
  237. {
  238. Pico.t.z80c_aim = aim;
  239. Pico.t.z80c_cnt += z80_run(Pico.t.z80c_aim - Pico.t.z80c_cnt);
  240. }
  241. // ROM/SRAM bank mapping, see https://www.smspower.org/Development/Mappers
  242. static int bank_mask;
  243. static void xwrite(unsigned int a, unsigned char d);
  244. // Sega mapper. Maps 3 banks 16KB each, with SRAM support
  245. static void write_sram_sega(unsigned short a, unsigned char d)
  246. {
  247. // SRAM is mapped in 2 16KB banks, selected by bit 2 in control reg
  248. a &= 0x3fff;
  249. a += ((Pico.ms.carthw[0x0c] & 0x04) >> 2) * 0x4000;
  250. Pico.sv.changed |= (Pico.sv.data[a] != d);
  251. Pico.sv.data[a] = d;
  252. }
  253. static void write_bank_sega(unsigned short a, unsigned char d)
  254. {
  255. if (a < 0xfff8) return;
  256. // avoid mapper detection for RAM fill with 0
  257. if (Pico.ms.mapper != PMS_MAP_SEGA && (Pico.ms.mapper || d == 0)) return;
  258. elprintf(EL_Z80BNK, "bank sega %04x %02x @ %04x", a, d, z80_pc());
  259. Pico.ms.mapper = PMS_MAP_SEGA;
  260. Pico.ms.carthw[a & 0x0f] = d;
  261. switch (a & 0x0f)
  262. {
  263. case 0x0d:
  264. d &= bank_mask;
  265. z80_map_set(z80_read_map, 0x0400, 0x3fff, Pico.rom+0x400 + (d << 14), 0);
  266. break;
  267. case 0x0e:
  268. d &= bank_mask;
  269. z80_map_set(z80_read_map, 0x4000, 0x7fff, Pico.rom + (d << 14), 0);
  270. break;
  271. case 0x0c:
  272. if (d & ~0x8c)
  273. elprintf(EL_STATUS|EL_ANOMALY, "%02x written to control reg!", d);
  274. /*FALLTHROUGH*/
  275. case 0x0f:
  276. if (Pico.ms.carthw[0xc] & 0x08) {
  277. d = (Pico.ms.carthw[0xc] & 0x04) >> 2;
  278. z80_map_set(z80_read_map, 0x8000, 0xbfff, Pico.sv.data + d*0x4000, 0);
  279. z80_map_set(z80_write_map, 0x8000, 0xbfff, write_sram_sega, 1);
  280. } else {
  281. d = Pico.ms.carthw[0xf] & bank_mask;
  282. z80_map_set(z80_read_map, 0x8000, 0xbfff, Pico.rom + (d << 14), 0);
  283. z80_map_set(z80_write_map, 0x8000, 0xbfff, xwrite, 1);
  284. }
  285. break;
  286. }
  287. }
  288. // Codemasters mapper. Similar to Sega, but different addresses, TODO: SRAM
  289. static void write_bank_codem(unsigned short a, unsigned char d)
  290. {
  291. if (a >= 0xc000 || (a & 0x3fff)) return; // address is 0x0000, 0x4000, 0x8000?
  292. // don't detect linear mapping to avoid confusing with MSX
  293. if (Pico.ms.mapper != PMS_MAP_CODEM && (Pico.ms.mapper || (a>>14) == d)) return;
  294. elprintf(EL_Z80BNK, "bank codem %04x %02x @ %04x", a, d, z80_pc());
  295. Pico.ms.mapper = PMS_MAP_CODEM;
  296. Pico.ms.carthw[a>>14] = d;
  297. d &= bank_mask;
  298. z80_map_set(z80_read_map, a, a+0x3fff, Pico.rom + (d << 14), 0);
  299. }
  300. // MSX mapper. 4 selectable 8KB banks at the top
  301. static void write_bank_msx(unsigned short a, unsigned char d)
  302. {
  303. if (a > 0x0003) return;
  304. // don't detect linear mapping to avoid confusing with Codemasters
  305. if (Pico.ms.mapper != PMS_MAP_MSX && (Pico.ms.mapper || (a|d) == 0)) return;
  306. elprintf(EL_Z80BNK, "bank msx %04x %02x @ %04x", a, d, z80_pc());
  307. Pico.ms.mapper = PMS_MAP_MSX;
  308. Pico.ms.carthw[a] = d;
  309. a = (a^2)*0x2000 + 0x4000;
  310. d &= 2*bank_mask + 1;
  311. z80_map_set(z80_read_map, a, a+0x1fff, Pico.rom + (d << 13), 0);
  312. }
  313. // Korea mapping, 1 selectable 16KB bank at the top
  314. static void write_bank_korea(unsigned short a, unsigned char d)
  315. {
  316. if (a != 0xa000) return;
  317. if (Pico.ms.mapper != PMS_MAP_KOREA && (Pico.ms.mapper)) return;
  318. elprintf(EL_Z80BNK, "bank korea %04x %02x @ %04x", a, d, z80_pc());
  319. Pico.ms.mapper = PMS_MAP_KOREA;
  320. Pico.ms.carthw[0xf] = d;
  321. d &= bank_mask;
  322. z80_map_set(z80_read_map, 0x8000, 0xbfff, Pico.rom + (d << 14), 0);
  323. }
  324. // Korean n-in-1 mapping. 1 selectable 32KB bank at the bottom
  325. static void write_bank_n32k(unsigned short a, unsigned char d)
  326. {
  327. if (a != 0xffff) return;
  328. // code must be in RAM since all visible ROM space is swapped
  329. if (Pico.ms.mapper != PMS_MAP_N32K && (Pico.ms.mapper || z80_pc() < 0xc000)) return;
  330. elprintf(EL_Z80BNK, "bank 32k %04x %02x @ %04x", a, d, z80_pc());
  331. Pico.ms.mapper = PMS_MAP_N32K;
  332. Pico.ms.carthw[0xf] = d;
  333. d &= bank_mask >> 1;
  334. z80_map_set(z80_read_map, 0, 0x7fff, Pico.rom + (d << 15), 0);
  335. }
  336. // Korean 4-in-1. 2 selectable 16KB banks, top bank is shifted by bottom one
  337. static void write_bank_n16k(unsigned short a, unsigned char d)
  338. {
  339. if (a != 0x3ffe && a != 0x7fff && a != 0xbfff) return;
  340. // code must be in RAM since all visible ROM space is swapped
  341. if (Pico.ms.mapper != PMS_MAP_N16K && (Pico.ms.mapper || z80_pc() < 0xc000)) return;
  342. elprintf(EL_Z80BNK, "bank 16k %04x %02x @ %04x", a, d, z80_pc());
  343. Pico.ms.mapper = PMS_MAP_N16K;
  344. Pico.ms.carthw[a>>14] = d;
  345. d &= bank_mask;
  346. a = a & 0xc000;
  347. // the top bank shifts with the bottom bank.
  348. if (a == 0x8000) d += Pico.ms.carthw[0] & 0x30;
  349. z80_map_set(z80_read_map, a, a+0x3fff, Pico.rom + (d << 14), 0);
  350. }
  351. // MSX-Nemesis mapper. 4 selectable 8KB banks at the top
  352. static void write_bank_msxn(unsigned short a, unsigned char d)
  353. {
  354. if (a > 0x0003) return;
  355. // never autodetected, selectable only via config
  356. if (Pico.ms.mapper != PMS_MAP_NEMESIS) return;
  357. elprintf(EL_Z80BNK, "bank nems %04x %02x @ %04x", a, d, z80_pc());
  358. Pico.ms.carthw[a] = d;
  359. a = (a^2)*0x2000 + 0x4000;
  360. d &= 2*bank_mask + 1;
  361. z80_map_set(z80_read_map, a, a+0x1fff, Pico.rom + (d << 13), 0);
  362. }
  363. // Korean Janggun mapper. 4 selectable 8KB banks at the top, hardware byte flip
  364. static unsigned char read_flipped_jang(unsigned a)
  365. {
  366. static unsigned char flipper[16] = // reversed nibble bit order
  367. { 0x0,0x8,0x4,0xc,0x2,0xa,0x6,0xe,0x1,0x9,0x5,0xd,0x3,0xb,0x7,0xf };
  368. unsigned char c;
  369. // return value at address a in reversed bit order
  370. c = Pico.rom[(Pico.ms.carthw[a>>13] << 13) + (a & 0x1fff)];
  371. return (flipper[c&0xf]<<4) | flipper[c>>4];
  372. }
  373. static void write_bank_jang(unsigned short a, unsigned char d)
  374. {
  375. // address is 0xfffe, 0xffff, 0x4000, 0x6000, 0x8000, 0xa000
  376. if ((a|1) != 0xffff && (!((a^(a<<1)) & 0x8000) || (a & 0x1fff))) return;
  377. // never autodetected, selectable only via config
  378. if (Pico.ms.mapper != PMS_MAP_JANGGUN) return;
  379. elprintf(EL_Z80BNK, "bank jang %04x %02x @ %04x", a, d, z80_pc());
  380. if ((a|1) == 0xffff) {
  381. int x = a & 1, f = d & 0x40;
  382. Pico.ms.carthw[x] = d;
  383. d &= bank_mask;
  384. Pico.ms.carthw[2*x + 2] = 2*d, Pico.ms.carthw[2*x + 3] = 2*d+1;
  385. a = (x+1) * 0x4000;
  386. if (!f)
  387. z80_map_set(z80_read_map, a, a+0x3fff, Pico.rom + (d << 14), 0);
  388. else
  389. z80_map_set(z80_read_map, a, a+0x3fff, read_flipped_jang, 1);
  390. } else {
  391. d &= 2*bank_mask + 1;
  392. Pico.ms.carthw[a>>13] = d;
  393. if (!(Pico.ms.carthw[(a>>15)&1] & 0x40))
  394. z80_map_set(z80_read_map, a, a+0x1fff, Pico.rom + (d << 13), 0);
  395. else
  396. z80_map_set(z80_read_map, a, a+0x1fff, read_flipped_jang, 1);
  397. }
  398. }
  399. // TODO auto-selecting is not really reliable.
  400. // Before adding more mappers this should be revised.
  401. static void xwrite(unsigned int a, unsigned char d)
  402. {
  403. elprintf(EL_IO, "z80 write [%04x] %02x", a, d);
  404. if (a >= 0xc000)
  405. PicoMem.zram[a & 0x1fff] = d;
  406. switch (Pico.ms.mapper) { // via config, or auto detected
  407. case PMS_MAP_SEGA: write_bank_sega(a, d); break;
  408. case PMS_MAP_CODEM: write_bank_codem(a, d); break;
  409. case PMS_MAP_MSX: write_bank_msx(a, d); break;
  410. case PMS_MAP_KOREA: write_bank_korea(a, d); break;
  411. case PMS_MAP_N32K: write_bank_n32k(a, d); break;
  412. case PMS_MAP_N16K: write_bank_n16k(a, d); break;
  413. case PMS_MAP_JANGGUN: write_bank_jang(a, d); break;
  414. case PMS_MAP_NEMESIS: write_bank_msxn(a, d); break;
  415. case PMS_MAP_AUTO:
  416. // NB the sequence of mappers is crucial for the auto detection
  417. write_bank_n32k(a, d);
  418. write_bank_sega(a, d);
  419. write_bank_msx(a, d);
  420. write_bank_codem(a, d);
  421. write_bank_korea(a, d);
  422. write_bank_n16k(a, d);
  423. break;
  424. }
  425. }
  426. // TMR product codes and hardware type for know 50Hz-only games */
  427. static u32 region_pal[] = { // cf. GX+, core/cart_hw/sms_cartc.c
  428. 0x40207067 /* Addams Family */, 0x40207020 /* Back.Future 3 */,
  429. 0x40207058 /* Battlemaniacs */, 0x40007105 /* Cal.Games 2 */,
  430. 0x40207065 /* Dracula */ , 0x40007109 /* Home Alone */,
  431. 0x40009024 /* Pwr.Strike 2 */ , 0x40207047 /* Predator 2 EU */,
  432. 0x40002519 /* Quest.Yak */ , 0x40207064 /* Robocop 3 */,
  433. 0x40205014 /* Sens.Soccer */ , 0x40002573 /* Sonic Blast */,
  434. 0x40007080 /* S.Harrier EU */ , 0x40007038 /* Taito Chase */,
  435. };
  436. void PicoResetMS(void)
  437. {
  438. unsigned tmr;
  439. int id, hw, i;
  440. // set preselected hw/mapper from config
  441. if (PicoIn.hwSelect) {
  442. switch (PicoIn.hwSelect) {
  443. case PHWS_GG: Pico.m.hardware |= 0x1; break;
  444. default: Pico.m.hardware &= ~0x1; break;
  445. }
  446. }
  447. if (PicoIn.mapper)
  448. Pico.ms.mapper = PicoIn.mapper;
  449. Pico.m.hardware |= 0x4; // default region Japan if no TMR header
  450. // check if the ROM header contains more system information
  451. for (tmr = 0x2000; tmr < 0xbfff && tmr <= Pico.romsize; tmr *= 2) {
  452. if (!memcmp(Pico.rom + tmr-16, "TMR SEGA", 8)) {
  453. hw = Pico.rom[tmr-1] >> 4;
  454. if (!PicoIn.hwSelect) {
  455. Pico.m.hardware &= ~0x1;
  456. if (hw >= 0x5 && hw < 0x8)
  457. Pico.m.hardware |= 0x1; // GG cartridge detected
  458. }
  459. if (!PicoIn.regionOverride) {
  460. Pico.m.hardware &= ~0x4;
  461. if (hw == 0x5 || hw == 0x3)
  462. Pico.m.hardware |= 0x4; // region Japan
  463. }
  464. id = CPU_LE4(*(u32 *)&Pico.rom[tmr-4]) & 0xf0f0ffff;
  465. for (i = 0; i < sizeof(region_pal)/sizeof(*region_pal); i++)
  466. if (id == region_pal[i] && !PicoIn.regionOverride) {
  467. Pico.m.pal = 1; // requires 50Hz timing
  468. break;
  469. }
  470. break;
  471. }
  472. }
  473. z80_reset();
  474. PsndReset(); // pal must be known here
  475. Pico.ms.fm_ctl = 0xff;
  476. Pico.m.dirtyPal = 1;
  477. // reset memory mapping
  478. PicoMemSetupMS();
  479. // BIOS, VDP intialisation
  480. Pico.video.reg[0] = 0x36;
  481. Pico.video.reg[1] = 0xa0;
  482. Pico.video.reg[2] = 0xff;
  483. Pico.video.reg[3] = 0xff;
  484. Pico.video.reg[4] = 0xff;
  485. Pico.video.reg[5] = 0xff;
  486. Pico.video.reg[6] = 0xfb;
  487. Pico.video.reg[7] = 0x00;
  488. Pico.video.reg[8] = 0x00;
  489. Pico.video.reg[9] = 0x00;
  490. Pico.video.reg[10] = 0xff;
  491. // BIOS, clear zram (unitialized on Mark-III, cf src/mame/drivers/sms.cpp)
  492. memset(PicoMem.zram, (Pico.m.hardware&5) == 4 ? 0xf0:0, sizeof(PicoMem.zram));
  493. }
  494. void PicoPowerMS(void)
  495. {
  496. int s, tmp;
  497. memset(&PicoMem,0,sizeof(PicoMem));
  498. memset(&Pico.video,0,sizeof(Pico.video));
  499. memset(&Pico.m,0,sizeof(Pico.m));
  500. Pico.m.pal = 0;
  501. // calculate a mask for bank writes.
  502. // ROM loader has aligned the size for us, so this is safe.
  503. s = 0; tmp = Pico.romsize;
  504. while ((tmp >>= 1) != 0)
  505. s++;
  506. if (Pico.romsize > (1 << s))
  507. s++;
  508. tmp = 1 << s;
  509. bank_mask = (tmp - 1) >> 14;
  510. PicoMem.ioports[0] = 0xc3; // hack to jump @0 at end of RAM to wrap around
  511. Pico.ms.mapper = PicoIn.mapper;
  512. PicoReset();
  513. }
  514. void PicoMemSetupMS(void)
  515. {
  516. z80_map_set(z80_read_map, 0x0000, 0xbfff, Pico.rom, 0);
  517. z80_map_set(z80_read_map, 0xc000, 0xdfff, PicoMem.zram, 0);
  518. z80_map_set(z80_read_map, 0xe000, 0xffff, PicoMem.zram, 0);
  519. z80_map_set(z80_write_map, 0x0000, 0xbfff, xwrite, 1);
  520. z80_map_set(z80_write_map, 0xc000, 0xdfff, PicoMem.zram, 0);
  521. z80_map_set(z80_write_map, 0xe000, 0xffff, xwrite, 1);
  522. // Nemesis mapper maps last 8KB rom bank #15 to adress 0
  523. if (Pico.ms.mapper == PMS_MAP_NEMESIS && Pico.romsize > 0x1e000)
  524. z80_map_set(z80_read_map, 0x0000, 0x1fff, Pico.rom + 0x1e000, 0);
  525. #ifdef _USE_DRZ80
  526. drZ80.z80_in = z80_sms_in;
  527. drZ80.z80_out = z80_sms_out;
  528. #endif
  529. #ifdef _USE_CZ80
  530. Cz80_Set_INPort(&CZ80, z80_sms_in);
  531. Cz80_Set_OUTPort(&CZ80, z80_sms_out);
  532. #endif
  533. // memory mapper setup, linear mapping of 1st 48KB
  534. u8 mapper = Pico.ms.mapper;
  535. if (mapper == PMS_MAP_MSX || mapper == PMS_MAP_NEMESIS) {
  536. xwrite(0x0000, 4);
  537. xwrite(0x0001, 5);
  538. xwrite(0x0002, 2);
  539. xwrite(0x0003, 3);
  540. } else if (mapper == PMS_MAP_N32K) {
  541. xwrite(0xffff, 0);
  542. } else if (mapper == PMS_MAP_N16K) {
  543. xwrite(0x3ffe, 0);
  544. xwrite(0x7fff, 1);
  545. xwrite(0xbfff, 2);
  546. } else if (mapper == PMS_MAP_JANGGUN) {
  547. xwrite(0xfffe, 1);
  548. xwrite(0xffff, 2);
  549. } else if (mapper == PMS_MAP_CODEM) {
  550. xwrite(0x0000, 0);
  551. xwrite(0x4000, 1);
  552. xwrite(0x8000, 2);
  553. } else {
  554. xwrite(0xfffc, 0);
  555. xwrite(0xfffd, 0);
  556. xwrite(0xfffe, 1);
  557. xwrite(0xffff, 2);
  558. }
  559. Pico.ms.mapper = mapper;
  560. }
  561. void PicoStateLoadedMS(void)
  562. {
  563. u8 mapper = Pico.ms.mapper;
  564. if (Pico.ms.mapper == PMS_MAP_MSX || Pico.ms.mapper == PMS_MAP_NEMESIS) {
  565. xwrite(0x0000, Pico.ms.carthw[0]);
  566. xwrite(0x0001, Pico.ms.carthw[1]);
  567. xwrite(0x0002, Pico.ms.carthw[2]);
  568. xwrite(0x0003, Pico.ms.carthw[3]);
  569. } else if (Pico.ms.mapper == PMS_MAP_N32K) {
  570. xwrite(0xffff, Pico.ms.carthw[0x0f]);
  571. } else if (Pico.ms.mapper == PMS_MAP_N16K) {
  572. xwrite(0x3ffe, Pico.ms.carthw[0]);
  573. xwrite(0x7fff, Pico.ms.carthw[1]);
  574. xwrite(0xbfff, Pico.ms.carthw[2]);
  575. } else if (Pico.ms.mapper == PMS_MAP_JANGGUN) {
  576. xwrite(0x4000, Pico.ms.carthw[2]);
  577. xwrite(0x6000, Pico.ms.carthw[3]);
  578. xwrite(0x8000, Pico.ms.carthw[4]);
  579. xwrite(0xa000, Pico.ms.carthw[5]);
  580. } else if (Pico.ms.mapper == PMS_MAP_CODEM) {
  581. xwrite(0x0000, Pico.ms.carthw[0]);
  582. xwrite(0x4000, Pico.ms.carthw[1]);
  583. xwrite(0x8000, Pico.ms.carthw[2]);
  584. } else {
  585. xwrite(0xfffc, Pico.ms.carthw[0x0c]);
  586. xwrite(0xfffd, Pico.ms.carthw[0x0d]);
  587. xwrite(0xfffe, Pico.ms.carthw[0x0e]);
  588. xwrite(0xffff, Pico.ms.carthw[0x0f]);
  589. }
  590. Pico.ms.mapper = mapper;
  591. }
  592. void PicoFrameMS(void)
  593. {
  594. struct PicoVideo *pv = &Pico.video;
  595. int is_pal = Pico.m.pal;
  596. int lines = is_pal ? 313 : 262;
  597. int cycles_line = 228;
  598. int skip = PicoIn.skipFrame;
  599. int lines_vis = 192;
  600. int hint; // Hint counter
  601. int nmi;
  602. int y;
  603. z80_resetCycles();
  604. PsndStartFrame();
  605. // for SMS the pause button generates an NMI, for GG ths is not the case
  606. nmi = (PicoIn.pad[0] >> 7) & 1;
  607. if (!(Pico.m.hardware & 0x1) && !Pico.ms.nmi_state && nmi)
  608. z80_nmi();
  609. Pico.ms.nmi_state = nmi;
  610. if ((pv->reg[0] & 6) == 6 && (pv->reg[1] & 0x18))
  611. lines_vis = (pv->reg[1] & 0x08) ? 240 : 224;
  612. PicoFrameStartSMS();
  613. hint = pv->reg[0x0a];
  614. // SMS: xscroll:f3 sprovr,vint, vcount:fc, hint:fd
  615. // GG: xscroll:f5 sprovr,vint:fd vcount:fe, hint:ff
  616. for (y = 0; y < lines; y++)
  617. {
  618. Pico.t.z80c_line_start = Pico.t.z80c_aim;
  619. // advance the line counter. It is set back at some point in the VBLANK so
  620. // that the line count in the active area (-32..lines+1) is contiguous.
  621. pv->v_counter = Pico.m.scanline = (u8)y;
  622. switch (is_pal ? -lines_vis : lines_vis) {
  623. case 192: if (y > 218) pv->v_counter = y - (lines-256); break;
  624. case 224: if (y > 234) pv->v_counter = y - (lines-256); break;
  625. case -192: if (y > 242) pv->v_counter = y - (lines-256); break;
  626. case -224: if (y > 258) pv->v_counter = y - (lines-256); break;
  627. case -240: if (y > 266) pv->v_counter = y - (lines-256); break;
  628. }
  629. // Parse sprites for the next line
  630. if (y < lines_vis)
  631. PicoParseSATSMS(y-1);
  632. else if (y > lines-32)
  633. PicoParseSATSMS(y-1-lines);
  634. // render next line
  635. if (y < lines_vis && !skip)
  636. PicoLineSMS(y);
  637. // take over status bits from previously rendered line TODO: cycle exact?
  638. pv->status |= sprites_status;
  639. sprites_status = 0;
  640. // Interrupt handling. Simulate interrupt flagged and immediately reset in
  641. // same insn by flagging the irq, execute for 1 insn, then checking if the
  642. // irq is still pending. (GG Chicago, SMS Back to the Future III)
  643. pv->pending_ints &= ~2; // lost if not caught in the same line
  644. if (y <= lines_vis)
  645. {
  646. if (--hint < 0)
  647. {
  648. hint = pv->reg[0x0a];
  649. pv->pending_ints |= 2;
  650. z80_exec(Pico.t.z80c_cnt + 1);
  651. if ((pv->reg[0] & 0x10) && (pv->pending_ints & 2)) {
  652. elprintf(EL_INTS, "hint");
  653. z80_int_assert(1);
  654. }
  655. }
  656. }
  657. else if (y == lines_vis + 1) {
  658. pv->pending_ints |= 1;
  659. z80_exec(Pico.t.z80c_cnt + 1);
  660. if ((pv->reg[1] & 0x20) && (pv->pending_ints & 1)) {
  661. elprintf(EL_INTS, "vint");
  662. z80_int_assert(1);
  663. }
  664. }
  665. z80_exec(Pico.t.z80c_line_start + cycles_line);
  666. }
  667. if (PicoIn.sndOut)
  668. PsndGetSamplesMS(lines);
  669. }
  670. void PicoFrameDrawOnlyMS(void)
  671. {
  672. struct PicoVideo *pv = &Pico.video;
  673. int lines_vis = 192;
  674. int y;
  675. if ((pv->reg[0] & 6) == 6 && (pv->reg[1] & 0x18))
  676. lines_vis = (pv->reg[1] & 0x08) ? 240 : 224;
  677. PicoFrameStartSMS();
  678. for (y = 0; y < lines_vis; y++) {
  679. PicoParseSATSMS(y-1);
  680. PicoLineSMS(y);
  681. }
  682. }
  683. // vim:ts=2:sw=2:expandtab