pico_int.h 37 KB

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  1. /*
  2. * PicoDrive - Internal Header File
  3. * (c) Copyright Dave, 2004
  4. * (C) notaz, 2006-2010
  5. *
  6. * This work is licensed under the terms of MAME license.
  7. * See COPYING file in the top-level directory.
  8. */
  9. #ifndef PICO_INTERNAL_INCLUDED
  10. #define PICO_INTERNAL_INCLUDED
  11. #include <stdio.h>
  12. #include <string.h>
  13. #include "pico_types.h"
  14. #include "pico_port.h"
  15. #include "pico.h"
  16. #include "carthw/carthw.h"
  17. //
  18. #define USE_POLL_DETECT
  19. #ifndef PICO_INTERNAL
  20. #define PICO_INTERNAL
  21. #endif
  22. #ifndef PICO_INTERNAL_ASM
  23. #define PICO_INTERNAL_ASM
  24. #endif
  25. // to select core, define EMU_C68K, EMU_M68K or EMU_F68K in your makefile or project
  26. #ifdef __cplusplus
  27. extern "C" {
  28. #endif
  29. // ----------------------- 68000 CPU -----------------------
  30. #ifdef EMU_C68K
  31. #include <cpu/cyclone/Cyclone.h>
  32. extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;
  33. #define SekCyclesLeft PicoCpuCM68k.cycles // cycles left for this run
  34. #define SekCyclesLeftS68k PicoCpuCS68k.cycles
  35. #define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase)
  36. #define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)
  37. #define SekDar(x) (x < 8 ? PicoCpuCM68k.d[x] : PicoCpuCM68k.a[x - 8])
  38. #define SekDarS68k(x) (x < 8 ? PicoCpuCS68k.d[x] : PicoCpuCS68k.a[x - 8])
  39. #define SekSr CycloneGetSr(&PicoCpuCM68k)
  40. #define SekSrS68k CycloneGetSr(&PicoCpuCS68k)
  41. #define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }
  42. #define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }
  43. #define SekIsStoppedM68k() (PicoCpuCM68k.state_flags&1)
  44. #define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1)
  45. #define SekShouldInterrupt() (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))
  46. #define SekNotPolling PicoCpuCM68k.not_pol
  47. #define SekNotPollingS68k PicoCpuCS68k.not_pol
  48. #define SekInterrupt(i) PicoCpuCM68k.irq=i
  49. #define SekIrqLevel PicoCpuCM68k.irq
  50. #endif
  51. #ifdef EMU_F68K
  52. #include <cpu/fame/fame.h>
  53. extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
  54. #define SekCyclesLeft PicoCpuFM68k.io_cycle_counter
  55. #define SekCyclesLeftS68k PicoCpuFS68k.io_cycle_counter
  56. #define SekPc fm68k_get_pc(&PicoCpuFM68k)
  57. #define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)
  58. #define SekDar(x) (x < 8 ? PicoCpuFM68k.dreg[x].D : PicoCpuFM68k.areg[x - 8].D)
  59. #define SekDarS68k(x) (x < 8 ? PicoCpuFS68k.dreg[x].D : PicoCpuFS68k.areg[x - 8].D)
  60. #define SekSr PicoCpuFM68k.sr
  61. #define SekSrS68k PicoCpuFS68k.sr
  62. #define SekSetStop(x) { \
  63. PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \
  64. if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \
  65. }
  66. #define SekSetStopS68k(x) { \
  67. PicoCpuFS68k.execinfo &= ~FM68K_HALTED; \
  68. if (x) { PicoCpuFS68k.execinfo |= FM68K_HALTED; PicoCpuFS68k.io_cycle_counter = 0; } \
  69. }
  70. #define SekIsStoppedM68k() (PicoCpuFM68k.execinfo&FM68K_HALTED)
  71. #define SekIsStoppedS68k() (PicoCpuFS68k.execinfo&FM68K_HALTED)
  72. #define SekShouldInterrupt() fm68k_would_interrupt(&PicoCpuFM68k)
  73. #define SekNotPolling PicoCpuFM68k.not_polling
  74. #define SekNotPollingS68k PicoCpuFS68k.not_polling
  75. #define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq
  76. #define SekIrqLevel PicoCpuFM68k.interrupts[0]
  77. #endif
  78. #ifdef EMU_M68K
  79. #include <cpu/musashi/m68kcpu.h>
  80. extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
  81. #ifndef SekCyclesLeft
  82. #define SekCyclesLeft PicoCpuMM68k.cyc_remaining_cycles
  83. #define SekCyclesLeftS68k PicoCpuMS68k.cyc_remaining_cycles
  84. #define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC)
  85. #define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC)
  86. #define SekDar(x) PicoCpuMM68k.dar[x]
  87. #define SekDarS68k(x) PicoCpuMS68k.dar[x]
  88. #define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR)
  89. #define SekSrS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_SR)
  90. #define SekSetStop(x) { \
  91. if(x) { PicoCpuMM68k.cyc_remaining_cycles = 0; PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \
  92. else PicoCpuMM68k.stopped=0; \
  93. }
  94. #define SekSetStopS68k(x) { \
  95. if(x) { PicoCpuMS68k.cyc_remaining_cycles = 0; PicoCpuMS68k.stopped=STOP_LEVEL_STOP; } \
  96. else PicoCpuMS68k.stopped=0; \
  97. }
  98. #define SekIsStoppedM68k() (PicoCpuMM68k.stopped==STOP_LEVEL_STOP)
  99. #define SekIsStoppedS68k() (PicoCpuMS68k.stopped==STOP_LEVEL_STOP)
  100. #define SekShouldInterrupt() (PicoCpuMM68k.int_level > PicoCpuMM68k.int_mask)
  101. #define SekNotPolling PicoCpuMM68k.not_polling
  102. #define SekNotPollingS68k PicoCpuMS68k.not_polling
  103. // avoid m68k_set_irq() for delaying to work
  104. #define SekInterrupt(irq) PicoCpuMM68k.int_level = (irq) << 8
  105. #define SekIrqLevel (PicoCpuMM68k.int_level >> 8)
  106. #endif
  107. #endif // EMU_M68K
  108. // number of cycles done (can be checked anywhere)
  109. #define SekCyclesDone() (Pico.t.m68c_cnt - SekCyclesLeft)
  110. // burn cycles while not in SekRun() and while in
  111. #define SekCyclesBurn(c) Pico.t.m68c_cnt += c
  112. #define SekCyclesBurnRun(c) SekCyclesLeft -= c
  113. // note: sometimes may extend timeslice to delay an irq
  114. #define SekEndRun(after) { \
  115. Pico.t.m68c_cnt -= SekCyclesLeft - (after); \
  116. SekCyclesLeft = after; \
  117. }
  118. extern unsigned int SekCycleCntS68k;
  119. extern unsigned int SekCycleAimS68k;
  120. #define SekEndRunS68k(after) { \
  121. if (SekCyclesLeftS68k > (after)) { \
  122. SekCycleCntS68k -= SekCyclesLeftS68k - (after); \
  123. SekCyclesLeftS68k = after; \
  124. } \
  125. }
  126. #define SekCyclesDoneS68k() (SekCycleCntS68k - SekCyclesLeftS68k)
  127. // compare cycles, handling overflows
  128. // check if a > b
  129. #define CYCLES_GT(a, b) \
  130. ((int)((a) - (b)) > 0)
  131. // check if a >= b
  132. #define CYCLES_GE(a, b) \
  133. ((int)((a) - (b)) >= 0)
  134. // ----------------------- Z80 CPU -----------------------
  135. #if defined(_USE_DRZ80)
  136. #include <cpu/DrZ80/drz80.h>
  137. extern struct DrZ80 drZ80;
  138. #define z80_run(cycles) ((cycles) - DrZ80Run(&drZ80, cycles))
  139. #define z80_run_nr(cycles) DrZ80Run(&drZ80, cycles)
  140. #define z80_int() drZ80.Z80_IRQ = 1
  141. #define z80_int_assert(a) drZ80.Z80_IRQ = (a)
  142. #define z80_nmi() drZ80.Z80IF |= 8
  143. #define z80_cyclesLeft drZ80.cycles
  144. #define z80_subCLeft(c) drZ80.cycles -= c
  145. #define z80_pc() (drZ80.Z80PC - drZ80.Z80PC_BASE)
  146. #elif defined(_USE_CZ80)
  147. #include <cpu/cz80/cz80.h>
  148. #define z80_run(cycles) Cz80_Exec(&CZ80, cycles)
  149. #define z80_run_nr(cycles) Cz80_Exec(&CZ80, cycles)
  150. #define z80_int() Cz80_Set_IRQ(&CZ80, 0, HOLD_LINE)
  151. #define z80_int_assert(a) Cz80_Set_IRQ(&CZ80, 0, (a) ? ASSERT_LINE : CLEAR_LINE)
  152. #define z80_nmi() Cz80_Set_IRQ(&CZ80, IRQ_LINE_NMI, ASSERT_LINE)
  153. #define z80_cyclesLeft (CZ80.ICount - CZ80.ExtraCycles)
  154. #define z80_subCLeft(c) CZ80.ICount -= c
  155. #define z80_pc() Cz80_Get_Reg(&CZ80, CZ80_PC)
  156. #else
  157. #define z80_run(cycles) (cycles)
  158. #define z80_run_nr(cycles)
  159. #define z80_int()
  160. #define z80_int_assert(a)
  161. #define z80_nmi()
  162. #endif
  163. #define Z80_STATE_SIZE 0x60
  164. #define z80_resetCycles() \
  165. Pico.t.z80c_cnt -= Pico.t.z80c_aim, Pico.t.z80c_aim = Pico.t.z80_scanline = 0
  166. #define z80_cyclesDone() \
  167. (Pico.t.z80c_aim - z80_cyclesLeft)
  168. #define cycles_68k_to_z80(x) ((x) * 3822 >> 13)
  169. // ----------------------- SH2 CPU -----------------------
  170. #include <cpu/sh2/sh2.h>
  171. extern SH2 sh2s[2];
  172. #define msh2 sh2s[0]
  173. #define ssh2 sh2s[1]
  174. #ifndef DRC_SH2
  175. # define sh2_end_run(sh2, after_) do { \
  176. if ((sh2)->icount > (after_)) { \
  177. (sh2)->cycles_timeslice -= (sh2)->icount - (after_); \
  178. (sh2)->icount = after_; \
  179. } \
  180. } while (0)
  181. # define sh2_cycles_left(sh2) (sh2)->icount
  182. # define sh2_burn_cycles(sh2, n) (sh2)->icount -= n
  183. # define sh2_pc(sh2) (sh2)->ppc
  184. # define sh2_not_polling(sh2) (sh2)->no_polling
  185. # define sh2_set_polling(sh2) (sh2)->no_polling = 0
  186. #else
  187. # define sh2_end_run(sh2, after_) do { \
  188. int left_ = ((signed int)(sh2)->sr >> 12) - (after_); \
  189. if (left_ > 0) { \
  190. (sh2)->cycles_timeslice -= left_; \
  191. (sh2)->sr -= (left_ << 12); \
  192. } \
  193. } while (0)
  194. # define sh2_cycles_left(sh2) ((signed int)(sh2)->sr >> 12)
  195. # define sh2_burn_cycles(sh2, n) (sh2)->sr -= ((n) << 12)
  196. # define sh2_pc(sh2) (sh2)->pc
  197. # define sh2_not_polling(sh2) ((sh2)->sr & SH2_NO_POLLING)
  198. # define sh2_set_polling(sh2) ((sh2)->sr &= ~SH2_NO_POLLING)
  199. #endif
  200. #define sh2_cycles_done(sh2) (unsigned)((int)(sh2)->cycles_timeslice - sh2_cycles_left(sh2))
  201. #define sh2_cycles_done_t(sh2) \
  202. (unsigned)(C_M68K_TO_SH2(sh2, (sh2)->m68krcycles_done) + sh2_cycles_done(sh2))
  203. #define sh2_cycles_done_m68k(sh2) \
  204. (unsigned)((sh2)->m68krcycles_done + C_SH2_TO_M68K(sh2, sh2_cycles_done(sh2)))
  205. #define sh2_reg(c, x) ((c) ? ssh2.r[x] : msh2.r[x])
  206. #define sh2_gbr(c) ((c) ? ssh2.gbr : msh2.gbr)
  207. #define sh2_vbr(c) ((c) ? ssh2.vbr : msh2.vbr)
  208. #define sh2_sr(c) (((c) ? ssh2.sr : msh2.sr) & 0xfff)
  209. #define sh2_set_gbr(c, v) \
  210. { if (c) ssh2.gbr = v; else msh2.gbr = v; }
  211. #define sh2_set_vbr(c, v) \
  212. { if (c) ssh2.vbr = v; else msh2.vbr = v; }
  213. #define elprintf_sh2(sh2, w, f, ...) \
  214. elprintf(w,"%csh2 "f,(sh2)->is_slave?'s':'m',##__VA_ARGS__)
  215. // ---------------------------------------------------------
  216. // main oscillator clock which controls timing
  217. #define OSC_NTSC 53693100
  218. #define OSC_PAL 53203424
  219. // PicoVideo.debug_p
  220. #define PVD_KILL_A (1 << 0)
  221. #define PVD_KILL_B (1 << 1)
  222. #define PVD_KILL_S_LO (1 << 2)
  223. #define PVD_KILL_S_HI (1 << 3)
  224. #define PVD_KILL_32X (1 << 4)
  225. #define PVD_FORCE_A (1 << 5)
  226. #define PVD_FORCE_B (1 << 6)
  227. #define PVD_FORCE_S (1 << 7)
  228. // PicoVideo.status, not part of real SR
  229. #define SR_PAL (1 << 0)
  230. #define SR_DMA (1 << 1)
  231. #define SR_HB (1 << 2)
  232. #define SR_VB (1 << 3)
  233. #define SR_ODD (1 << 4)
  234. #define SR_C (1 << 5)
  235. #define SR_SOVR (1 << 6)
  236. #define SR_F (1 << 7)
  237. #define SR_FULL (1 << 8)
  238. #define SR_EMPT (1 << 9)
  239. // not part of real SR
  240. #define PVS_ACTIVE (1 << 16)
  241. #define PVS_VB2 (1 << 17) // ignores forced blanking
  242. #define PVS_CPUWR (1 << 18) // CPU write blocked by FIFO full
  243. #define PVS_CPURD (1 << 19) // CPU read blocked by FIFO not empty
  244. #define PVS_DMAFILL (1 << 20) // DMA fill is waiting for fill data
  245. #define PVS_DMABG (1 << 21) // background DMA operation is running
  246. #define PVS_FIFORUN (1 << 22) // FIFO is processing
  247. struct PicoVideo
  248. {
  249. unsigned char reg[0x20];
  250. unsigned int command; // 32-bit Command
  251. unsigned char pending; // 1 if waiting for second half of 32-bit command
  252. unsigned char type; // Command type (v/c/vsram read/write)
  253. unsigned short addr; // Read/Write address
  254. unsigned int status; // Status bits (SR) and extra flags
  255. unsigned char pending_ints; // pending interrupts: ??VH????
  256. signed char pad1; // was VDP write count
  257. unsigned short v_counter; // V-counter
  258. unsigned short debug; // raw debug register
  259. unsigned char debug_p; // ... parsed: PVD_*
  260. unsigned char addr_u; // bit16 of .addr
  261. unsigned char hint_cnt;
  262. unsigned char pad2;
  263. unsigned short hv_latch; // latched hvcounter value
  264. signed int fifo_cnt; // pending xfers for current FIFO queue entry
  265. unsigned char pad[0x04];
  266. };
  267. struct PicoMisc
  268. {
  269. unsigned char rotate;
  270. unsigned char z80Run;
  271. unsigned char padTHPhase[2]; // 02 phase of gamepad TH switches
  272. unsigned short scanline; // 04 0 to 261||311
  273. char dirtyPal; // 06 Is the palette dirty (1 - change @ this frame, 2 - some time before)
  274. unsigned char hardware; // 07 Hardware value for country
  275. unsigned char pal; // 08 1=PAL 0=NTSC
  276. unsigned char sram_reg; // 09 SRAM reg. See SRR_* below
  277. unsigned short z80_bank68k; // 0a
  278. unsigned short pad0;
  279. unsigned char ncart_in; // 0e !cart_in
  280. unsigned char z80_reset; // 0f z80 reset held
  281. unsigned char padDelay[2]; // 10 gamepad phase time outs, so we count a delay
  282. unsigned short eeprom_addr; // EEPROM address register
  283. unsigned char eeprom_cycle; // EEPROM cycle number
  284. unsigned char eeprom_slave; // EEPROM slave word for X24C02 and better SRAMs
  285. unsigned char eeprom_status;
  286. unsigned char pad1; // was ym2612 status
  287. unsigned short dma_xfers; // 18 unused (was VDP DMA transfer count)
  288. unsigned char eeprom_wb[2]; // EEPROM latch/write buffer
  289. unsigned int frame_count; // 1c for movies and idle det
  290. };
  291. #define PMS_MAP_AUTO 0
  292. #define PMS_MAP_SEGA 1
  293. #define PMS_MAP_CODEM 2
  294. #define PMS_MAP_KOREA 3
  295. #define PMS_MAP_MSX 4
  296. #define PMS_MAP_N32K 5
  297. #define PMS_MAP_N16K 6
  298. #define PMS_MAP_JANGGUN 7
  299. #define PMS_MAP_NEMESIS 8
  300. struct PicoMS
  301. {
  302. unsigned char carthw[0x10];
  303. unsigned char io_ctl;
  304. unsigned char nmi_state;
  305. unsigned char mapper;
  306. unsigned char fm_ctl;
  307. unsigned char vdp_buffer;
  308. unsigned char vdp_hlatch;
  309. unsigned char io_gg[0x08];
  310. unsigned char pad[0x42];
  311. };
  312. // emu state and data for the asm code
  313. struct PicoEState
  314. {
  315. int DrawScanline;
  316. int rendstatus;
  317. void *DrawLineDest; // draw destination
  318. int DrawLineDestIncr;
  319. unsigned char *HighCol;
  320. s32 *HighPreSpr;
  321. struct Pico *Pico;
  322. unsigned short *PicoMem_vram;
  323. unsigned short *PicoMem_cram;
  324. unsigned int *PicoOpt;
  325. unsigned char *Draw2FB;
  326. int Draw2Width;
  327. int Draw2Start;
  328. unsigned short HighPal[0x100];
  329. unsigned short SonicPal[0x100];
  330. int SonicPalCount;
  331. };
  332. struct PicoMem
  333. {
  334. unsigned char ram[0x10000]; // 0x00000 scratch ram
  335. union { // vram is byteswapped for easier reads when drawing
  336. unsigned short vram[0x8000]; // 0x10000
  337. unsigned char vramb[0x4000]; // VRAM in SMS mode
  338. };
  339. unsigned char zram[0x2000]; // 0x20000 Z80 ram
  340. unsigned char ioports[0x10]; // XXX: fix asm and mv
  341. unsigned short cram[0x40]; // 0x22010
  342. unsigned char pad[0x70]; // 0x22050 DrawStripVSRam reads 0 from here
  343. unsigned short vsram[0x40]; // 0x22100
  344. };
  345. // sram
  346. #define SRR_MAPPED (1 << 0)
  347. #define SRR_READONLY (1 << 1)
  348. #define SRF_ENABLED (1 << 0)
  349. #define SRF_EEPROM (1 << 1)
  350. struct PicoCartSave
  351. {
  352. unsigned char *data; // actual data
  353. unsigned int start; // start address in 68k address space
  354. unsigned int end;
  355. unsigned char flags; // 0c: SRF_*
  356. unsigned char unused2;
  357. unsigned char changed;
  358. unsigned char eeprom_type; // eeprom type: 0: 7bit (24C01), 2: 2 addr words (X24C02+), 3: 3 addr words
  359. unsigned char unused3;
  360. unsigned char eeprom_bit_cl; // bit number for cl
  361. unsigned char eeprom_bit_in; // bit number for in
  362. unsigned char eeprom_bit_out; // bit number for out
  363. unsigned int size;
  364. };
  365. struct PicoTiming
  366. {
  367. // while running, cnt represents target of current timeslice
  368. // while not in SekRun(), it's actual cycles done
  369. // (but always use SekCyclesDone() if you need current position)
  370. // _cnt may change if timeslice is ended prematurely or extended,
  371. // so we use _aim for the actual target
  372. unsigned int m68c_cnt;
  373. unsigned int m68c_aim;
  374. unsigned int m68c_frame_start; // m68k cycles
  375. unsigned int m68c_line_start;
  376. unsigned int z80c_cnt; // z80 cycles done (this frame)
  377. unsigned int z80c_aim;
  378. unsigned int z80c_line_start;
  379. int z80_scanline;
  380. int timer_a_next_oflow, timer_a_step; // in z80 cycles
  381. int timer_b_next_oflow, timer_b_step;
  382. };
  383. struct PicoSound
  384. {
  385. short len; // number of mono samples
  386. short len_use; // adjusted
  387. int len_e_add; // for non-int samples/frame
  388. int len_e_cnt;
  389. unsigned int clkl_mult; // z80 clocks per line in Q20
  390. unsigned int smpl_mult; // samples per line in Q16
  391. short dac_val, dac_val2; // last DAC sample
  392. unsigned int dac_pos; // last DAC position in Q20
  393. unsigned int fm_pos; // last FM position in Q20
  394. unsigned int psg_pos; // last PSG position in Q16
  395. unsigned int ym2413_pos; // last YM2413 position
  396. };
  397. // run tools/mkoffsets pico/pico_int_offs.h if you change these
  398. // careful with savestate compat
  399. struct Pico
  400. {
  401. struct PicoVideo video;
  402. struct PicoMisc m;
  403. struct PicoTiming t;
  404. struct PicoCartSave sv;
  405. struct PicoSound snd;
  406. struct PicoEState est;
  407. struct PicoMS ms;
  408. unsigned char *rom;
  409. unsigned int romsize;
  410. };
  411. // MCD
  412. #define PCM_MIXBUF_LEN ((12500000 / 384) / 50 + 1)
  413. struct mcd_pcm
  414. {
  415. unsigned char control; // reg7
  416. unsigned char enabled; // reg8
  417. unsigned char cur_ch;
  418. unsigned char bank;
  419. unsigned int update_cycles;
  420. struct pcm_chan // 08, size 0x10
  421. {
  422. unsigned char regs[8];
  423. unsigned int addr; // .08: played sample address
  424. int pad;
  425. } ch[8];
  426. };
  427. #define PCD_ST_S68K_RST 1
  428. struct mcd_misc
  429. {
  430. unsigned short hint_vector;
  431. unsigned char busreq; // not s68k_regs[1]
  432. unsigned char s68k_pend_ints;
  433. unsigned int state_flags; // 04
  434. unsigned int stopwatch_base_c;
  435. unsigned short m68k_poll_a;
  436. unsigned short m68k_poll_cnt;
  437. unsigned short s68k_poll_a;
  438. unsigned short s68k_poll_cnt;
  439. unsigned int s68k_poll_clk;
  440. unsigned char bcram_reg; // 18: battery-backed RAM cart register
  441. unsigned char dmna_ret_2m;
  442. unsigned char need_sync;
  443. unsigned char pad3;
  444. unsigned int m68k_poll_clk;
  445. int pad4[8];
  446. };
  447. typedef struct
  448. {
  449. unsigned char bios[0x20000]; // 000000: 128K
  450. union { // 020000: 512K
  451. unsigned char prg_ram[0x80000];
  452. unsigned char prg_ram_b[4][0x20000];
  453. };
  454. union { // 0a0000: 256K
  455. struct {
  456. unsigned char word_ram2M[0x40000];
  457. unsigned char unused0[0x20000];
  458. };
  459. struct {
  460. unsigned char unused1[0x20000];
  461. unsigned char word_ram1M[2][0x20000];
  462. };
  463. };
  464. union { // 100000: 64K
  465. unsigned char pcm_ram[0x10000];
  466. unsigned char pcm_ram_b[0x10][0x1000];
  467. };
  468. unsigned char s68k_regs[0x200]; // 110000: GA, not CPU regs
  469. unsigned char bram[0x2000]; // 110200: 8K
  470. struct mcd_misc m; // 112200: misc
  471. struct mcd_pcm pcm; // 112240:
  472. void *cdda_stream;
  473. int cdda_type;
  474. int pcm_mixbuf[PCM_MIXBUF_LEN * 2];
  475. int pcm_mixpos;
  476. char pcm_mixbuf_dirty;
  477. char pcm_regs_dirty;
  478. } mcd_state;
  479. // XXX: this will need to be reworked for cart+cd support.
  480. #define Pico_mcd ((mcd_state *)Pico.rom)
  481. // 32X
  482. #define P32XS_FM (1<<15)
  483. #define P32XS_nCART (1<< 8)
  484. #define P32XS_REN (1<< 7)
  485. #define P32XS_nRES (1<< 1)
  486. #define P32XS_ADEN (1<< 0)
  487. #define P32XS2_ADEN (1<< 9)
  488. #define P32XS_FULL (1<< 7) // DREQ FIFO full
  489. #define P32XS_68S (1<< 2)
  490. #define P32XS_DMA (1<< 1)
  491. #define P32XS_RV (1<< 0)
  492. #define P32XV_nPAL (1<<15) // VDP
  493. #define P32XV_PRI (1<< 7)
  494. #define P32XV_Mx (3<< 0) // display mode mask
  495. #define P32XV_SFT (1<< 0)
  496. #define P32XV_VBLK (1<<15)
  497. #define P32XV_HBLK (1<<14)
  498. #define P32XV_PEN (1<<13)
  499. #define P32XV_nFEN (1<< 1)
  500. #define P32XV_FS (1<< 0)
  501. #define P32XP_RTP (1<<7) // PWM control
  502. #define P32XP_FULL (1<<15) // PWM pulse
  503. #define P32XP_EMPTY (1<<14)
  504. #define P32XF_68KCPOLL (1 << 0)
  505. #define P32XF_68KVPOLL (1 << 1)
  506. #define P32XF_Z80_32X_IO (1 << 7) // z80 does 32x io
  507. #define P32XF_DRC_ROM_C (1 << 8) // cached code from ROM
  508. #define P32XI_VRES (1 << 14/2) // IRL/2
  509. #define P32XI_VINT (1 << 12/2)
  510. #define P32XI_HINT (1 << 10/2)
  511. #define P32XI_CMD (1 << 8/2)
  512. #define P32XI_PWM (1 << 6/2)
  513. // peripheral reg access (32 bit regs)
  514. #define PREG8(regs,offs) ((unsigned char *)regs)[MEM_BE4(offs)]
  515. #define DMAC_FIFO_LEN (4*2)
  516. #define PWM_BUFF_LEN 1024 // in one channel samples
  517. #define SH2_DRCBLK_RAM_SHIFT 1
  518. #define SH2_DRCBLK_DA_SHIFT 1
  519. #define SH2_READ_SHIFT 25
  520. #define SH2_WRITE_SHIFT 25
  521. struct Pico32x
  522. {
  523. unsigned short regs[0x20];
  524. unsigned short vdp_regs[0x10]; // 0x40
  525. unsigned short sh2_regs[3]; // 0x60
  526. unsigned char pending_fb;
  527. unsigned char dirty_pal;
  528. unsigned int emu_flags;
  529. unsigned char sh2irq_mask[2];
  530. unsigned char sh2irqi[2]; // individual
  531. unsigned int sh2irqs; // common irqs
  532. unsigned short dmac_fifo[DMAC_FIFO_LEN];
  533. unsigned int pad[4];
  534. unsigned int dmac0_fifo_ptr;
  535. unsigned short vdp_fbcr_fake;
  536. unsigned short pad2;
  537. unsigned char comm_dirty;
  538. unsigned char pad3; // was comm_dirty_sh2
  539. unsigned char pwm_irq_cnt;
  540. unsigned char pad1;
  541. unsigned short pwm_p[2]; // pwm pos in fifo
  542. unsigned int pwm_cycle_p; // pwm play cursor (32x cycles)
  543. unsigned int reserved[6];
  544. };
  545. struct Pico32xMem
  546. {
  547. unsigned char sdram[0x40000];
  548. #ifdef DRC_SH2
  549. unsigned char drcblk_ram[1 << (18 - SH2_DRCBLK_RAM_SHIFT)];
  550. unsigned char drclit_ram[1 << (18 - SH2_DRCBLK_RAM_SHIFT)];
  551. #endif
  552. unsigned short dram[2][0x20000/2]; // AKA fb
  553. union {
  554. unsigned char m68k_rom[0x100];
  555. unsigned char m68k_rom_bank[0x10000]; // M68K_BANK_SIZE
  556. };
  557. #ifdef DRC_SH2
  558. unsigned char drcblk_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];
  559. unsigned char drclit_da[2][1 << (12 - SH2_DRCBLK_DA_SHIFT)];
  560. #endif
  561. union {
  562. unsigned char b[0x800];
  563. unsigned short w[0x800/2];
  564. } sh2_rom_m;
  565. union {
  566. unsigned char b[0x400];
  567. unsigned short w[0x400/2];
  568. } sh2_rom_s;
  569. unsigned short pal[0x100];
  570. unsigned short pal_native[0x100]; // converted to native (for renderer)
  571. signed short pwm[2*PWM_BUFF_LEN]; // PWM buffer for current frame
  572. unsigned short pwm_fifo[2][4]; // [0] - current raw, others - fifo entries
  573. unsigned pwm_index[2]; // ringbuffer index for pwm_fifo
  574. };
  575. // area.c
  576. extern void (*PicoLoadStateHook)(void);
  577. typedef struct {
  578. int chunk;
  579. int size;
  580. void *ptr;
  581. } carthw_state_chunk;
  582. extern carthw_state_chunk *carthw_chunks;
  583. #define CHUNK_CARTHW 64
  584. // cart.c
  585. extern int PicoCartResize(int newsize);
  586. extern void Byteswap(void *dst, const void *src, int len);
  587. extern void (*PicoCartMemSetup)(void);
  588. extern void (*PicoCartUnloadHook)(void);
  589. // debug.c
  590. int CM_compareRun(int cyc, int is_sub);
  591. // draw.c
  592. void PicoDrawInit(void);
  593. PICO_INTERNAL void PicoFrameStart(void);
  594. void PicoDrawSync(int to, int blank_last_line);
  595. void BackFill(int reg7, int sh, struct PicoEState *est);
  596. void FinalizeLine555(int sh, int line, struct PicoEState *est);
  597. void FinalizeLine8bit(int sh, int line, struct PicoEState *est);
  598. void PicoDrawSetOutBufMD(void *dest, int increment);
  599. extern int (*PicoScanBegin)(unsigned int num);
  600. extern int (*PicoScanEnd)(unsigned int num);
  601. #define MAX_LINE_SPRITES 27 // +1 last sprite width, +4 hdr; total 32
  602. extern unsigned char HighLnSpr[240][4+MAX_LINE_SPRITES+1];
  603. extern unsigned char *HighColBase;
  604. extern int HighColIncrement;
  605. extern void *DrawLineDestBase;
  606. extern int DrawLineDestIncrement;
  607. extern u32 VdpSATCache[128];
  608. // draw2.c
  609. void PicoDraw2SetOutBuf(void *dest, int incr);
  610. void PicoDraw2Init(void);
  611. PICO_INTERNAL void PicoFrameFull();
  612. // mode4.c
  613. void PicoFrameStartSMS(void);
  614. void PicoParseSATSMS(int line);
  615. void PicoLineSMS(int line);
  616. void PicoDoHighPal555SMS(void);
  617. void PicoDrawSetOutputSMS(pdso_t which);
  618. // memory.c
  619. PICO_INTERNAL void PicoMemSetup(void);
  620. u32 PicoRead8_io(u32 a);
  621. u32 PicoRead16_io(u32 a);
  622. void PicoWrite8_io(u32 a, u32 d);
  623. void PicoWrite16_io(u32 a, u32 d);
  624. // pico/memory.c
  625. PICO_INTERNAL void PicoMemSetupPico(void);
  626. // cd/cdc.c
  627. void cdc_init(void);
  628. void cdc_reset(void);
  629. int cdc_context_save(unsigned char *state);
  630. int cdc_context_load(unsigned char *state);
  631. int cdc_context_load_old(unsigned char *state);
  632. void cdc_dma_update(void);
  633. int cdc_decoder_update(unsigned char header[4]);
  634. void cdc_reg_w(unsigned char data);
  635. unsigned char cdc_reg_r(void);
  636. unsigned short cdc_host_r(void);
  637. // cd/cdd.c
  638. void cdd_reset(void);
  639. int cdd_context_save(unsigned char *state);
  640. int cdd_context_load(unsigned char *state);
  641. int cdd_context_load_old(unsigned char *state);
  642. void cdd_read_data(unsigned char *dst);
  643. void cdd_read_audio(unsigned int samples);
  644. void cdd_update(void);
  645. void cdd_process(void);
  646. // cd/cd_image.c
  647. int load_cd_image(const char *cd_img_name, int *type);
  648. // cd/gfx.c
  649. void gfx_init(void);
  650. void gfx_start(u32 base);
  651. void gfx_update(unsigned int cycles);
  652. int gfx_context_save(unsigned char *state);
  653. int gfx_context_load(const unsigned char *state);
  654. // cd/gfx_dma.c
  655. void DmaSlowCell(u32 source, u32 a, int len, unsigned char inc);
  656. // cd/memory.c
  657. PICO_INTERNAL void PicoMemSetupCD(void);
  658. u32 PicoRead8_mcd_io(u32 a);
  659. u32 PicoRead16_mcd_io(u32 a);
  660. void PicoWrite8_mcd_io(u32 a, u32 d);
  661. void PicoWrite16_mcd_io(u32 a, u32 d);
  662. void pcd_state_loaded_mem(void);
  663. // pico.c
  664. extern struct Pico Pico;
  665. extern struct PicoMem PicoMem;
  666. extern void (*PicoResetHook)(void);
  667. extern void (*PicoLineHook)(void);
  668. PICO_INTERNAL int CheckDMA(int cycles);
  669. PICO_INTERNAL void PicoDetectRegion(void);
  670. PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done);
  671. // cd/mcd.c
  672. #define PCDS_IEN1 (1<<1)
  673. #define PCDS_IEN2 (1<<2)
  674. #define PCDS_IEN3 (1<<3)
  675. #define PCDS_IEN4 (1<<4)
  676. #define PCDS_IEN5 (1<<5)
  677. #define PCDS_IEN6 (1<<6)
  678. PICO_INTERNAL void PicoInitMCD(void);
  679. PICO_INTERNAL void PicoExitMCD(void);
  680. PICO_INTERNAL void PicoPowerMCD(void);
  681. PICO_INTERNAL int PicoResetMCD(void);
  682. PICO_INTERNAL void PicoFrameMCD(void);
  683. enum pcd_event {
  684. PCD_EVENT_CDC,
  685. PCD_EVENT_TIMER3,
  686. PCD_EVENT_GFX,
  687. PCD_EVENT_DMA,
  688. PCD_EVENT_COUNT,
  689. };
  690. extern unsigned int pcd_event_times[PCD_EVENT_COUNT];
  691. void pcd_event_schedule(unsigned int now, enum pcd_event event, int after);
  692. void pcd_event_schedule_s68k(enum pcd_event event, int after);
  693. void pcd_prepare_frame(void);
  694. unsigned int pcd_cycles_m68k_to_s68k(unsigned int c);
  695. void pcd_irq_s68k(int irq, int state);
  696. int pcd_sync_s68k(unsigned int m68k_target, int m68k_poll_sync);
  697. void pcd_run_cpus(int m68k_cycles);
  698. void pcd_soft_reset(void);
  699. void pcd_state_loaded(void);
  700. // cd/pcm.c
  701. void pcd_pcm_sync(unsigned int to);
  702. void pcd_pcm_update(s32 *buffer, int length, int stereo);
  703. void pcd_pcm_write(unsigned int a, unsigned int d);
  704. unsigned int pcd_pcm_read(unsigned int a);
  705. // pico/pico.c
  706. PICO_INTERNAL void PicoInitPico(void);
  707. PICO_INTERNAL void PicoReratePico(void);
  708. // pico/xpcm.c
  709. PICO_INTERNAL void PicoPicoPCMUpdate(short *buffer, int length, int stereo);
  710. PICO_INTERNAL void PicoPicoPCMReset(void);
  711. PICO_INTERNAL void PicoPicoPCMRerate(int xpcm_rate);
  712. // sek.c
  713. PICO_INTERNAL void SekInit(void);
  714. PICO_INTERNAL int SekReset(void);
  715. PICO_INTERNAL void SekState(int *data);
  716. PICO_INTERNAL void SekSetRealTAS(int use_real);
  717. PICO_INTERNAL void SekPackCpu(unsigned char *cpu, int is_sub);
  718. PICO_INTERNAL void SekUnpackCpu(const unsigned char *cpu, int is_sub);
  719. void SekStepM68k(void);
  720. void SekInitIdleDet(void);
  721. void SekFinishIdleDet(void);
  722. #if defined(CPU_CMP_R) || defined(CPU_CMP_W)
  723. void SekTrace(int is_s68k);
  724. #else
  725. #define SekTrace(x)
  726. #endif
  727. // cd/sek.c
  728. PICO_INTERNAL void SekInitS68k(void);
  729. PICO_INTERNAL int SekResetS68k(void);
  730. PICO_INTERNAL int SekInterruptS68k(int irq);
  731. void SekInterruptClearS68k(int irq);
  732. // sound/sound.c
  733. extern short cdda_out_buffer[2*1152];
  734. void cdda_start_play(int lba_base, int lba_offset, int lb_len);
  735. void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new);
  736. void ym2612_pack_state(void);
  737. void ym2612_unpack_state(void);
  738. #define TIMER_NO_OFLOW 0x70000000
  739. // tA = 72 * (1024 - NA) / M, with M = mclock/2 -> tick = 72 * 2/mclock
  740. #define TIMER_A_TICK_ZCYCLES 17203 // zcycles = Q8*tick*zclock = Q8*77*2*7/15
  741. // tB = 1152 * (256 - NA) / M,
  742. #define TIMER_B_TICK_ZCYCLES 275251 // zcycles = Q8*1152*2*7/15
  743. #define timers_cycle() \
  744. if (Pico.t.timer_a_next_oflow > 0 && Pico.t.timer_a_next_oflow < TIMER_NO_OFLOW) \
  745. Pico.t.timer_a_next_oflow -= Pico.m.pal ? 70938*256 : 59659*256; \
  746. if (Pico.t.timer_b_next_oflow > 0 && Pico.t.timer_b_next_oflow < TIMER_NO_OFLOW) \
  747. Pico.t.timer_b_next_oflow -= Pico.m.pal ? 70938*256 : 59659*256; \
  748. ym2612_sync_timers(0, ym2612.OPN.ST.mode, ym2612.OPN.ST.mode);
  749. #define timers_reset() \
  750. Pico.t.timer_a_next_oflow = Pico.t.timer_b_next_oflow = TIMER_NO_OFLOW; \
  751. Pico.t.timer_a_step = TIMER_A_TICK_ZCYCLES * 1024; \
  752. Pico.t.timer_b_step = TIMER_B_TICK_ZCYCLES * 256; \
  753. ym2612.OPN.ST.status &= ~3;
  754. // videoport.c
  755. extern u32 SATaddr, SATmask;
  756. static __inline void UpdateSAT(u32 a, u32 d)
  757. {
  758. unsigned num = (a^SATaddr) >> 3;
  759. Pico.est.rendstatus |= PDRAW_DIRTY_SPRITES;
  760. if (!(a & 4) && num < 128) {
  761. ((u16 *)&VdpSATCache[num])[(a&3) >> 1] = d;
  762. }
  763. }
  764. static __inline void VideoWriteVRAM(u32 a, u16 d)
  765. {
  766. PicoMem.vram [(u16)a >> 1] = d;
  767. if (((a^SATaddr) & SATmask) == 0)
  768. UpdateSAT(a, d);
  769. }
  770. PICO_INTERNAL_ASM void PicoVideoWrite(u32 a,unsigned short d);
  771. PICO_INTERNAL_ASM u32 PicoVideoRead(u32 a);
  772. unsigned char PicoVideoRead8DataH(int is_from_z80);
  773. unsigned char PicoVideoRead8DataL(int is_from_z80);
  774. unsigned char PicoVideoRead8CtlH(int is_from_z80);
  775. unsigned char PicoVideoRead8CtlL(int is_from_z80);
  776. unsigned char PicoVideoRead8HV_H(int is_from_z80);
  777. unsigned char PicoVideoRead8HV_L(int is_from_z80);
  778. extern int (*PicoDmaHook)(u32 source, int len, unsigned short **base, u32 *mask);
  779. void PicoVideoFIFOSync(int cycles);
  780. int PicoVideoFIFOHint(void);
  781. void PicoVideoFIFOMode(int active, int h40);
  782. int PicoVideoFIFOWrite(int count, int byte_p, unsigned sr_mask, unsigned sr_flags);
  783. void PicoVideoInit(void);
  784. void PicoVideoSave(void);
  785. void PicoVideoLoad(void);
  786. void PicoVideoCacheSAT(void);
  787. // misc.c
  788. PICO_INTERNAL_ASM void memcpy16bswap(unsigned short *dest, void *src, int count);
  789. PICO_INTERNAL_ASM void memset32(void *dest, int c, int count);
  790. // eeprom.c
  791. void EEPROM_write8(unsigned int a, unsigned int d);
  792. void EEPROM_write16(unsigned int d);
  793. unsigned int EEPROM_read(void);
  794. // z80 functionality wrappers
  795. PICO_INTERNAL void z80_init(void);
  796. PICO_INTERNAL void z80_pack(void *data);
  797. PICO_INTERNAL int z80_unpack(const void *data);
  798. PICO_INTERNAL void z80_reset(void);
  799. PICO_INTERNAL void z80_exit(void);
  800. // cd/misc.c
  801. PICO_INTERNAL_ASM void wram_2M_to_1M(unsigned char *m);
  802. PICO_INTERNAL_ASM void wram_1M_to_2M(unsigned char *m);
  803. // sound/sound.c
  804. PICO_INTERNAL void PsndInit(void);
  805. PICO_INTERNAL void PsndExit(void);
  806. PICO_INTERNAL void PsndReset(void);
  807. PICO_INTERNAL void PsndStartFrame(void);
  808. PICO_INTERNAL void PsndDoDAC(int cycle_to);
  809. PICO_INTERNAL void PsndDoPSG(int cyc_to);
  810. PICO_INTERNAL void PsndDoYM2413(int cyc_to);
  811. PICO_INTERNAL void PsndDoFM(int cyc_to);
  812. PICO_INTERNAL void PsndClear(void);
  813. PICO_INTERNAL void PsndGetSamples(int y);
  814. PICO_INTERNAL void PsndGetSamplesMS(int y);
  815. // sms.c
  816. #ifndef NO_SMS
  817. void PicoPowerMS(void);
  818. void PicoResetMS(void);
  819. void PicoMemSetupMS(void);
  820. void PicoStateLoadedMS(void);
  821. void PicoFrameMS(void);
  822. void PicoFrameDrawOnlyMS(void);
  823. #else
  824. #define PicoPowerMS()
  825. #define PicoResetMS()
  826. #define PicoMemSetupMS()
  827. #define PicoStateLoadedMS()
  828. #define PicoFrameMS()
  829. #define PicoFrameDrawOnlyMS()
  830. #endif
  831. // 32x/32x.c
  832. #ifndef NO_32X
  833. extern struct Pico32x Pico32x;
  834. enum p32x_event {
  835. P32X_EVENT_PWM,
  836. P32X_EVENT_FILLEND,
  837. P32X_EVENT_HINT,
  838. P32X_EVENT_COUNT,
  839. };
  840. extern unsigned int p32x_event_times[P32X_EVENT_COUNT];
  841. void Pico32xInit(void);
  842. void PicoPower32x(void);
  843. void PicoReset32x(void);
  844. void Pico32xStartup(void);
  845. void PicoUnload32x(void);
  846. void PicoFrame32x(void);
  847. void Pico32xStateLoaded(int is_early);
  848. void p32x_sync_sh2s(unsigned int m68k_target);
  849. void p32x_sync_other_sh2(SH2 *sh2, unsigned int m68k_target);
  850. void p32x_update_irls(SH2 *active_sh2, unsigned int m68k_cycles);
  851. void p32x_trigger_irq(SH2 *sh2, unsigned int m68k_cycles, unsigned int mask);
  852. void p32x_update_cmd_irq(SH2 *sh2, unsigned int m68k_cycles);
  853. void p32x_reset_sh2s(void);
  854. void p32x_event_schedule(unsigned int now, enum p32x_event event, int after);
  855. void p32x_event_schedule_sh2(SH2 *sh2, enum p32x_event event, int after);
  856. void p32x_schedule_hint(SH2 *sh2, unsigned int m68k_cycles);
  857. #define p32x_sh2_ready(sh2, cycles) \
  858. (CYCLES_GT(cycles,sh2->m68krcycles_done) && \
  859. !(sh2->state&(SH2_STATE_CPOLL|SH2_STATE_VPOLL|SH2_STATE_RPOLL)))
  860. // 32x/memory.c
  861. extern struct Pico32xMem *Pico32xMem;
  862. u32 PicoRead8_32x(u32 a);
  863. u32 PicoRead16_32x(u32 a);
  864. void PicoWrite8_32x(u32 a, u32 d);
  865. void PicoWrite16_32x(u32 a, u32 d);
  866. void PicoMemSetup32x(void);
  867. void Pico32xSwapDRAM(int b);
  868. void Pico32xMemStateLoaded(void);
  869. void p32x_update_banks(void);
  870. void p32x_m68k_poll_event(u32 flags);
  871. u32 REGPARM(3) p32x_sh2_poll_memory8(u32 a, u32 d, SH2 *sh2);
  872. u32 REGPARM(3) p32x_sh2_poll_memory16(u32 a, u32 d, SH2 *sh2);
  873. u32 REGPARM(3) p32x_sh2_poll_memory32(u32 a, u32 d, SH2 *sh2);
  874. void *p32x_sh2_get_mem_ptr(u32 a, u32 *mask, SH2 *sh2);
  875. void p32x_sh2_poll_detect(u32 a, SH2 *sh2, u32 flags, int maxcnt);
  876. void p32x_sh2_poll_event(SH2 *sh2, u32 flags, u32 m68k_cycles);
  877. int p32x_sh2_memcpy(u32 dst, u32 src, int count, int size, SH2 *sh2);
  878. // 32x/draw.c
  879. void PicoDrawSetOutFormat32x(pdso_t which, int use_32x_line_mode);
  880. void PicoDrawSetOutBuf32X(void *dest, int increment);
  881. void FinalizeLine32xRGB555(int sh, int line, struct PicoEState *est);
  882. void PicoDraw32xLayer(int offs, int lines, int mdbg);
  883. void PicoDraw32xLayerMdOnly(int offs, int lines);
  884. extern int (*PicoScan32xBegin)(unsigned int num);
  885. extern int (*PicoScan32xEnd)(unsigned int num);
  886. enum {
  887. PDM32X_OFF,
  888. PDM32X_32X_ONLY,
  889. PDM32X_BOTH,
  890. };
  891. extern int Pico32xDrawMode;
  892. // 32x/pwm.c
  893. unsigned int p32x_pwm_read16(u32 a, SH2 *sh2, unsigned int m68k_cycles);
  894. void p32x_pwm_write16(u32 a, unsigned int d, SH2 *sh2, unsigned int m68k_cycles);
  895. void p32x_pwm_update(int *buf32, int length, int stereo);
  896. void p32x_pwm_ctl_changed(void);
  897. void p32x_pwm_schedule(unsigned int m68k_now);
  898. void p32x_pwm_schedule_sh2(SH2 *sh2);
  899. void p32x_pwm_sync_to_sh2(SH2 *sh2);
  900. void p32x_pwm_irq_event(unsigned int m68k_now);
  901. void p32x_pwm_state_loaded(void);
  902. // 32x/sh2soc.c
  903. void p32x_dreq0_trigger(void);
  904. void p32x_dreq1_trigger(void);
  905. void p32x_timers_recalc(void);
  906. void p32x_timer_do(SH2 *sh2, unsigned int m68k_slice);
  907. void sh2_peripheral_reset(SH2 *sh2);
  908. u32 REGPARM(2) sh2_peripheral_read8(u32 a, SH2 *sh2);
  909. u32 REGPARM(2) sh2_peripheral_read16(u32 a, SH2 *sh2);
  910. u32 REGPARM(2) sh2_peripheral_read32(u32 a, SH2 *sh2);
  911. void REGPARM(3) sh2_peripheral_write8(u32 a, u32 d, SH2 *sh2);
  912. void REGPARM(3) sh2_peripheral_write16(u32 a, u32 d, SH2 *sh2);
  913. void REGPARM(3) sh2_peripheral_write32(u32 a, u32 d, SH2 *sh2);
  914. #else
  915. #define Pico32xInit()
  916. #define PicoPower32x()
  917. #define PicoReset32x()
  918. #define PicoFrame32x()
  919. #define PicoUnload32x()
  920. #define Pico32xStateLoaded()
  921. #define FinalizeLine32xRGB555 NULL
  922. #define p32x_pwm_update(...)
  923. #define p32x_timers_recalc()
  924. #endif
  925. /* avoid dependency on newer glibc */
  926. static __inline int isspace_(int c)
  927. {
  928. return (0x09 <= c && c <= 0x0d) || c == ' ';
  929. }
  930. #ifndef ARRAY_SIZE
  931. #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
  932. #endif
  933. // emulation event logging
  934. #ifndef EL_LOGMASK
  935. # ifdef __x86_64__ // HACK
  936. # define EL_LOGMASK (EL_STATUS|EL_ANOMALY)
  937. # else
  938. # define EL_LOGMASK (EL_STATUS)
  939. # endif
  940. #endif
  941. #define EL_HVCNT 0x00000001 /* hv counter reads */
  942. #define EL_SR 0x00000002 /* SR reads */
  943. #define EL_INTS 0x00000004 /* ints and acks */
  944. #define EL_YMTIMER 0x00000008 /* ym2612 timer stuff */
  945. #define EL_INTSW 0x00000010 /* log irq switching on/off */
  946. #define EL_ASVDP 0x00000020 /* VDP accesses during active scan */
  947. #define EL_VDPDMA 0x00000040 /* VDP DMA transfers and their timing */
  948. #define EL_BUSREQ 0x00000080 /* z80 busreq r/w or reset w */
  949. #define EL_Z80BNK 0x00000100 /* z80 i/o through bank area */
  950. #define EL_SRAMIO 0x00000200 /* sram i/o */
  951. #define EL_EEPROM 0x00000400 /* eeprom debug */
  952. #define EL_UIO 0x00000800 /* unmapped i/o */
  953. #define EL_IO 0x00001000 /* all i/o */
  954. #define EL_CDPOLL 0x00002000 /* MCD: log poll detection */
  955. #define EL_SVP 0x00004000 /* SVP stuff */
  956. #define EL_PICOHW 0x00008000 /* Pico stuff */
  957. #define EL_IDLE 0x00010000 /* idle loop det. */
  958. #define EL_CDREGS 0x00020000 /* MCD: register access */
  959. #define EL_CDREG3 0x00040000 /* MCD: register 3 only */
  960. #define EL_32X 0x00080000
  961. #define EL_PWM 0x00100000 /* 32X PWM stuff (LOTS of output) */
  962. #define EL_32XP 0x00200000 /* 32X peripherals */
  963. #define EL_CD 0x00400000 /* MCD */
  964. #define EL_STATUS 0x40000000 /* status messages */
  965. #define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */
  966. #if EL_LOGMASK
  967. #define elprintf(w,f,...) \
  968. do { \
  969. if ((w) & EL_LOGMASK) \
  970. lprintf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__); \
  971. } while (0)
  972. #elif defined(_MSC_VER)
  973. #define elprintf
  974. #else
  975. #define elprintf(w,f,...)
  976. #endif
  977. // profiling
  978. #ifdef PPROF
  979. #include <platform/linux/pprof.h>
  980. #else
  981. #define pprof_init()
  982. #define pprof_finish()
  983. #define pprof_start(x)
  984. #define pprof_end(...)
  985. #define pprof_end_sub(...)
  986. #endif
  987. #ifdef EVT_LOG
  988. enum evt {
  989. EVT_FRAME_START,
  990. EVT_NEXT_LINE,
  991. EVT_RUN_START,
  992. EVT_RUN_END,
  993. EVT_POLL_START,
  994. EVT_POLL_END,
  995. EVT_CNT
  996. };
  997. enum evt_cpu {
  998. EVT_M68K,
  999. EVT_S68K,
  1000. EVT_MSH2,
  1001. EVT_SSH2,
  1002. EVT_CPU_CNT
  1003. };
  1004. void pevt_log(unsigned int cycles, enum evt_cpu c, enum evt e);
  1005. void pevt_dump(void);
  1006. #define pevt_log_m68k(e) \
  1007. pevt_log(SekCyclesDone(), EVT_M68K, e)
  1008. #define pevt_log_m68k_o(e) \
  1009. pevt_log(SekCyclesDone(), EVT_M68K, e)
  1010. #define pevt_log_sh2(sh2, e) \
  1011. pevt_log(sh2_cycles_done_m68k(sh2), EVT_MSH2 + (sh2)->is_slave, e)
  1012. #define pevt_log_sh2_o(sh2, e) \
  1013. pevt_log((sh2)->m68krcycles_done, EVT_MSH2 + (sh2)->is_slave, e)
  1014. #else
  1015. #define pevt_log(c, e)
  1016. #define pevt_log_m68k(e)
  1017. #define pevt_log_m68k_o(e)
  1018. #define pevt_log_sh2(sh2, e)
  1019. #define pevt_log_sh2_o(sh2, e)
  1020. #define pevt_dump()
  1021. #endif
  1022. #ifdef __cplusplus
  1023. } // End of extern "C"
  1024. #endif
  1025. #endif // PICO_INTERNAL_INCLUDED
  1026. // vim:shiftwidth=2:ts=2:expandtab