memory.c 38 KB

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  1. /*
  2. * memory handling
  3. * (c) Copyright Dave, 2004
  4. * (C) notaz, 2006-2010
  5. *
  6. * This work is licensed under the terms of MAME license.
  7. * See COPYING file in the top-level directory.
  8. */
  9. #include "pico_int.h"
  10. #include "memory.h"
  11. #include "sound/ym2612.h"
  12. #include "sound/sn76496.h"
  13. extern unsigned int lastSSRamWrite; // used by serial eeprom code
  14. uptr m68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];
  15. uptr m68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];
  16. uptr m68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];
  17. uptr m68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];
  18. static void xmap_set(uptr *map, int shift, u32 start_addr, u32 end_addr,
  19. const void *func_or_mh, int is_func)
  20. {
  21. #ifdef __clang__
  22. // workaround bug (segfault) in
  23. // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)
  24. volatile
  25. #endif
  26. uptr addr = (uptr)func_or_mh;
  27. int mask = (1 << shift) - 1;
  28. int i;
  29. if ((start_addr & mask) != 0 || (end_addr & mask) != mask) {
  30. elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: tried to map bad range: %06x-%06x",
  31. start_addr, end_addr);
  32. return;
  33. }
  34. if (addr & 1) {
  35. elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: ptr is not aligned: %08lx", addr);
  36. return;
  37. }
  38. if (!is_func)
  39. addr -= start_addr;
  40. for (i = start_addr >> shift; i <= end_addr >> shift; i++) {
  41. map[i] = addr >> 1;
  42. if (is_func)
  43. map[i] |= MAP_FLAG;
  44. }
  45. }
  46. void z80_map_set(uptr *map, u16 start_addr, u16 end_addr,
  47. const void *func_or_mh, int is_func)
  48. {
  49. xmap_set(map, Z80_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);
  50. #ifdef _USE_CZ80
  51. if (!is_func)
  52. Cz80_Set_Fetch(&CZ80, start_addr, end_addr, (FPTR)func_or_mh);
  53. #endif
  54. }
  55. void cpu68k_map_set(uptr *map, u32 start_addr, u32 end_addr,
  56. const void *func_or_mh, int is_func)
  57. {
  58. xmap_set(map, M68K_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);
  59. #ifdef EMU_F68K
  60. // setup FAME fetchmap
  61. if (!is_func)
  62. {
  63. int shiftout = 24 - FAMEC_FETCHBITS;
  64. int i = start_addr >> shiftout;
  65. uptr base = (uptr)func_or_mh - (i << shiftout);
  66. for (; i <= (end_addr >> shiftout); i++)
  67. PicoCpuFM68k.Fetch[i] = base;
  68. }
  69. #endif
  70. }
  71. // more specialized/optimized function (does same as above)
  72. void cpu68k_map_all_ram(u32 start_addr, u32 end_addr, void *ptr, int is_sub)
  73. {
  74. uptr *r8map, *r16map, *w8map, *w16map;
  75. uptr addr = (uptr)ptr;
  76. int shift = M68K_MEM_SHIFT;
  77. int i;
  78. if (!is_sub) {
  79. r8map = m68k_read8_map;
  80. r16map = m68k_read16_map;
  81. w8map = m68k_write8_map;
  82. w16map = m68k_write16_map;
  83. } else {
  84. r8map = s68k_read8_map;
  85. r16map = s68k_read16_map;
  86. w8map = s68k_write8_map;
  87. w16map = s68k_write16_map;
  88. }
  89. addr -= start_addr;
  90. addr >>= 1;
  91. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  92. r8map[i] = r16map[i] = w8map[i] = w16map[i] = addr;
  93. #ifdef EMU_F68K
  94. // setup FAME fetchmap
  95. {
  96. M68K_CONTEXT *ctx = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;
  97. int shiftout = 24 - FAMEC_FETCHBITS;
  98. i = start_addr >> shiftout;
  99. addr = (uptr)ptr - (i << shiftout);
  100. for (; i <= (end_addr >> shiftout); i++)
  101. ctx->Fetch[i] = addr;
  102. }
  103. #endif
  104. }
  105. static u32 m68k_unmapped_read8(u32 a)
  106. {
  107. elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
  108. return (PicoIn.AHW & PAHW_MCD) ? 0x00 : 0xff; // pulldown if MegaCD2 attached
  109. }
  110. static u32 m68k_unmapped_read16(u32 a)
  111. {
  112. elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);
  113. return (PicoIn.AHW & PAHW_MCD) ? 0x00 : 0xffff;
  114. }
  115. static void m68k_unmapped_write8(u32 a, u32 d)
  116. {
  117. elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
  118. }
  119. static void m68k_unmapped_write16(u32 a, u32 d)
  120. {
  121. elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
  122. }
  123. void m68k_map_unmap(u32 start_addr, u32 end_addr)
  124. {
  125. #ifdef __clang__
  126. // workaround bug (segfault) in
  127. // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)
  128. volatile
  129. #endif
  130. uptr addr;
  131. int shift = M68K_MEM_SHIFT;
  132. int i;
  133. addr = (uptr)m68k_unmapped_read8;
  134. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  135. m68k_read8_map[i] = (addr >> 1) | MAP_FLAG;
  136. addr = (uptr)m68k_unmapped_read16;
  137. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  138. m68k_read16_map[i] = (addr >> 1) | MAP_FLAG;
  139. addr = (uptr)m68k_unmapped_write8;
  140. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  141. m68k_write8_map[i] = (addr >> 1) | MAP_FLAG;
  142. addr = (uptr)m68k_unmapped_write16;
  143. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  144. m68k_write16_map[i] = (addr >> 1) | MAP_FLAG;
  145. }
  146. #ifndef _ASM_MEMORY_C
  147. MAKE_68K_READ8(m68k_read8, m68k_read8_map)
  148. MAKE_68K_READ16(m68k_read16, m68k_read16_map)
  149. MAKE_68K_READ32(m68k_read32, m68k_read16_map)
  150. MAKE_68K_WRITE8(m68k_write8, m68k_write8_map)
  151. MAKE_68K_WRITE16(m68k_write16, m68k_write16_map)
  152. MAKE_68K_WRITE32(m68k_write32, m68k_write16_map)
  153. #endif
  154. // -----------------------------------------------------------------
  155. static u32 ym2612_read_local_68k(void);
  156. static int ym2612_write_local(u32 a, u32 d, int is_from_z80);
  157. static void z80_mem_setup(void);
  158. #ifdef _ASM_MEMORY_C
  159. u32 PicoRead8_sram(u32 a);
  160. u32 PicoRead16_sram(u32 a);
  161. #endif
  162. #ifdef EMU_CORE_DEBUG
  163. u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};
  164. int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;
  165. extern unsigned int ppop;
  166. #endif
  167. #ifdef IO_STATS
  168. void log_io(unsigned int addr, int bits, int rw);
  169. #elif defined(_MSC_VER)
  170. #define log_io
  171. #else
  172. #define log_io(...)
  173. #endif
  174. #if defined(EMU_C68K)
  175. void cyclone_crashed(u32 pc, struct Cyclone *context)
  176. {
  177. elprintf(EL_STATUS|EL_ANOMALY, "%c68k crash detected @ %06x",
  178. context == &PicoCpuCM68k ? 'm' : 's', pc);
  179. context->membase = (u32)Pico.rom;
  180. context->pc = (u32)Pico.rom + Pico.romsize;
  181. }
  182. #endif
  183. // -----------------------------------------------------------------
  184. // memmap helpers
  185. static u32 read_pad_3btn(int i, u32 out_bits)
  186. {
  187. u32 pad = ~PicoIn.padInt[i]; // Get inverse of pad MXYZ SACB RLDU
  188. u32 value;
  189. if (out_bits & 0x40) // TH
  190. value = pad & 0x3f; // ?1CB RLDU
  191. else
  192. value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU
  193. value |= out_bits & 0x40;
  194. return value;
  195. }
  196. static u32 read_pad_6btn(int i, u32 out_bits)
  197. {
  198. u32 pad = ~PicoIn.padInt[i]; // Get inverse of pad MXYZ SACB RLDU
  199. int phase = Pico.m.padTHPhase[i];
  200. u32 value;
  201. if (phase == 2 && !(out_bits & 0x40)) {
  202. value = (pad & 0xc0) >> 2; // ?0SA 0000
  203. goto out;
  204. }
  205. else if(phase == 3) {
  206. if (out_bits & 0x40)
  207. value = (pad & 0x30) | ((pad >> 8) & 0xf); // ?1CB MXYZ
  208. else
  209. value = ((pad & 0xc0) >> 2) | 0x0f; // ?0SA 1111
  210. goto out;
  211. }
  212. if (out_bits & 0x40) // TH
  213. value = pad & 0x3f; // ?1CB RLDU
  214. else
  215. value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU
  216. out:
  217. value |= out_bits & 0x40;
  218. return value;
  219. }
  220. static u32 read_pad_team(int i, u32 out_bits)
  221. {
  222. u32 pad;
  223. int phase = Pico.m.padTHPhase[i];
  224. u32 value;
  225. if (phase == 0) {
  226. value = 0x03;
  227. goto out;
  228. }
  229. if (phase == 1) {
  230. value = 0x0f;
  231. goto out;
  232. }
  233. pad = ~PicoIn.padInt[0]; // Get inverse of pad MXYZ SACB RLDU
  234. if (phase == 8) {
  235. value = pad & 0x0f; // ?x?x RLDU
  236. goto out;
  237. }
  238. else if(phase == 9) {
  239. value = (pad & 0xf0) >> 4; // ?x?x SACB
  240. goto out;
  241. }
  242. pad = ~PicoIn.padInt[1]; // Get inverse of pad MXYZ SACB RLDU
  243. if (phase == 12) {
  244. value = pad & 0x0f; // ?x?x RLDU
  245. goto out;
  246. }
  247. else if(phase == 13) {
  248. value = (pad & 0xf0) >> 4; // ?x?x SACB
  249. goto out;
  250. }
  251. if (phase >= 8 && pad < 16) {
  252. value = 0x0f;
  253. goto out;
  254. }
  255. value = 0;
  256. out:
  257. value |= (out_bits & 0x40) | ((out_bits & 0x20)>>1);
  258. return value;
  259. }
  260. static u32 read_pad_4way(int i, u32 out_bits)
  261. {
  262. u32 pad = (PicoMem.ioports[2] & 0x70) >> 4;
  263. u32 value = 0;
  264. if (i == 0 && !(pad & 1))
  265. value = read_pad_3btn(pad >> 1, out_bits);
  266. value |= (out_bits & 0x40);
  267. return value;
  268. }
  269. static u32 read_nothing(int i, u32 out_bits)
  270. {
  271. return 0xff;
  272. }
  273. typedef u32 (port_read_func)(int index, u32 out_bits);
  274. static port_read_func *port_readers[3] = {
  275. read_pad_3btn,
  276. read_pad_3btn,
  277. read_nothing
  278. };
  279. static NOINLINE u32 port_read(int i)
  280. {
  281. u32 data_reg = PicoMem.ioports[i + 1];
  282. u32 ctrl_reg = PicoMem.ioports[i + 4] | 0x80;
  283. u32 in, out;
  284. out = data_reg & ctrl_reg;
  285. // pull-ups: should be 0x7f, but Decap Attack has a bug where it temp.
  286. // disables output before doing TH-low read, so don't emulate it for TH.
  287. // Decap Attack reportedly doesn't work on Nomad but works on must
  288. // other MD revisions (different pull-up strength?).
  289. if (PicoIn.AHW & (PAHW_32X|PAHW_MCD)) // don't do it on 32X, it breaks WWF Raw
  290. out |= 0x7f & ~ctrl_reg;
  291. else
  292. out |= 0x3f & ~ctrl_reg;
  293. in = port_readers[i](i, out);
  294. return (in & ~ctrl_reg) | (data_reg & ctrl_reg);
  295. }
  296. void PicoSetInputDevice(int port, enum input_device device)
  297. {
  298. port_read_func *func;
  299. if (port < 0 || port > 2)
  300. return;
  301. switch (device) {
  302. case PICO_INPUT_PAD_3BTN:
  303. func = read_pad_3btn;
  304. break;
  305. case PICO_INPUT_PAD_6BTN:
  306. func = read_pad_6btn;
  307. break;
  308. case PICO_INPUT_PAD_TEAM:
  309. func = read_pad_team;
  310. break;
  311. case PICO_INPUT_PAD_4WAY:
  312. func = read_pad_4way;
  313. break;
  314. default:
  315. func = read_nothing;
  316. break;
  317. }
  318. port_readers[port] = func;
  319. }
  320. NOINLINE u32 io_ports_read(u32 a)
  321. {
  322. u32 d;
  323. a = (a>>1) & 0xf;
  324. switch (a) {
  325. case 0: d = Pico.m.hardware; break; // Hardware value (Version register)
  326. case 1: d = port_read(0); break;
  327. case 2: d = port_read(1); break;
  328. case 3: d = port_read(2); break;
  329. default: d = PicoMem.ioports[a]; break; // IO ports can be used as RAM
  330. }
  331. return d;
  332. }
  333. NOINLINE void io_ports_write(u32 a, u32 d)
  334. {
  335. a = (a>>1) & 0xf;
  336. // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
  337. if (1 <= a && a <= 2)
  338. {
  339. Pico.m.padDelay[a - 1] = 0;
  340. if (port_readers[a - 1] == read_pad_team) {
  341. if (d & 0x40)
  342. Pico.m.padTHPhase[a - 1] = 0;
  343. else if ((d^PicoMem.ioports[a]) & 0x60)
  344. Pico.m.padTHPhase[a - 1]++;
  345. } else if (port_readers[a - 1] == read_pad_4way) {
  346. if (a == 2 && ((PicoMem.ioports[a] ^ d) & 0x70))
  347. Pico.m.padTHPhase[0] = 0;
  348. if (a == 1 && !(PicoMem.ioports[a] & 0x40) && (d & 0x40))
  349. Pico.m.padTHPhase[0]++;
  350. } else if (!(PicoMem.ioports[a] & 0x40) && (d & 0x40))
  351. Pico.m.padTHPhase[a - 1]++;
  352. }
  353. // certain IO ports can be used as RAM
  354. PicoMem.ioports[a] = d;
  355. }
  356. static int z80_cycles_from_68k(void)
  357. {
  358. int m68k_cnt = SekCyclesDone() - Pico.t.m68c_frame_start;
  359. return cycles_68k_to_z80(m68k_cnt);
  360. }
  361. void NOINLINE ctl_write_z80busreq(u32 d)
  362. {
  363. d&=1; d^=1;
  364. elprintf(EL_BUSREQ, "set_zrun: %i->%i [%u] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);
  365. if (d ^ Pico.m.z80Run)
  366. {
  367. if (d)
  368. {
  369. Pico.t.z80c_cnt = z80_cycles_from_68k() + 2;
  370. }
  371. else
  372. {
  373. if ((PicoIn.opt & POPT_EN_Z80) && !Pico.m.z80_reset) {
  374. pprof_start(m68k);
  375. PicoSyncZ80(SekCyclesDone());
  376. pprof_end_sub(m68k);
  377. }
  378. }
  379. Pico.m.z80Run = d;
  380. }
  381. }
  382. void NOINLINE ctl_write_z80reset(u32 d)
  383. {
  384. d&=1; d^=1;
  385. elprintf(EL_BUSREQ, "set_zreset: %i->%i [%u] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);
  386. if (d ^ Pico.m.z80_reset)
  387. {
  388. if (d)
  389. {
  390. if ((PicoIn.opt & POPT_EN_Z80) && Pico.m.z80Run) {
  391. pprof_start(m68k);
  392. PicoSyncZ80(SekCyclesDone());
  393. pprof_end_sub(m68k);
  394. }
  395. YM2612ResetChip();
  396. timers_reset();
  397. }
  398. else
  399. {
  400. Pico.t.z80c_cnt = z80_cycles_from_68k() + 2;
  401. z80_reset();
  402. }
  403. Pico.m.z80_reset = d;
  404. }
  405. }
  406. static void psg_write_68k(u32 d)
  407. {
  408. PsndDoPSG(z80_cycles_from_68k());
  409. SN76496Write(d);
  410. }
  411. static void psg_write_z80(u32 d)
  412. {
  413. PsndDoPSG(z80_cyclesDone());
  414. SN76496Write(d);
  415. }
  416. // -----------------------------------------------------------------
  417. #ifndef _ASM_MEMORY_C
  418. // cart (save) RAM area (usually 0x200000 - ...)
  419. static u32 PicoRead8_sram(u32 a)
  420. {
  421. u32 d;
  422. if (Pico.sv.start <= a && a <= Pico.sv.end && (Pico.m.sram_reg & SRR_MAPPED))
  423. {
  424. if (Pico.sv.flags & SRF_EEPROM) {
  425. d = EEPROM_read();
  426. if (!(a & 1))
  427. d >>= 8;
  428. d &= 0xff;
  429. } else
  430. d = *(u8 *)(Pico.sv.data - Pico.sv.start + a);
  431. elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);
  432. return d;
  433. }
  434. // XXX: this is banking unfriendly
  435. if (a < Pico.romsize)
  436. return Pico.rom[MEM_BE2(a)];
  437. return m68k_unmapped_read8(a);
  438. }
  439. static u32 PicoRead16_sram(u32 a)
  440. {
  441. u32 d;
  442. if (Pico.sv.start <= a && a <= Pico.sv.end && (Pico.m.sram_reg & SRR_MAPPED))
  443. {
  444. if (Pico.sv.flags & SRF_EEPROM)
  445. d = EEPROM_read();
  446. else {
  447. u8 *pm = (u8 *)(Pico.sv.data - Pico.sv.start + a);
  448. d = pm[0] << 8;
  449. d |= pm[1];
  450. }
  451. elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);
  452. return d;
  453. }
  454. if (a < Pico.romsize)
  455. return *(u16 *)(Pico.rom + a);
  456. return m68k_unmapped_read16(a);
  457. }
  458. #endif // _ASM_MEMORY_C
  459. static void PicoWrite8_sram(u32 a, u32 d)
  460. {
  461. if (a > Pico.sv.end || a < Pico.sv.start || !(Pico.m.sram_reg & SRR_MAPPED)) {
  462. m68k_unmapped_write8(a, d);
  463. return;
  464. }
  465. elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d & 0xff, SekPc);
  466. if (Pico.sv.flags & SRF_EEPROM)
  467. {
  468. EEPROM_write8(a, d);
  469. }
  470. else {
  471. u8 *pm = (u8 *)(Pico.sv.data - Pico.sv.start + a);
  472. if (*pm != (u8)d) {
  473. Pico.sv.changed = 1;
  474. *pm = (u8)d;
  475. }
  476. }
  477. }
  478. static void PicoWrite16_sram(u32 a, u32 d)
  479. {
  480. if (a > Pico.sv.end || a < Pico.sv.start || !(Pico.m.sram_reg & SRR_MAPPED)) {
  481. m68k_unmapped_write16(a, d);
  482. return;
  483. }
  484. elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d & 0xffff, SekPc);
  485. if (Pico.sv.flags & SRF_EEPROM)
  486. {
  487. EEPROM_write16(d);
  488. }
  489. else {
  490. u8 *pm = (u8 *)(Pico.sv.data - Pico.sv.start + a);
  491. if (pm[0] != (u8)(d >> 8)) {
  492. Pico.sv.changed = 1;
  493. pm[0] = (u8)(d >> 8);
  494. }
  495. if (pm[1] != (u8)d) {
  496. Pico.sv.changed = 1;
  497. pm[1] = (u8)d;
  498. }
  499. }
  500. }
  501. // z80 area (0xa00000 - 0xa0ffff)
  502. // TODO: verify mirrors VDP and bank reg (bank area mirroring verified)
  503. static u32 PicoRead8_z80(u32 a)
  504. {
  505. u32 d = 0xff;
  506. if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {
  507. elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);
  508. // open bus. Pulled down if MegaCD2 is attached.
  509. return 0;
  510. }
  511. if ((a & 0x4000) == 0x0000)
  512. d = PicoMem.zram[a & 0x1fff];
  513. else if ((a & 0x6000) == 0x4000) // 0x4000-0x5fff
  514. d = ym2612_read_local_68k();
  515. else
  516. elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
  517. return d;
  518. }
  519. static u32 PicoRead16_z80(u32 a)
  520. {
  521. u32 d = PicoRead8_z80(a);
  522. return d | (d << 8);
  523. }
  524. static void PicoWrite8_z80(u32 a, u32 d)
  525. {
  526. if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {
  527. // verified on real hw
  528. elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);
  529. return;
  530. }
  531. if ((a & 0x4000) == 0x0000) { // z80 RAM
  532. PicoMem.zram[a & 0x1fff] = (u8)d;
  533. return;
  534. }
  535. if ((a & 0x6000) == 0x4000) { // FM Sound
  536. if (PicoIn.opt & POPT_EN_FM)
  537. ym2612_write_local(a & 3, d & 0xff, 0);
  538. return;
  539. }
  540. // TODO: probably other VDP access too? Maybe more mirrors?
  541. if ((a & 0x7ff9) == 0x7f11) { // PSG Sound
  542. psg_write_68k(d);
  543. return;
  544. }
  545. if ((a & 0x7f00) == 0x6000) // Z80 BANK register
  546. {
  547. Pico.m.z80_bank68k >>= 1;
  548. Pico.m.z80_bank68k |= d << 8;
  549. Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one
  550. elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k << 15);
  551. return;
  552. }
  553. elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @ %06x", a, d&0xff, SekPc);
  554. }
  555. static void PicoWrite16_z80(u32 a, u32 d)
  556. {
  557. // for RAM, only most significant byte is sent
  558. // TODO: verify remaining accesses
  559. PicoWrite8_z80(a, d >> 8);
  560. }
  561. #ifndef _ASM_MEMORY_C
  562. // IO/control area (0xa10000 - 0xa1ffff)
  563. u32 PicoRead8_io(u32 a)
  564. {
  565. u32 d;
  566. if ((a & 0xffe0) == 0x0000) { // I/O ports
  567. d = io_ports_read(a);
  568. goto end;
  569. }
  570. // faking open bus (MegaCD pulldowns don't work here curiously)
  571. d = Pico.m.rotate++;
  572. d ^= d << 6;
  573. if ((a & 0xfc00) == 0x1000) {
  574. // bit8 seems to be readable in this range
  575. if (!(a & 1))
  576. d &= ~0x01;
  577. if ((a & 0xff01) == 0x1100) { // z80 busreq (verified)
  578. d |= (Pico.m.z80Run | Pico.m.z80_reset) & 1;
  579. elprintf(EL_BUSREQ, "get_zrun: %02x [%u] @%06x", d, SekCyclesDone(), SekPc);
  580. }
  581. goto end;
  582. }
  583. d = PicoRead8_32x(a);
  584. end:
  585. return d;
  586. }
  587. u32 PicoRead16_io(u32 a)
  588. {
  589. u32 d;
  590. if ((a & 0xffe0) == 0x0000) { // I/O ports
  591. d = io_ports_read(a);
  592. d |= d << 8;
  593. goto end;
  594. }
  595. // faking open bus
  596. d = (Pico.m.rotate += 0x41);
  597. d ^= (d << 5) ^ (d << 8);
  598. // bit8 seems to be readable in this range
  599. if ((a & 0xfc00) == 0x1000) {
  600. d &= ~0x0100;
  601. if ((a & 0xff00) == 0x1100) { // z80 busreq
  602. d |= ((Pico.m.z80Run | Pico.m.z80_reset) & 1) << 8;
  603. elprintf(EL_BUSREQ, "get_zrun: %04x [%u] @%06x", d, SekCyclesDone(), SekPc);
  604. }
  605. goto end;
  606. }
  607. d = PicoRead16_32x(a);
  608. end:
  609. return d;
  610. }
  611. void PicoWrite8_io(u32 a, u32 d)
  612. {
  613. if ((a & 0xffe1) == 0x0001) { // I/O ports (verified: only LSB!)
  614. io_ports_write(a, d);
  615. return;
  616. }
  617. if ((a & 0xff01) == 0x1100) { // z80 busreq
  618. ctl_write_z80busreq(d);
  619. return;
  620. }
  621. if ((a & 0xff01) == 0x1200) { // z80 reset
  622. ctl_write_z80reset(d);
  623. return;
  624. }
  625. if (a == 0xa130f1) { // sram access register
  626. elprintf(EL_SRAMIO, "sram reg=%02x", d);
  627. Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);
  628. Pico.m.sram_reg |= (u8)(d & 3);
  629. return;
  630. }
  631. PicoWrite8_32x(a, d);
  632. }
  633. void PicoWrite16_io(u32 a, u32 d)
  634. {
  635. if ((a & 0xffe0) == 0x0000) { // I/O ports (verified: only LSB!)
  636. io_ports_write(a, d);
  637. return;
  638. }
  639. if ((a & 0xff00) == 0x1100) { // z80 busreq
  640. ctl_write_z80busreq(d >> 8);
  641. return;
  642. }
  643. if ((a & 0xff00) == 0x1200) { // z80 reset
  644. ctl_write_z80reset(d >> 8);
  645. return;
  646. }
  647. if (a == 0xa130f0) { // sram access register
  648. elprintf(EL_SRAMIO, "sram reg=%02x", d);
  649. Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);
  650. Pico.m.sram_reg |= (u8)(d & 3);
  651. return;
  652. }
  653. PicoWrite16_32x(a, d);
  654. }
  655. #endif // _ASM_MEMORY_C
  656. // VDP area (0xc00000 - 0xdfffff)
  657. // TODO: verify if lower byte goes to PSG on word writes
  658. u32 PicoRead8_vdp(u32 a)
  659. {
  660. if ((a & 0x00f0) == 0x0000) {
  661. switch (a & 0x0d)
  662. {
  663. case 0x00: return PicoVideoRead8DataH(0);
  664. case 0x01: return PicoVideoRead8DataL(0);
  665. case 0x04: return PicoVideoRead8CtlH(0);
  666. case 0x05: return PicoVideoRead8CtlL(0);
  667. case 0x08:
  668. case 0x0c: return PicoVideoRead8HV_H(0);
  669. case 0x09:
  670. case 0x0d: return PicoVideoRead8HV_L(0);
  671. }
  672. }
  673. elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
  674. return 0;
  675. }
  676. static u32 PicoRead16_vdp(u32 a)
  677. {
  678. if ((a & 0x00e0) == 0x0000)
  679. return PicoVideoRead(a);
  680. elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
  681. return 0;
  682. }
  683. static void PicoWrite8_vdp(u32 a, u32 d)
  684. {
  685. if ((a & 0x00f9) == 0x0011) { // PSG Sound
  686. psg_write_68k(d);
  687. return;
  688. }
  689. if ((a & 0x00e0) == 0x0000) {
  690. d &= 0xff;
  691. PicoVideoWrite(a, d | (d << 8));
  692. return;
  693. }
  694. elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @%06x", a, d & 0xff, SekPc);
  695. }
  696. static void PicoWrite16_vdp(u32 a, u32 d)
  697. {
  698. if ((a & 0x00f9) == 0x0010) { // PSG Sound
  699. psg_write_68k(d);
  700. return;
  701. }
  702. if ((a & 0x00e0) == 0x0000) {
  703. PicoVideoWrite(a, d);
  704. return;
  705. }
  706. elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %04x @%06x", a, d & 0xffff, SekPc);
  707. }
  708. // -----------------------------------------------------------------
  709. #ifdef EMU_M68K
  710. static void m68k_mem_setup(void);
  711. #endif
  712. PICO_INTERNAL void PicoMemSetup(void)
  713. {
  714. int mask, rs, sstart, a;
  715. // setup the memory map
  716. cpu68k_map_set(m68k_read8_map, 0x000000, 0xffffff, m68k_unmapped_read8, 1);
  717. cpu68k_map_set(m68k_read16_map, 0x000000, 0xffffff, m68k_unmapped_read16, 1);
  718. cpu68k_map_set(m68k_write8_map, 0x000000, 0xffffff, m68k_unmapped_write8, 1);
  719. cpu68k_map_set(m68k_write16_map, 0x000000, 0xffffff, m68k_unmapped_write16, 1);
  720. // ROM
  721. // align to bank size. We know ROM loader allocated enough for this
  722. mask = (1 << M68K_MEM_SHIFT) - 1;
  723. rs = (Pico.romsize + mask) & ~mask;
  724. if (rs > 0x400000) rs = 0x400000; // max cartridge area
  725. cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico.rom, 0);
  726. cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico.rom, 0);
  727. // Common case of on-cart (save) RAM, usually at 0x200000-...
  728. if ((Pico.sv.flags & SRF_ENABLED) && Pico.sv.data != NULL) {
  729. sstart = Pico.sv.start & ~mask;
  730. rs = Pico.sv.end - sstart;
  731. rs = (rs + mask) & ~mask;
  732. if (sstart + rs >= 0x1000000)
  733. rs = 0x1000000 - sstart;
  734. cpu68k_map_set(m68k_read8_map, sstart, sstart + rs - 1, PicoRead8_sram, 1);
  735. cpu68k_map_set(m68k_read16_map, sstart, sstart + rs - 1, PicoRead16_sram, 1);
  736. cpu68k_map_set(m68k_write8_map, sstart, sstart + rs - 1, PicoWrite8_sram, 1);
  737. cpu68k_map_set(m68k_write16_map, sstart, sstart + rs - 1, PicoWrite16_sram, 1);
  738. }
  739. // Z80 region
  740. cpu68k_map_set(m68k_read8_map, 0xa00000, 0xa0ffff, PicoRead8_z80, 1);
  741. cpu68k_map_set(m68k_read16_map, 0xa00000, 0xa0ffff, PicoRead16_z80, 1);
  742. cpu68k_map_set(m68k_write8_map, 0xa00000, 0xa0ffff, PicoWrite8_z80, 1);
  743. cpu68k_map_set(m68k_write16_map, 0xa00000, 0xa0ffff, PicoWrite16_z80, 1);
  744. // IO/control region
  745. cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_io, 1);
  746. cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_io, 1);
  747. cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_io, 1);
  748. cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_io, 1);
  749. // VDP region
  750. for (a = 0xc00000; a < 0xe00000; a += 0x010000) {
  751. if ((a & 0xe700e0) != 0xc00000)
  752. continue;
  753. cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoRead8_vdp, 1);
  754. cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoRead16_vdp, 1);
  755. cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoWrite8_vdp, 1);
  756. cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoWrite16_vdp, 1);
  757. }
  758. // RAM and it's mirrors
  759. for (a = 0xe00000; a < 0x1000000; a += 0x010000) {
  760. cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoMem.ram, 0);
  761. cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoMem.ram, 0);
  762. cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoMem.ram, 0);
  763. cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoMem.ram, 0);
  764. }
  765. // Setup memory callbacks:
  766. #ifdef EMU_C68K
  767. PicoCpuCM68k.read8 = (void *)m68k_read8_map;
  768. PicoCpuCM68k.read16 = (void *)m68k_read16_map;
  769. PicoCpuCM68k.read32 = (void *)m68k_read16_map;
  770. PicoCpuCM68k.write8 = (void *)m68k_write8_map;
  771. PicoCpuCM68k.write16 = (void *)m68k_write16_map;
  772. PicoCpuCM68k.write32 = (void *)m68k_write16_map;
  773. PicoCpuCM68k.checkpc = NULL; /* unused */
  774. PicoCpuCM68k.fetch8 = NULL;
  775. PicoCpuCM68k.fetch16 = NULL;
  776. PicoCpuCM68k.fetch32 = NULL;
  777. #endif
  778. #ifdef EMU_F68K
  779. PicoCpuFM68k.read_byte = (void *)m68k_read8;
  780. PicoCpuFM68k.read_word = (void *)m68k_read16;
  781. PicoCpuFM68k.read_long = (void *)m68k_read32;
  782. PicoCpuFM68k.write_byte = (void *)m68k_write8;
  783. PicoCpuFM68k.write_word = (void *)m68k_write16;
  784. PicoCpuFM68k.write_long = (void *)m68k_write32;
  785. // setup FAME fetchmap
  786. {
  787. int i;
  788. // by default, point everything to first 64k of ROM
  789. for (i = 0; i < M68K_FETCHBANK1 * 0xe0 / 0x100; i++)
  790. PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
  791. // now real ROM
  792. for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
  793. PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom;
  794. // RAM already set
  795. }
  796. #endif
  797. #ifdef EMU_M68K
  798. m68k_mem_setup();
  799. #endif
  800. z80_mem_setup();
  801. }
  802. #ifdef EMU_M68K
  803. unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;
  804. unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;
  805. unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL;
  806. void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;
  807. void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;
  808. void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;
  809. /* it appears that Musashi doesn't always mask the unused bits */
  810. unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }
  811. unsigned int m68k_read_memory_16(unsigned int address) { return pm68k_read_memory_16(address) & 0xffff; }
  812. unsigned int m68k_read_memory_32(unsigned int address) { return pm68k_read_memory_32(address); }
  813. void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }
  814. void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }
  815. void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }
  816. static void m68k_mem_setup(void)
  817. {
  818. pm68k_read_memory_8 = m68k_read8;
  819. pm68k_read_memory_16 = m68k_read16;
  820. pm68k_read_memory_32 = m68k_read32;
  821. pm68k_write_memory_8 = m68k_write8;
  822. pm68k_write_memory_16 = m68k_write16;
  823. pm68k_write_memory_32 = m68k_write32;
  824. }
  825. #endif // EMU_M68K
  826. // -----------------------------------------------------------------
  827. static int get_scanline(int is_from_z80)
  828. {
  829. if (is_from_z80) {
  830. int mclk_z80 = (z80_cyclesLeft<0 ? Pico.t.z80c_aim : z80_cyclesDone()) * 15;
  831. int mclk_line = Pico.t.z80_scanline * 488 * 7;
  832. while (mclk_z80 - mclk_line >= 488 * 7)
  833. Pico.t.z80_scanline++, mclk_line += 488 * 7;
  834. return Pico.t.z80_scanline;
  835. }
  836. return Pico.m.scanline;
  837. }
  838. /* probably should not be in this file, but it's near related code here */
  839. void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new)
  840. {
  841. int xcycles = z80_cycles << 8;
  842. /* check for overflows */
  843. if ((mode_old & 4) && xcycles >= Pico.t.timer_a_next_oflow)
  844. ym2612.OPN.ST.status |= 1;
  845. if ((mode_old & 8) && xcycles >= Pico.t.timer_b_next_oflow)
  846. ym2612.OPN.ST.status |= 2;
  847. /* update timer a */
  848. if (mode_old & 1)
  849. while (xcycles > Pico.t.timer_a_next_oflow)
  850. Pico.t.timer_a_next_oflow += Pico.t.timer_a_step;
  851. if ((mode_old ^ mode_new) & 1) // turning on/off
  852. {
  853. if (mode_old & 1)
  854. Pico.t.timer_a_next_oflow = TIMER_NO_OFLOW;
  855. else
  856. Pico.t.timer_a_next_oflow = xcycles + Pico.t.timer_a_step;
  857. }
  858. if (mode_new & 1)
  859. elprintf(EL_YMTIMER, "timer a upd to %i @ %i", Pico.t.timer_a_next_oflow>>8, z80_cycles);
  860. /* update timer b */
  861. if (mode_old & 2)
  862. while (xcycles > Pico.t.timer_b_next_oflow)
  863. Pico.t.timer_b_next_oflow += Pico.t.timer_b_step;
  864. if ((mode_old ^ mode_new) & 2)
  865. {
  866. if (mode_old & 2)
  867. Pico.t.timer_b_next_oflow = TIMER_NO_OFLOW;
  868. else
  869. Pico.t.timer_b_next_oflow = xcycles + Pico.t.timer_b_step;
  870. }
  871. if (mode_new & 2)
  872. elprintf(EL_YMTIMER, "timer b upd to %i @ %i", Pico.t.timer_b_next_oflow>>8, z80_cycles);
  873. }
  874. // ym2612 DAC and timer I/O handlers for z80
  875. static int ym2612_write_local(u32 a, u32 d, int is_from_z80)
  876. {
  877. int addr;
  878. a &= 3;
  879. if (a == 1 && ym2612.OPN.ST.address == 0x2a) /* DAC data */
  880. {
  881. int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();
  882. //elprintf(EL_STATUS, "%03i dac w %08x z80 %i", cycles, d, is_from_z80);
  883. if (ym2612.dacen)
  884. PsndDoDAC(cycles);
  885. ym2612.dacout = ((int)d - 0x80) << 6;
  886. return 0;
  887. }
  888. switch (a)
  889. {
  890. case 0: /* address port 0 */
  891. ym2612.OPN.ST.address = d;
  892. ym2612.addr_A1 = 0;
  893. #ifdef __GP2X__
  894. if (PicoIn.opt & POPT_EXT_FM) YM2612Write_940(a, d, -1);
  895. #endif
  896. return 0;
  897. case 1: /* data port 0 */
  898. if (ym2612.addr_A1 != 0)
  899. return 0;
  900. addr = ym2612.OPN.ST.address;
  901. ym2612.REGS[addr] = d;
  902. switch (addr)
  903. {
  904. case 0x24: // timer A High 8
  905. case 0x25: { // timer A Low 2
  906. int TAnew = (addr == 0x24) ? ((ym2612.OPN.ST.TA & 0x03)|(((int)d)<<2))
  907. : ((ym2612.OPN.ST.TA & 0x3fc)|(d&3));
  908. if (ym2612.OPN.ST.TA != TAnew)
  909. {
  910. //elprintf(EL_STATUS, "timer a set %i", TAnew);
  911. ym2612.OPN.ST.TA = TAnew;
  912. //ym2612.OPN.ST.TAC = (1024-TAnew)*18;
  913. //ym2612.OPN.ST.TAT = 0;
  914. Pico.t.timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);
  915. if (ym2612.OPN.ST.mode & 1) {
  916. // this is not right, should really be done on overflow only
  917. int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();
  918. Pico.t.timer_a_next_oflow = (cycles << 8) + Pico.t.timer_a_step;
  919. }
  920. elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, Pico.t.timer_a_next_oflow>>8);
  921. }
  922. return 0;
  923. }
  924. case 0x26: // timer B
  925. if (ym2612.OPN.ST.TB != d) {
  926. //elprintf(EL_STATUS, "timer b set %i", d);
  927. ym2612.OPN.ST.TB = d;
  928. //ym2612.OPN.ST.TBC = (256-d) * 288;
  929. //ym2612.OPN.ST.TBT = 0;
  930. Pico.t.timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800
  931. if (ym2612.OPN.ST.mode & 2) {
  932. int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();
  933. Pico.t.timer_b_next_oflow = (cycles << 8) + Pico.t.timer_b_step;
  934. }
  935. elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, Pico.t.timer_b_next_oflow>>8);
  936. }
  937. return 0;
  938. case 0x27: { /* mode, timer control */
  939. int old_mode = ym2612.OPN.ST.mode;
  940. int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();
  941. ym2612.OPN.ST.mode = d;
  942. elprintf(EL_YMTIMER, "st mode %02x", d);
  943. ym2612_sync_timers(cycles, old_mode, d);
  944. /* reset Timer a flag */
  945. if (d & 0x10)
  946. ym2612.OPN.ST.status &= ~1;
  947. /* reset Timer b flag */
  948. if (d & 0x20)
  949. ym2612.OPN.ST.status &= ~2;
  950. if ((d ^ old_mode) & 0xc0) {
  951. #ifdef __GP2X__
  952. if (PicoIn.opt & POPT_EXT_FM) return YM2612Write_940(a, d, get_scanline(is_from_z80));
  953. #endif
  954. PsndDoFM(cycles);
  955. return 1;
  956. }
  957. return 0;
  958. }
  959. case 0x2b: { /* DAC Sel (YM2612) */
  960. ym2612.dacen = d & 0x80;
  961. #ifdef __GP2X__
  962. if (PicoIn.opt & POPT_EXT_FM) YM2612Write_940(a, d, get_scanline(is_from_z80));
  963. #endif
  964. return 0;
  965. }
  966. }
  967. break;
  968. case 2: /* address port 1 */
  969. ym2612.OPN.ST.address = d;
  970. ym2612.addr_A1 = 1;
  971. #ifdef __GP2X__
  972. if (PicoIn.opt & POPT_EXT_FM) YM2612Write_940(a, d, -1);
  973. #endif
  974. return 0;
  975. case 3: /* data port 1 */
  976. if (ym2612.addr_A1 != 1)
  977. return 0;
  978. addr = ym2612.OPN.ST.address | 0x100;
  979. ym2612.REGS[addr] = d;
  980. break;
  981. }
  982. #ifdef __GP2X__
  983. if (PicoIn.opt & POPT_EXT_FM)
  984. return YM2612Write_940(a, d, get_scanline(is_from_z80));
  985. #endif
  986. PsndDoFM(is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k());
  987. return YM2612Write_(a, d);
  988. }
  989. #define ym2612_read_local() \
  990. if (xcycles >= Pico.t.timer_a_next_oflow) \
  991. ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 1; \
  992. if (xcycles >= Pico.t.timer_b_next_oflow) \
  993. ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2
  994. static u32 ym2612_read_local_z80(void)
  995. {
  996. int xcycles = z80_cyclesDone() << 8;
  997. ym2612_read_local();
  998. elprintf(EL_YMTIMER, "timer z80 read %i, sched %i, %i @ %i|%i",
  999. ym2612.OPN.ST.status, Pico.t.timer_a_next_oflow >> 8,
  1000. Pico.t.timer_b_next_oflow >> 8, xcycles >> 8, (xcycles >> 8) / 228);
  1001. return ym2612.OPN.ST.status;
  1002. }
  1003. static u32 ym2612_read_local_68k(void)
  1004. {
  1005. int xcycles = z80_cycles_from_68k() << 8;
  1006. ym2612_read_local();
  1007. elprintf(EL_YMTIMER, "timer 68k read %i, sched %i, %i @ %i|%i",
  1008. ym2612.OPN.ST.status, Pico.t.timer_a_next_oflow >> 8,
  1009. Pico.t.timer_b_next_oflow >> 8, xcycles >> 8, (xcycles >> 8) / 228);
  1010. return ym2612.OPN.ST.status;
  1011. }
  1012. void ym2612_pack_state(void)
  1013. {
  1014. // timers are saved as tick counts, in 16.16 int format
  1015. int tac, tat = 0, tbc, tbt = 0;
  1016. tac = 1024 - ym2612.OPN.ST.TA;
  1017. tbc = 256 - ym2612.OPN.ST.TB;
  1018. if (Pico.t.timer_a_next_oflow != TIMER_NO_OFLOW)
  1019. tat = (int)((double)(Pico.t.timer_a_step - Pico.t.timer_a_next_oflow)
  1020. / (double)Pico.t.timer_a_step * tac * 65536);
  1021. if (Pico.t.timer_b_next_oflow != TIMER_NO_OFLOW)
  1022. tbt = (int)((double)(Pico.t.timer_b_step - Pico.t.timer_b_next_oflow)
  1023. / (double)Pico.t.timer_b_step * tbc * 65536);
  1024. elprintf(EL_YMTIMER, "save: timer a %i/%i", tat >> 16, tac);
  1025. elprintf(EL_YMTIMER, "save: timer b %i/%i", tbt >> 16, tbc);
  1026. #ifdef __GP2X__
  1027. if (PicoIn.opt & POPT_EXT_FM)
  1028. YM2612PicoStateSave2_940(tat, tbt);
  1029. else
  1030. #endif
  1031. YM2612PicoStateSave2(tat, tbt);
  1032. }
  1033. void ym2612_unpack_state(void)
  1034. {
  1035. int i, ret, tac, tat, tbc, tbt;
  1036. YM2612PicoStateLoad();
  1037. // feed all the registers and update internal state
  1038. for (i = 0x20; i < 0xA0; i++) {
  1039. ym2612_write_local(0, i, 0);
  1040. ym2612_write_local(1, ym2612.REGS[i], 0);
  1041. }
  1042. for (i = 0x30; i < 0xA0; i++) {
  1043. ym2612_write_local(2, i, 0);
  1044. ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
  1045. }
  1046. for (i = 0xAF; i >= 0xA0; i--) { // must apply backwards
  1047. ym2612_write_local(2, i, 0);
  1048. ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
  1049. ym2612_write_local(0, i, 0);
  1050. ym2612_write_local(1, ym2612.REGS[i], 0);
  1051. }
  1052. for (i = 0xB0; i < 0xB8; i++) {
  1053. ym2612_write_local(0, i, 0);
  1054. ym2612_write_local(1, ym2612.REGS[i], 0);
  1055. ym2612_write_local(2, i, 0);
  1056. ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
  1057. }
  1058. #ifdef __GP2X__
  1059. if (PicoIn.opt & POPT_EXT_FM)
  1060. ret = YM2612PicoStateLoad2_940(&tat, &tbt);
  1061. else
  1062. #endif
  1063. ret = YM2612PicoStateLoad2(&tat, &tbt);
  1064. if (ret != 0) {
  1065. elprintf(EL_STATUS, "old ym2612 state");
  1066. return; // no saved timers
  1067. }
  1068. tac = (1024 - ym2612.OPN.ST.TA) << 16;
  1069. tbc = (256 - ym2612.OPN.ST.TB) << 16;
  1070. if (ym2612.OPN.ST.mode & 1)
  1071. Pico.t.timer_a_next_oflow = (int)((double)(tac - tat) / (double)tac * Pico.t.timer_a_step);
  1072. else
  1073. Pico.t.timer_a_next_oflow = TIMER_NO_OFLOW;
  1074. if (ym2612.OPN.ST.mode & 2)
  1075. Pico.t.timer_b_next_oflow = (int)((double)(tbc - tbt) / (double)tbc * Pico.t.timer_b_step);
  1076. else
  1077. Pico.t.timer_b_next_oflow = TIMER_NO_OFLOW;
  1078. elprintf(EL_YMTIMER, "load: %i/%i, timer_a_next_oflow %i", tat>>16, tac>>16, Pico.t.timer_a_next_oflow >> 8);
  1079. elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, Pico.t.timer_b_next_oflow >> 8);
  1080. }
  1081. #if defined(NO_32X) && defined(_ASM_MEMORY_C)
  1082. // referenced by asm code
  1083. u32 PicoRead8_32x(u32 a) { return 0; }
  1084. u32 PicoRead16_32x(u32 a) { return 0; }
  1085. void PicoWrite8_32x(u32 a, u32 d) {}
  1086. void PicoWrite16_32x(u32 a, u32 d) {}
  1087. #endif
  1088. // -----------------------------------------------------------------
  1089. // z80 memhandlers
  1090. static unsigned char z80_md_vdp_read(unsigned short a)
  1091. {
  1092. z80_subCLeft(2);
  1093. if ((a & 0x00f0) == 0x0000) {
  1094. switch (a & 0x0d)
  1095. {
  1096. case 0x00: return PicoVideoRead8DataH(1);
  1097. case 0x01: return PicoVideoRead8DataL(1);
  1098. case 0x04: return PicoVideoRead8CtlH(1);
  1099. case 0x05: return PicoVideoRead8CtlL(1);
  1100. case 0x08:
  1101. case 0x0c: return get_scanline(1); // FIXME: make it proper
  1102. case 0x09:
  1103. case 0x0d: return Pico.m.rotate++;
  1104. }
  1105. }
  1106. elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, 0xff);
  1107. return 0xff;
  1108. }
  1109. static unsigned char z80_md_bank_read(unsigned short a)
  1110. {
  1111. unsigned int addr68k;
  1112. unsigned char ret;
  1113. z80_subCLeft(3);
  1114. addr68k = Pico.m.z80_bank68k << 15;
  1115. addr68k |= a & 0x7fff;
  1116. ret = m68k_read8(addr68k);
  1117. elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);
  1118. return ret;
  1119. }
  1120. static void z80_md_ym2612_write(unsigned int a, unsigned char data)
  1121. {
  1122. if (PicoIn.opt & POPT_EN_FM)
  1123. ym2612_write_local(a, data, 1);
  1124. }
  1125. static void z80_md_vdp_br_write(unsigned int a, unsigned char data)
  1126. {
  1127. if ((a&0xfff9) == 0x7f11) // 7f11 7f13 7f15 7f17
  1128. {
  1129. psg_write_z80(data);
  1130. return;
  1131. }
  1132. // at least VDP data writes hang my machine
  1133. if ((a>>8) == 0x60)
  1134. {
  1135. Pico.m.z80_bank68k >>= 1;
  1136. Pico.m.z80_bank68k |= data << 8;
  1137. Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one
  1138. return;
  1139. }
  1140. elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);
  1141. }
  1142. static void z80_md_bank_write(unsigned int a, unsigned char data)
  1143. {
  1144. unsigned int addr68k;
  1145. addr68k = Pico.m.z80_bank68k << 15;
  1146. addr68k += a & 0x7fff;
  1147. elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);
  1148. m68k_write8(addr68k, data);
  1149. }
  1150. // -----------------------------------------------------------------
  1151. static unsigned char z80_md_in(unsigned short p)
  1152. {
  1153. elprintf(EL_ANOMALY, "Z80 port %04x read", p);
  1154. return 0xff;
  1155. }
  1156. static void z80_md_out(unsigned short p, unsigned char d)
  1157. {
  1158. elprintf(EL_ANOMALY, "Z80 port %04x write %02x", p, d);
  1159. }
  1160. static void z80_mem_setup(void)
  1161. {
  1162. z80_map_set(z80_read_map, 0x0000, 0x1fff, PicoMem.zram, 0);
  1163. z80_map_set(z80_read_map, 0x2000, 0x3fff, PicoMem.zram, 0);
  1164. z80_map_set(z80_read_map, 0x4000, 0x5fff, ym2612_read_local_z80, 1);
  1165. z80_map_set(z80_read_map, 0x6000, 0x7fff, z80_md_vdp_read, 1);
  1166. z80_map_set(z80_read_map, 0x8000, 0xffff, z80_md_bank_read, 1);
  1167. z80_map_set(z80_write_map, 0x0000, 0x1fff, PicoMem.zram, 0);
  1168. z80_map_set(z80_write_map, 0x2000, 0x3fff, PicoMem.zram, 0);
  1169. z80_map_set(z80_write_map, 0x4000, 0x5fff, z80_md_ym2612_write, 1);
  1170. z80_map_set(z80_write_map, 0x6000, 0x7fff, z80_md_vdp_br_write, 1);
  1171. z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write, 1);
  1172. #ifdef _USE_DRZ80
  1173. drZ80.z80_in = z80_md_in;
  1174. drZ80.z80_out = z80_md_out;
  1175. #endif
  1176. #ifdef _USE_CZ80
  1177. Cz80_Set_INPort(&CZ80, z80_md_in);
  1178. Cz80_Set_OUTPort(&CZ80, z80_md_out);
  1179. #endif
  1180. }
  1181. // vim:shiftwidth=2:ts=2:expandtab