memory.c 37 KB

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  1. /*
  2. * Memory I/O handlers for Sega/Mega CD.
  3. * (C) notaz, 2007-2009
  4. *
  5. * This work is licensed under the terms of MAME license.
  6. * See COPYING file in the top-level directory.
  7. */
  8. #include "../pico_int.h"
  9. #include "../memory.h"
  10. uptr s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];
  11. uptr s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];
  12. uptr s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];
  13. uptr s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];
  14. #ifndef _ASM_CD_MEMORY_C
  15. MAKE_68K_READ8(s68k_read8, s68k_read8_map)
  16. MAKE_68K_READ16(s68k_read16, s68k_read16_map)
  17. MAKE_68K_READ32(s68k_read32, s68k_read16_map)
  18. MAKE_68K_WRITE8(s68k_write8, s68k_write8_map)
  19. MAKE_68K_WRITE16(s68k_write16, s68k_write16_map)
  20. MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)
  21. #endif
  22. // -----------------------------------------------------------------
  23. // provided by ASM code:
  24. #ifdef _ASM_CD_MEMORY_C
  25. u32 PicoReadS68k8_pr(u32 a);
  26. u32 PicoReadS68k16_pr(u32 a);
  27. void PicoWriteS68k8_pr(u32 a, u32 d);
  28. void PicoWriteS68k16_pr(u32 a, u32 d);
  29. u32 PicoReadM68k8_cell0(u32 a);
  30. u32 PicoReadM68k8_cell1(u32 a);
  31. u32 PicoReadM68k16_cell0(u32 a);
  32. u32 PicoReadM68k16_cell1(u32 a);
  33. void PicoWriteM68k8_cell0(u32 a, u32 d);
  34. void PicoWriteM68k8_cell1(u32 a, u32 d);
  35. void PicoWriteM68k16_cell0(u32 a, u32 d);
  36. void PicoWriteM68k16_cell1(u32 a, u32 d);
  37. u32 PicoReadS68k8_dec0(u32 a);
  38. u32 PicoReadS68k8_dec1(u32 a);
  39. u32 PicoReadS68k16_dec0(u32 a);
  40. u32 PicoReadS68k16_dec1(u32 a);
  41. void PicoWriteS68k8_dec_m0b0(u32 a, u32 d);
  42. void PicoWriteS68k8_dec_m1b0(u32 a, u32 d);
  43. void PicoWriteS68k8_dec_m2b0(u32 a, u32 d);
  44. void PicoWriteS68k8_dec_m0b1(u32 a, u32 d);
  45. void PicoWriteS68k8_dec_m1b1(u32 a, u32 d);
  46. void PicoWriteS68k8_dec_m2b1(u32 a, u32 d);
  47. void PicoWriteS68k16_dec_m0b0(u32 a, u32 d);
  48. void PicoWriteS68k16_dec_m1b0(u32 a, u32 d);
  49. void PicoWriteS68k16_dec_m2b0(u32 a, u32 d);
  50. void PicoWriteS68k16_dec_m0b1(u32 a, u32 d);
  51. void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);
  52. void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);
  53. #endif
  54. static void remap_prg_window(u32 r1, u32 r3);
  55. static void remap_word_ram(u32 r3);
  56. // poller detection
  57. #define POLL_LIMIT 16
  58. #define POLL_CYCLES 64
  59. void m68k_comm_check(u32 a)
  60. {
  61. u32 cycles = SekCyclesDone();
  62. u32 clkdiff = cycles - Pico_mcd->m.m68k_poll_clk;
  63. pcd_sync_s68k(cycles, 0);
  64. if (a >= 0x0e && !Pico_mcd->m.need_sync) {
  65. // there are cases when slave updates comm and only switches RAM
  66. // over after that (mcd1b), so there must be a resync..
  67. SekEndRun(64);
  68. Pico_mcd->m.need_sync = 1;
  69. }
  70. Pico_mcd->m.m68k_poll_clk = cycles;
  71. if (SekNotPolling || a != Pico_mcd->m.m68k_poll_a || clkdiff > POLL_CYCLES || clkdiff <= 16) {
  72. Pico_mcd->m.m68k_poll_a = a;
  73. Pico_mcd->m.m68k_poll_cnt = 0;
  74. SekNotPolling = 0;
  75. return;
  76. }
  77. Pico_mcd->m.m68k_poll_cnt++;
  78. if(Pico_mcd->m.m68k_poll_cnt == POLL_LIMIT)
  79. SekEndRun(0);
  80. }
  81. #ifndef _ASM_CD_MEMORY_C
  82. static u32 m68k_reg_read16(u32 a)
  83. {
  84. u32 d = 0;
  85. a &= 0x3e;
  86. switch (a) {
  87. case 0:
  88. // here IFL2 is always 0, just like in Gens
  89. d = ((Pico_mcd->s68k_regs[0x33] << 13) & 0x8000)
  90. | Pico_mcd->m.busreq;
  91. goto end;
  92. case 2:
  93. m68k_comm_check(a);
  94. d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
  95. elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);
  96. goto end;
  97. case 4:
  98. d = Pico_mcd->s68k_regs[4]<<8;
  99. goto end;
  100. case 6:
  101. d = *(u16 *)(Pico_mcd->bios + 0x72);
  102. goto end;
  103. case 8:
  104. d = cdc_host_r();
  105. goto end;
  106. case 0xA:
  107. elprintf(EL_UIO, "m68k FIXME: reserved read");
  108. goto end;
  109. case 0xC: // 384 cycle stopwatch timer
  110. // ugh..
  111. d = pcd_cycles_m68k_to_s68k(SekCyclesDone());
  112. d = (d - Pico_mcd->m.stopwatch_base_c) / 384;
  113. d &= 0x0fff;
  114. elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);
  115. goto end;
  116. }
  117. if (a < 0x30) {
  118. // comm flag/cmd/status (0xE-0x2F)
  119. m68k_comm_check(a);
  120. d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
  121. goto end;
  122. }
  123. elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);
  124. end:
  125. return d;
  126. }
  127. #endif
  128. #ifndef _ASM_CD_MEMORY_C
  129. static
  130. #endif
  131. void m68k_reg_write8(u32 a, u32 d)
  132. {
  133. u32 dold;
  134. a &= 0x3f;
  135. Pico_mcd->m.m68k_poll_cnt = 0;
  136. switch (a) {
  137. case 0:
  138. d &= 1;
  139. if (d && (Pico_mcd->s68k_regs[0x33] & PCDS_IEN2)) {
  140. elprintf(EL_INTS, "m68k: s68k irq 2");
  141. pcd_sync_s68k(SekCyclesDone(), 0);
  142. pcd_irq_s68k(2, 1);
  143. }
  144. return;
  145. case 1:
  146. d &= 3;
  147. dold = Pico_mcd->m.busreq;
  148. if (!(d & 1))
  149. d |= 2; // verified: can't release bus on reset
  150. if (dold == d)
  151. return;
  152. pcd_sync_s68k(SekCyclesDone(), 0);
  153. if ((dold ^ d) & 1)
  154. elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));
  155. if (!(d & 1))
  156. Pico_mcd->m.state_flags |= PCD_ST_S68K_RST;
  157. else if (d == 1 && (Pico_mcd->m.state_flags & PCD_ST_S68K_RST)) {
  158. Pico_mcd->m.state_flags &= ~PCD_ST_S68K_RST;
  159. elprintf(EL_CDREGS, "m68k: resetting s68k");
  160. SekResetS68k();
  161. }
  162. if ((dold ^ d) & 2) {
  163. elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);
  164. remap_prg_window(d, Pico_mcd->s68k_regs[3]);
  165. }
  166. Pico_mcd->m.busreq = d;
  167. return;
  168. case 2:
  169. elprintf(EL_CDREGS, "m68k: prg wp=%02x", d);
  170. goto write_comm;
  171. case 3:
  172. dold = Pico_mcd->s68k_regs[3];
  173. elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);
  174. if ((d ^ dold) & 0xc0) {
  175. elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i",
  176. (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
  177. remap_prg_window(Pico_mcd->m.busreq, d);
  178. }
  179. // 2M mode state is tracked regardless of current mode
  180. if (d & 2) {
  181. Pico_mcd->m.dmna_ret_2m |= 2;
  182. Pico_mcd->m.dmna_ret_2m &= ~1;
  183. }
  184. if (dold & 4) { // 1M mode
  185. d ^= 2; // 0 sets DMNA, 1 does nothing
  186. d = (d & 0xc2) | (dold & 0x1f);
  187. }
  188. else
  189. d = (d & 0xc0) | (dold & 0x1c) | Pico_mcd->m.dmna_ret_2m;
  190. goto write_comm;
  191. case 6:
  192. Pico_mcd->bios[MEM_BE2(0x72)] = d; // simple hint vector changer
  193. return;
  194. case 7:
  195. Pico_mcd->bios[MEM_BE2(0x73)] = d;
  196. elprintf(EL_CDREGS, "hint vector set to %04x%04x",
  197. ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);
  198. return;
  199. case 0x0f:
  200. a = 0x0e;
  201. case 0x0e:
  202. goto write_comm;
  203. }
  204. if ((a&0xf0) == 0x10)
  205. goto write_comm;
  206. elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);
  207. return;
  208. write_comm:
  209. if (d == Pico_mcd->s68k_regs[a])
  210. return;
  211. pcd_sync_s68k(SekCyclesDone(), 0);
  212. Pico_mcd->s68k_regs[a] = d;
  213. if (a == 0x03) {
  214. // There are cases when master checks for successful switching of RAM to
  215. // slave. This can produce race conditions where slave switches RAM back to
  216. // master while master is delayed by interrupt before the check executes.
  217. // Delay slave a bit to make sure master can check before slave changes.
  218. SekCycleCntS68k += 24;
  219. }
  220. if (Pico_mcd->m.s68k_poll_a == (a & ~1))
  221. {
  222. if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {
  223. elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
  224. SekSetStopS68k(0);
  225. }
  226. Pico_mcd->m.s68k_poll_a = 0;
  227. }
  228. }
  229. u32 s68k_poll_detect(u32 a, u32 d)
  230. {
  231. #ifdef USE_POLL_DETECT
  232. u32 cycles, cnt = 0;
  233. if (SekIsStoppedS68k())
  234. return d;
  235. cycles = SekCyclesDoneS68k();
  236. if (!SekNotPollingS68k && a == Pico_mcd->m.s68k_poll_a) {
  237. u32 clkdiff = cycles - Pico_mcd->m.s68k_poll_clk;
  238. if (clkdiff <= POLL_CYCLES) {
  239. cnt = Pico_mcd->m.s68k_poll_cnt + 1;
  240. //printf("-- diff: %u, cnt = %i\n", clkdiff, cnt);
  241. if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {
  242. SekSetStopS68k(1);
  243. elprintf(EL_CDPOLL, "s68k poll detected @%06x, a=%02x",
  244. SekPcS68k, a);
  245. }
  246. }
  247. }
  248. Pico_mcd->m.s68k_poll_a = a;
  249. Pico_mcd->m.s68k_poll_clk = cycles;
  250. Pico_mcd->m.s68k_poll_cnt = cnt;
  251. SekNotPollingS68k = 0;
  252. #endif
  253. return d;
  254. }
  255. #define READ_FONT_DATA(basemask) \
  256. { \
  257. unsigned int fnt = CPU_LE4(*(u32 *)(Pico_mcd->s68k_regs + 0x4c)); \
  258. unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
  259. if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
  260. if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
  261. if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
  262. if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
  263. }
  264. #ifndef _ASM_CD_MEMORY_C
  265. static
  266. #endif
  267. u32 s68k_reg_read16(u32 a)
  268. {
  269. u32 d=0;
  270. switch (a) {
  271. case 0:
  272. return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
  273. case 2:
  274. d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);
  275. elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
  276. return s68k_poll_detect(a, d);
  277. case 6:
  278. return cdc_reg_r();
  279. case 8:
  280. return cdc_host_r();
  281. case 0xC:
  282. d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;
  283. d /= 384;
  284. d &= 0x0fff;
  285. elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);
  286. return d;
  287. case 0x30:
  288. elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
  289. return Pico_mcd->s68k_regs[31];
  290. case 0x34: // fader
  291. return 0; // no busy bit
  292. case 0x50: // font data (check: Lunar 2, Silpheed)
  293. READ_FONT_DATA(0x00100000);
  294. return d;
  295. case 0x52:
  296. READ_FONT_DATA(0x00010000);
  297. return d;
  298. case 0x54:
  299. READ_FONT_DATA(0x10000000);
  300. return d;
  301. case 0x56:
  302. READ_FONT_DATA(0x01000000);
  303. return d;
  304. }
  305. d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
  306. if (a >= 0x0e && a < 0x30)
  307. return s68k_poll_detect(a, d);
  308. return d;
  309. }
  310. #ifndef _ASM_CD_MEMORY_C
  311. static
  312. #endif
  313. void s68k_reg_write8(u32 a, u32 d)
  314. {
  315. // Warning: d might have upper bits set
  316. switch (a) {
  317. case 1:
  318. if (!(d & 1))
  319. pcd_soft_reset();
  320. return;
  321. case 2:
  322. return; // only m68k can change WP
  323. case 3: {
  324. int dold = Pico_mcd->s68k_regs[3];
  325. elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);
  326. d &= 0x1d;
  327. d |= dold & 0xc2;
  328. // 2M mode state
  329. if (d & 1) {
  330. Pico_mcd->m.dmna_ret_2m |= 1;
  331. Pico_mcd->m.dmna_ret_2m &= ~2; // DMNA clears
  332. }
  333. if (d & 4)
  334. {
  335. if (!(dold & 4)) {
  336. elprintf(EL_CDREG3, "wram mode 2M->1M");
  337. wram_2M_to_1M(Pico_mcd->word_ram2M);
  338. }
  339. if ((d ^ dold) & 0x1d)
  340. remap_word_ram(d);
  341. if ((d ^ dold) & 0x05)
  342. d &= ~2; // clear DMNA - swap complete
  343. }
  344. else
  345. {
  346. if (dold & 4) {
  347. elprintf(EL_CDREG3, "wram mode 1M->2M");
  348. wram_1M_to_2M(Pico_mcd->word_ram2M);
  349. remap_word_ram(d);
  350. }
  351. d = (d & ~3) | Pico_mcd->m.dmna_ret_2m;
  352. }
  353. goto write_comm;
  354. }
  355. case 4:
  356. elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);
  357. Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
  358. return;
  359. case 5:
  360. //dprintf("s68k CDC reg addr: %x", d&0xf);
  361. break;
  362. case 7:
  363. cdc_reg_w(d & 0xff);
  364. return;
  365. case 0xa:
  366. elprintf(EL_CDREGS, "s68k set CDC dma addr");
  367. break;
  368. case 0xc:
  369. case 0xd: // 384 cycle stopwatch timer
  370. elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);
  371. // does this also reset internal 384 cycle counter?
  372. Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();
  373. return;
  374. case 0x0e:
  375. a = 0x0f;
  376. case 0x0f:
  377. goto write_comm;
  378. case 0x31: // 384 cycle int3 timer
  379. d &= 0xff;
  380. elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);
  381. Pico_mcd->s68k_regs[a] = (u8) d;
  382. if (d) // d or d+1??
  383. pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);
  384. else
  385. pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);
  386. break;
  387. case 0x33: // IRQ mask
  388. elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d);
  389. d &= 0x7e;
  390. if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) {
  391. // XXX: emulate pending irq instead?
  392. if (Pico_mcd->s68k_regs[0x37] & 4) {
  393. elprintf(EL_INTS, "cdd export irq 4 (unmask)");
  394. pcd_irq_s68k(4, 1);
  395. }
  396. }
  397. break;
  398. case 0x34: // fader
  399. Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
  400. return;
  401. case 0x36:
  402. return; // d/m bit is unsetable
  403. case 0x37: {
  404. u32 d_old = Pico_mcd->s68k_regs[0x37];
  405. Pico_mcd->s68k_regs[0x37] = d & 7;
  406. if ((d&4) && !(d_old&4)) {
  407. // ??
  408. pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75);
  409. if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN4) {
  410. elprintf(EL_INTS, "cdd export irq 4");
  411. pcd_irq_s68k(4, 1);
  412. }
  413. }
  414. return;
  415. }
  416. case 0x4b:
  417. Pico_mcd->s68k_regs[a] = 0; // (u8) d; ?
  418. cdd_process();
  419. {
  420. static const char *nm[] =
  421. { "stat", "stop", "read_toc", "play",
  422. "seek", "???", "pause", "resume",
  423. "ff", "fr", "tjump", "???",
  424. "close","open", "???", "???" };
  425. u8 *c = &Pico_mcd->s68k_regs[0x42];
  426. u8 *s = &Pico_mcd->s68k_regs[0x38];
  427. elprintf(EL_CD,
  428. "CDD command: %02x %02x %02x %02x %02x %02x %02x %02x %12s",
  429. c[0], c[1], c[2], c[3], c[4], c[5], c[6], c[7], nm[c[0] & 0x0f]);
  430. elprintf(EL_CD,
  431. "CDD status: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
  432. s[0], s[1], s[2], s[3], s[4], s[5], s[6], s[7], s[8], s[9]);
  433. }
  434. return;
  435. case 0x58:
  436. return;
  437. }
  438. if ((a&0x1f0) == 0x20)
  439. goto write_comm;
  440. if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
  441. {
  442. elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);
  443. return;
  444. }
  445. Pico_mcd->s68k_regs[a] = (u8) d;
  446. return;
  447. write_comm:
  448. Pico_mcd->s68k_regs[a] = (u8) d;
  449. if (Pico_mcd->m.m68k_poll_cnt)
  450. SekEndRunS68k(0);
  451. Pico_mcd->m.m68k_poll_cnt = 0;
  452. }
  453. void s68k_reg_write16(u32 a, u32 d)
  454. {
  455. u8 *r = Pico_mcd->s68k_regs;
  456. Pico_mcd->m.s68k_poll_cnt = 0;
  457. if ((a & 0x1f0) == 0x20)
  458. goto write_comm;
  459. switch (a) {
  460. case 0x0e:
  461. // special case, 2 byte writes would be handled differently
  462. // TODO: verify
  463. d = (u8)d | (r[0xe] << 8);
  464. goto write_comm;
  465. case 0x58: // stamp data size
  466. r[0x59] = d & 7;
  467. return;
  468. case 0x5a: // stamp map base address
  469. r[0x5a] = d >> 8;
  470. r[0x5b] = d & 0xe0;
  471. return;
  472. case 0x5c: // V cell size
  473. r[0x5d] = d & 0x1f;
  474. return;
  475. case 0x5e: // image buffer start address
  476. r[0x5e] = d >> 8;
  477. r[0x5f] = d & 0xf8;
  478. return;
  479. case 0x60: // image buffer offset
  480. r[0x61] = d & 0x3f;
  481. return;
  482. case 0x62: // h dot size
  483. r[0x62] = (d >> 8) & 1;
  484. r[0x63] = d;
  485. return;
  486. case 0x64: // v dot size
  487. r[0x65] = d;
  488. return;
  489. case 0x66: // trace vector base address
  490. d &= 0xfffe;
  491. r[0x66] = d >> 8;
  492. r[0x67] = d;
  493. gfx_start(d);
  494. return;
  495. default:
  496. break;
  497. }
  498. s68k_reg_write8(a, d >> 8);
  499. s68k_reg_write8(a + 1, d & 0xff);
  500. return;
  501. write_comm:
  502. r[a] = d >> 8;
  503. r[a + 1] = d;
  504. if (Pico_mcd->m.m68k_poll_cnt)
  505. SekEndRunS68k(0);
  506. Pico_mcd->m.m68k_poll_cnt = 0;
  507. }
  508. // -----------------------------------------------------------------
  509. // Main 68k
  510. // -----------------------------------------------------------------
  511. #ifndef _ASM_CD_MEMORY_C
  512. #include "cell_map.c"
  513. // WORD RAM, cell aranged area (220000 - 23ffff)
  514. static u32 PicoReadM68k8_cell0(u32 a)
  515. {
  516. a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
  517. return Pico_mcd->word_ram1M[0][MEM_BE2(a)];
  518. }
  519. static u32 PicoReadM68k8_cell1(u32 a)
  520. {
  521. a = (a&3) | (cell_map(a >> 2) << 2);
  522. return Pico_mcd->word_ram1M[1][MEM_BE2(a)];
  523. }
  524. static u32 PicoReadM68k16_cell0(u32 a)
  525. {
  526. a = (a&2) | (cell_map(a >> 2) << 2);
  527. return *(u16 *)(Pico_mcd->word_ram1M[0] + a);
  528. }
  529. static u32 PicoReadM68k16_cell1(u32 a)
  530. {
  531. a = (a&2) | (cell_map(a >> 2) << 2);
  532. return *(u16 *)(Pico_mcd->word_ram1M[1] + a);
  533. }
  534. static void PicoWriteM68k8_cell0(u32 a, u32 d)
  535. {
  536. a = (a&3) | (cell_map(a >> 2) << 2);
  537. Pico_mcd->word_ram1M[0][MEM_BE2(a)] = d;
  538. }
  539. static void PicoWriteM68k8_cell1(u32 a, u32 d)
  540. {
  541. a = (a&3) | (cell_map(a >> 2) << 2);
  542. Pico_mcd->word_ram1M[1][MEM_BE2(a)] = d;
  543. }
  544. static void PicoWriteM68k16_cell0(u32 a, u32 d)
  545. {
  546. a = (a&3) | (cell_map(a >> 2) << 2);
  547. *(u16 *)(Pico_mcd->word_ram1M[0] + a) = d;
  548. }
  549. static void PicoWriteM68k16_cell1(u32 a, u32 d)
  550. {
  551. a = (a&3) | (cell_map(a >> 2) << 2);
  552. *(u16 *)(Pico_mcd->word_ram1M[1] + a) = d;
  553. }
  554. #endif
  555. // RAM cart (40000 - 7fffff, optional)
  556. static u32 PicoReadM68k8_ramc(u32 a)
  557. {
  558. u32 d = 0;
  559. if (a == 0x400001) {
  560. if (Pico.sv.data != NULL)
  561. d = 3; // 64k cart
  562. return d;
  563. }
  564. if ((a & 0xfe0000) == 0x600000) {
  565. if (Pico.sv.data != NULL)
  566. d = Pico.sv.data[((a >> 1) & 0xffff) + 0x2000];
  567. return d;
  568. }
  569. if (a == 0x7fffff)
  570. return Pico_mcd->m.bcram_reg;
  571. elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
  572. return d;
  573. }
  574. static u32 PicoReadM68k16_ramc(u32 a)
  575. {
  576. elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);
  577. return PicoReadM68k8_ramc(a + 1);
  578. }
  579. static void PicoWriteM68k8_ramc(u32 a, u32 d)
  580. {
  581. if ((a & 0xfe0000) == 0x600000) {
  582. if (Pico.sv.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {
  583. Pico.sv.data[((a>>1) & 0xffff) + 0x2000] = d;
  584. Pico.sv.changed = 1;
  585. }
  586. return;
  587. }
  588. if (a == 0x7fffff) {
  589. Pico_mcd->m.bcram_reg = d;
  590. return;
  591. }
  592. elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x",
  593. a, d & 0xff, SekPc);
  594. }
  595. static void PicoWriteM68k16_ramc(u32 a, u32 d)
  596. {
  597. elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x",
  598. a, d, SekPcS68k);
  599. PicoWriteM68k8_ramc(a + 1, d);
  600. }
  601. // IO/control/cd registers (a10000 - ...)
  602. #ifndef _ASM_CD_MEMORY_C
  603. u32 PicoRead8_mcd_io(u32 a)
  604. {
  605. u32 d;
  606. if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
  607. d = m68k_reg_read16(a); // TODO: m68k_reg_read8
  608. if (!(a & 1))
  609. d >>= 8;
  610. d &= 0xff;
  611. elprintf(EL_CDREGS, "m68k_regs r8: [%02x] %02x @%06x",
  612. a & 0x3f, d, SekPc);
  613. return d;
  614. }
  615. // fallback to default MD handler
  616. return PicoRead8_io(a);
  617. }
  618. u32 PicoRead16_mcd_io(u32 a)
  619. {
  620. u32 d;
  621. if ((a & 0xff00) == 0x2000) {
  622. d = m68k_reg_read16(a);
  623. elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x",
  624. a & 0x3f, d, SekPc);
  625. return d;
  626. }
  627. return PicoRead16_io(a);
  628. }
  629. void PicoWrite8_mcd_io(u32 a, u32 d)
  630. {
  631. if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
  632. elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x",
  633. a & 0x3f, d, SekPc);
  634. m68k_reg_write8(a, d);
  635. return;
  636. }
  637. PicoWrite8_io(a, d);
  638. }
  639. void PicoWrite16_mcd_io(u32 a, u32 d)
  640. {
  641. if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
  642. elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x",
  643. a & 0x3f, d, SekPc);
  644. m68k_reg_write8(a, d >> 8);
  645. if ((a & 0x3e) != 0x0e) // special case
  646. m68k_reg_write8(a + 1, d & 0xff);
  647. return;
  648. }
  649. PicoWrite16_io(a, d);
  650. }
  651. #endif
  652. // -----------------------------------------------------------------
  653. // Sub 68k
  654. // -----------------------------------------------------------------
  655. static u32 s68k_unmapped_read8(u32 a)
  656. {
  657. elprintf(EL_UIO, "s68k unmapped r8 [%06x] @%06x", a, SekPc);
  658. return 0;
  659. }
  660. static u32 s68k_unmapped_read16(u32 a)
  661. {
  662. elprintf(EL_UIO, "s68k unmapped r16 [%06x] @%06x", a, SekPc);
  663. return 0;
  664. }
  665. static void s68k_unmapped_write8(u32 a, u32 d)
  666. {
  667. elprintf(EL_UIO, "s68k unmapped w8 [%06x] %02x @%06x",
  668. a, d & 0xff, SekPc);
  669. }
  670. static void s68k_unmapped_write16(u32 a, u32 d)
  671. {
  672. elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x",
  673. a, d & 0xffff, SekPc);
  674. }
  675. // PRG RAM protected range (000000 - 01fdff)?
  676. // XXX verify: ff00 or 1fe00 max?
  677. static void PicoWriteS68k8_prgwp(u32 a, u32 d)
  678. {
  679. if (a >= (Pico_mcd->s68k_regs[2] << 9))
  680. Pico_mcd->prg_ram[MEM_BE2(a)] = d;
  681. }
  682. static void PicoWriteS68k16_prgwp(u32 a, u32 d)
  683. {
  684. if (a >= (Pico_mcd->s68k_regs[2] << 9))
  685. *(u16 *)(Pico_mcd->prg_ram + a) = d;
  686. }
  687. #ifndef _ASM_CD_MEMORY_C
  688. // decode (080000 - 0bffff, in 1M mode)
  689. static u32 PicoReadS68k8_dec0(u32 a)
  690. {
  691. u32 d = Pico_mcd->word_ram1M[0][MEM_BE2(a >> 1) & 0x1ffff];
  692. if (a & 1)
  693. d &= 0x0f;
  694. else
  695. d >>= 4;
  696. return d;
  697. }
  698. static u32 PicoReadS68k8_dec1(u32 a)
  699. {
  700. u32 d = Pico_mcd->word_ram1M[1][MEM_BE2(a >> 1) & 0x1ffff];
  701. if (a & 1)
  702. d &= 0x0f;
  703. else
  704. d >>= 4;
  705. return d;
  706. }
  707. static u32 PicoReadS68k16_dec0(u32 a)
  708. {
  709. u32 d = Pico_mcd->word_ram1M[0][MEM_BE2(a >> 1) & 0x1ffff];
  710. d |= d << 4;
  711. d &= ~0xf0;
  712. return d;
  713. }
  714. static u32 PicoReadS68k16_dec1(u32 a)
  715. {
  716. u32 d = Pico_mcd->word_ram1M[1][MEM_BE2(a >> 1) & 0x1ffff];
  717. d |= d << 4;
  718. d &= ~0xf0;
  719. return d;
  720. }
  721. /* check: jaguar xj 220 (draws entire world using decode) */
  722. #define mk_decode_w8(bank) \
  723. static void PicoWriteS68k8_dec_m0b##bank(u32 a, u32 d) \
  724. { \
  725. u8 *pd = &Pico_mcd->word_ram1M[bank][MEM_BE2(a >> 1) & 0x1ffff];\
  726. \
  727. if (!(a & 1)) \
  728. *pd = (*pd & 0x0f) | (d << 4); \
  729. else \
  730. *pd = (*pd & 0xf0) | (d & 0x0f); \
  731. } \
  732. \
  733. static void PicoWriteS68k8_dec_m1b##bank(u32 a, u32 d) \
  734. { \
  735. u8 *pd = &Pico_mcd->word_ram1M[bank][MEM_BE2(a >> 1) & 0x1ffff];\
  736. u8 mask = (a & 1) ? 0x0f : 0xf0; \
  737. \
  738. if (!(*pd & mask) && (d & 0x0f)) /* underwrite */ \
  739. PicoWriteS68k8_dec_m0b##bank(a, d); \
  740. } \
  741. \
  742. static void PicoWriteS68k8_dec_m2b##bank(u32 a, u32 d) /* ...and m3? */ \
  743. { \
  744. if (d & 0x0f) /* overwrite */ \
  745. PicoWriteS68k8_dec_m0b##bank(a, d); \
  746. }
  747. mk_decode_w8(0)
  748. mk_decode_w8(1)
  749. #define mk_decode_w16(bank) \
  750. static void PicoWriteS68k16_dec_m0b##bank(u32 a, u32 d) \
  751. { \
  752. u8 *pd = &Pico_mcd->word_ram1M[bank][MEM_BE2(a >> 1) & 0x1ffff];\
  753. \
  754. d &= 0x0f0f; \
  755. *pd = d | (d >> 4); \
  756. } \
  757. \
  758. static void PicoWriteS68k16_dec_m1b##bank(u32 a, u32 d) \
  759. { \
  760. u8 *pd = &Pico_mcd->word_ram1M[bank][MEM_BE2(a >> 1) & 0x1ffff];\
  761. \
  762. d &= 0x0f0f; /* underwrite */ \
  763. if (!(*pd & 0xf0)) *pd |= d >> 4; \
  764. if (!(*pd & 0x0f)) *pd |= d; \
  765. } \
  766. \
  767. static void PicoWriteS68k16_dec_m2b##bank(u32 a, u32 d) \
  768. { \
  769. u8 *pd = &Pico_mcd->word_ram1M[bank][MEM_BE2(a >> 1) & 0x1ffff];\
  770. \
  771. d &= 0x0f0f; /* overwrite */ \
  772. d |= d >> 4; \
  773. \
  774. if (!(d & 0xf0)) d |= *pd & 0xf0; \
  775. if (!(d & 0x0f)) d |= *pd & 0x0f; \
  776. *pd = d; \
  777. }
  778. mk_decode_w16(0)
  779. mk_decode_w16(1)
  780. #endif
  781. // backup RAM (fe0000 - feffff)
  782. static u32 PicoReadS68k8_bram(u32 a)
  783. {
  784. return Pico_mcd->bram[(a>>1)&0x1fff];
  785. }
  786. static u32 PicoReadS68k16_bram(u32 a)
  787. {
  788. u32 d;
  789. elprintf(EL_ANOMALY, "FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
  790. a = (a >> 1) & 0x1fff;
  791. d = Pico_mcd->bram[a++];
  792. d|= Pico_mcd->bram[a++] << 8; // probably wrong, TODO: verify
  793. return d;
  794. }
  795. static void PicoWriteS68k8_bram(u32 a, u32 d)
  796. {
  797. Pico_mcd->bram[(a >> 1) & 0x1fff] = d;
  798. Pico.sv.changed = 1;
  799. }
  800. static void PicoWriteS68k16_bram(u32 a, u32 d)
  801. {
  802. elprintf(EL_ANOMALY, "s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
  803. a = (a >> 1) & 0x1fff;
  804. Pico_mcd->bram[a++] = d;
  805. Pico_mcd->bram[a++] = d >> 8; // TODO: verify..
  806. Pico.sv.changed = 1;
  807. }
  808. #ifndef _ASM_CD_MEMORY_C
  809. // PCM and registers (ff0000 - ffffff)
  810. static u32 PicoReadS68k8_pr(u32 a)
  811. {
  812. u32 d = 0;
  813. // regs
  814. if ((a & 0xfe00) == 0x8000) {
  815. a &= 0x1ff;
  816. if (a >= 0x0e && a < 0x30) {
  817. d = Pico_mcd->s68k_regs[a];
  818. s68k_poll_detect(a & ~1, d);
  819. goto regs_done;
  820. }
  821. d = s68k_reg_read16(a & ~1);
  822. if (!(a & 1))
  823. d >>= 8;
  824. regs_done:
  825. d &= 0xff;
  826. elprintf(EL_CDREGS, "s68k_regs r8: [%02x] %02x @%06x",
  827. a, d, SekPcS68k);
  828. return d;
  829. }
  830. // PCM
  831. // XXX: verify: probably odd addrs only?
  832. if ((a & 0x8000) == 0x0000) {
  833. a &= 0x7fff;
  834. if (a >= 0x2000)
  835. d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];
  836. else if (a >= 0x20)
  837. d = pcd_pcm_read(a >> 1);
  838. return d;
  839. }
  840. return s68k_unmapped_read8(a);
  841. }
  842. static u32 PicoReadS68k16_pr(u32 a)
  843. {
  844. u32 d = 0;
  845. // regs
  846. if ((a & 0xfe00) == 0x8000) {
  847. a &= 0x1fe;
  848. d = s68k_reg_read16(a);
  849. elprintf(EL_CDREGS, "s68k_regs r16: [%02x] %04x @%06x",
  850. a, d, SekPcS68k);
  851. return d;
  852. }
  853. // PCM
  854. if ((a & 0x8000) == 0x0000) {
  855. a &= 0x7fff;
  856. if (a >= 0x2000)
  857. d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];
  858. else if (a >= 0x20)
  859. d = pcd_pcm_read(a >> 1);
  860. return d;
  861. }
  862. return s68k_unmapped_read16(a);
  863. }
  864. static void PicoWriteS68k8_pr(u32 a, u32 d)
  865. {
  866. // regs
  867. if ((a & 0xfe00) == 0x8000) {
  868. a &= 0x1ff;
  869. elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @%06x", a, d, SekPcS68k);
  870. if (0x59 <= a && a < 0x68) // word regs
  871. s68k_reg_write16(a & ~1, (d << 8) | d);
  872. else
  873. s68k_reg_write8(a, d);
  874. return;
  875. }
  876. // PCM
  877. if ((a & 0x8000) == 0x0000) {
  878. a &= 0x7fff;
  879. if (a >= 0x2000)
  880. Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
  881. else if (a < 0x12)
  882. pcd_pcm_write(a>>1, d);
  883. return;
  884. }
  885. s68k_unmapped_write8(a, d);
  886. }
  887. static void PicoWriteS68k16_pr(u32 a, u32 d)
  888. {
  889. // regs
  890. if ((a & 0xfe00) == 0x8000) {
  891. a &= 0x1fe;
  892. elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @%06x", a, d, SekPcS68k);
  893. s68k_reg_write16(a, d);
  894. return;
  895. }
  896. // PCM
  897. if ((a & 0x8000) == 0x0000) {
  898. a &= 0x7fff;
  899. if (a >= 0x2000)
  900. Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
  901. else if (a < 0x12)
  902. pcd_pcm_write(a>>1, d & 0xff);
  903. return;
  904. }
  905. s68k_unmapped_write16(a, d);
  906. }
  907. #endif
  908. static const void *m68k_cell_read8[] = { PicoReadM68k8_cell0, PicoReadM68k8_cell1 };
  909. static const void *m68k_cell_read16[] = { PicoReadM68k16_cell0, PicoReadM68k16_cell1 };
  910. static const void *m68k_cell_write8[] = { PicoWriteM68k8_cell0, PicoWriteM68k8_cell1 };
  911. static const void *m68k_cell_write16[] = { PicoWriteM68k16_cell0, PicoWriteM68k16_cell1 };
  912. static const void *s68k_dec_read8[] = { PicoReadS68k8_dec0, PicoReadS68k8_dec1 };
  913. static const void *s68k_dec_read16[] = { PicoReadS68k16_dec0, PicoReadS68k16_dec1 };
  914. static const void *s68k_dec_write8[2][4] = {
  915. { PicoWriteS68k8_dec_m0b0, PicoWriteS68k8_dec_m1b0, PicoWriteS68k8_dec_m2b0, PicoWriteS68k8_dec_m2b0 },
  916. { PicoWriteS68k8_dec_m0b1, PicoWriteS68k8_dec_m1b1, PicoWriteS68k8_dec_m2b1, PicoWriteS68k8_dec_m2b1 },
  917. };
  918. static const void *s68k_dec_write16[2][4] = {
  919. { PicoWriteS68k16_dec_m0b0, PicoWriteS68k16_dec_m1b0, PicoWriteS68k16_dec_m2b0, PicoWriteS68k16_dec_m2b0 },
  920. { PicoWriteS68k16_dec_m0b1, PicoWriteS68k16_dec_m1b1, PicoWriteS68k16_dec_m2b1, PicoWriteS68k16_dec_m2b1 },
  921. };
  922. // -----------------------------------------------------------------
  923. static void remap_prg_window(u32 r1, u32 r3)
  924. {
  925. // PRG RAM
  926. if (r1 & 2) {
  927. void *bank = Pico_mcd->prg_ram_b[(r3 >> 6) & 3];
  928. cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);
  929. }
  930. else {
  931. m68k_map_unmap(0x020000, 0x03ffff);
  932. }
  933. }
  934. static void remap_word_ram(u32 r3)
  935. {
  936. void *bank;
  937. // WORD RAM
  938. if (!(r3 & 4)) {
  939. // 2M mode. XXX: allowing access in all cases for simplicity
  940. bank = Pico_mcd->word_ram2M;
  941. cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);
  942. cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);
  943. // TODO: handle 0x0c0000
  944. }
  945. else {
  946. int b0 = r3 & 1;
  947. int m = (r3 & 0x18) >> 3;
  948. bank = Pico_mcd->word_ram1M[b0];
  949. cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);
  950. bank = Pico_mcd->word_ram1M[b0 ^ 1];
  951. cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);
  952. // "cell arrange" on m68k
  953. cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1);
  954. cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1);
  955. cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1);
  956. cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1);
  957. // "decode format" on s68k
  958. cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1);
  959. cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1);
  960. cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);
  961. cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);
  962. }
  963. }
  964. void pcd_state_loaded_mem(void)
  965. {
  966. u32 r3 = Pico_mcd->s68k_regs[3];
  967. /* after load events */
  968. if (r3 & 4) // 1M mode?
  969. wram_2M_to_1M(Pico_mcd->word_ram2M);
  970. remap_word_ram(r3);
  971. remap_prg_window(Pico_mcd->m.busreq, r3);
  972. Pico_mcd->m.dmna_ret_2m &= 3;
  973. // restore hint vector
  974. *(u16 *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;
  975. }
  976. #ifdef EMU_M68K
  977. static void m68k_mem_setup_cd(void);
  978. #endif
  979. PICO_INTERNAL void PicoMemSetupCD(void)
  980. {
  981. // setup default main68k map
  982. PicoMemSetup();
  983. // main68k map (BIOS mapped by PicoMemSetup()):
  984. // RAM cart
  985. if (PicoIn.opt & POPT_EN_MCD_RAMCART) {
  986. cpu68k_map_set(m68k_read8_map, 0x400000, 0x7fffff, PicoReadM68k8_ramc, 1);
  987. cpu68k_map_set(m68k_read16_map, 0x400000, 0x7fffff, PicoReadM68k16_ramc, 1);
  988. cpu68k_map_set(m68k_write8_map, 0x400000, 0x7fffff, PicoWriteM68k8_ramc, 1);
  989. cpu68k_map_set(m68k_write16_map, 0x400000, 0x7fffff, PicoWriteM68k16_ramc, 1);
  990. }
  991. // registers/IO:
  992. cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_mcd_io, 1);
  993. cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_mcd_io, 1);
  994. cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_mcd_io, 1);
  995. cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_mcd_io, 1);
  996. // sub68k map
  997. cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);
  998. cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 1);
  999. cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 1);
  1000. cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);
  1001. // PRG RAM
  1002. cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
  1003. cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
  1004. cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
  1005. cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
  1006. cpu68k_map_set(s68k_write8_map, 0x000000, 0x01ffff, PicoWriteS68k8_prgwp, 1);
  1007. cpu68k_map_set(s68k_write16_map, 0x000000, 0x01ffff, PicoWriteS68k16_prgwp, 1);
  1008. // BRAM
  1009. cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);
  1010. cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);
  1011. cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);
  1012. cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);
  1013. // PCM, regs
  1014. cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 1);
  1015. cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 1);
  1016. cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);
  1017. cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);
  1018. // RAMs
  1019. remap_word_ram(1);
  1020. #ifdef EMU_C68K
  1021. // s68k
  1022. PicoCpuCS68k.read8 = (void *)s68k_read8_map;
  1023. PicoCpuCS68k.read16 = (void *)s68k_read16_map;
  1024. PicoCpuCS68k.read32 = (void *)s68k_read16_map;
  1025. PicoCpuCS68k.write8 = (void *)s68k_write8_map;
  1026. PicoCpuCS68k.write16 = (void *)s68k_write16_map;
  1027. PicoCpuCS68k.write32 = (void *)s68k_write16_map;
  1028. PicoCpuCS68k.checkpc = NULL; /* unused */
  1029. PicoCpuCS68k.fetch8 = NULL;
  1030. PicoCpuCS68k.fetch16 = NULL;
  1031. PicoCpuCS68k.fetch32 = NULL;
  1032. #endif
  1033. #ifdef EMU_F68K
  1034. // s68k
  1035. PicoCpuFS68k.read_byte = (void *)s68k_read8;
  1036. PicoCpuFS68k.read_word = (void *)s68k_read16;
  1037. PicoCpuFS68k.read_long = (void *)s68k_read32;
  1038. PicoCpuFS68k.write_byte = (void *)s68k_write8;
  1039. PicoCpuFS68k.write_word = (void *)s68k_write16;
  1040. PicoCpuFS68k.write_long = (void *)s68k_write32;
  1041. // setup FAME fetchmap
  1042. {
  1043. #if defined __clang__ || defined HW_WUP
  1044. volatile // prevent strange relocs from clang
  1045. #endif
  1046. uptr ptr_ram = (uptr)PicoMem.ram;
  1047. int i;
  1048. // M68k
  1049. // by default, point everything to fitst 64k of ROM (BIOS)
  1050. for (i = 0; i < M68K_FETCHBANK1; i++)
  1051. PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
  1052. // now real ROM (BIOS)
  1053. for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
  1054. PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom;
  1055. // .. and RAM
  1056. for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
  1057. PicoCpuFM68k.Fetch[i] = ptr_ram - (i<<(24-FAMEC_FETCHBITS));
  1058. // S68k
  1059. // PRG RAM is default
  1060. for (i = 0; i < M68K_FETCHBANK1; i++)
  1061. PicoCpuFS68k.Fetch[i] = (uptr)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));
  1062. // real PRG RAM
  1063. for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)
  1064. PicoCpuFS68k.Fetch[i] = (uptr)Pico_mcd->prg_ram;
  1065. // WORD RAM 2M area
  1066. for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)
  1067. PicoCpuFS68k.Fetch[i] = (uptr)Pico_mcd->word_ram2M - 0x80000;
  1068. // remap_word_ram() will setup word ram for both
  1069. }
  1070. #endif
  1071. #ifdef EMU_M68K
  1072. m68k_mem_setup_cd();
  1073. #endif
  1074. }
  1075. #ifdef EMU_M68K
  1076. u32 m68k_read8(u32 a);
  1077. u32 m68k_read16(u32 a);
  1078. u32 m68k_read32(u32 a);
  1079. void m68k_write8(u32 a, u8 d);
  1080. void m68k_write16(u32 a, u16 d);
  1081. void m68k_write32(u32 a, u32 d);
  1082. static unsigned int PicoReadCD8w (unsigned int a) {
  1083. return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read8(a) : m68k_read8(a);
  1084. }
  1085. static unsigned int PicoReadCD16w(unsigned int a) {
  1086. return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read16(a) : m68k_read16(a);
  1087. }
  1088. static unsigned int PicoReadCD32w(unsigned int a) {
  1089. return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read32(a) : m68k_read32(a);
  1090. }
  1091. static void PicoWriteCD8w (unsigned int a, unsigned char d) {
  1092. if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write8(a, d); else m68k_write8(a, d);
  1093. }
  1094. static void PicoWriteCD16w(unsigned int a, unsigned short d) {
  1095. if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write16(a, d); else m68k_write16(a, d);
  1096. }
  1097. static void PicoWriteCD32w(unsigned int a, unsigned int d) {
  1098. if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write32(a, d); else m68k_write32(a, d);
  1099. }
  1100. extern unsigned int (*pm68k_read_memory_8) (unsigned int address);
  1101. extern unsigned int (*pm68k_read_memory_16)(unsigned int address);
  1102. extern unsigned int (*pm68k_read_memory_32)(unsigned int address);
  1103. extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);
  1104. extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);
  1105. extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);
  1106. static void m68k_mem_setup_cd(void)
  1107. {
  1108. pm68k_read_memory_8 = PicoReadCD8w;
  1109. pm68k_read_memory_16 = PicoReadCD16w;
  1110. pm68k_read_memory_32 = PicoReadCD32w;
  1111. pm68k_write_memory_8 = PicoWriteCD8w;
  1112. pm68k_write_memory_16 = PicoWriteCD16w;
  1113. pm68k_write_memory_32 = PicoWriteCD32w;
  1114. }
  1115. #endif // EMU_M68K
  1116. // vim:shiftwidth=2:ts=2:expandtab