sh2pico.c 7.5 KB

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  1. #include "../sh2.h"
  2. #ifdef DRC_CMP
  3. #include "../compiler.c"
  4. #define BUSY_LOOP_HACKS 0
  5. #else
  6. #define BUSY_LOOP_HACKS 1
  7. #endif
  8. // MAME types
  9. #ifndef INT8
  10. typedef s8 INT8;
  11. typedef s16 INT16;
  12. typedef s32 INT32;
  13. typedef u32 UINT32;
  14. typedef u16 UINT16;
  15. typedef u8 UINT8;
  16. #endif
  17. #ifdef DRC_SH2
  18. // this nasty conversion is needed for drc-expecting memhandlers
  19. #define MAKE_READFUNC(name, cname) \
  20. static __inline unsigned int name(SH2 *sh2, unsigned int a) \
  21. { \
  22. unsigned int ret; \
  23. sh2->sr |= (sh2->icount << 12) | (sh2->no_polling); \
  24. ret = cname(a, sh2); \
  25. sh2->icount = (signed int)sh2->sr >> 12; \
  26. sh2->no_polling = (sh2->sr & SH2_NO_POLLING); \
  27. sh2->sr &= 0x3f3; \
  28. return ret; \
  29. }
  30. #define MAKE_WRITEFUNC(name, cname) \
  31. static __inline void name(SH2 *sh2, unsigned int a, unsigned int d) \
  32. { \
  33. sh2->sr |= (sh2->icount << 12) | (sh2->no_polling); \
  34. cname(a, d, sh2); \
  35. sh2->icount = (signed int)sh2->sr >> 12; \
  36. sh2->no_polling = (sh2->sr & SH2_NO_POLLING); \
  37. sh2->sr &= 0x3f3; \
  38. }
  39. MAKE_READFUNC(RB, p32x_sh2_read8)
  40. MAKE_READFUNC(RW, p32x_sh2_read16)
  41. MAKE_READFUNC(RL, p32x_sh2_read32)
  42. MAKE_WRITEFUNC(WB, p32x_sh2_write8)
  43. MAKE_WRITEFUNC(WW, p32x_sh2_write16)
  44. MAKE_WRITEFUNC(WL, p32x_sh2_write32)
  45. #else
  46. #define RB(sh2, a) p32x_sh2_read8(a, sh2)
  47. #define RW(sh2, a) p32x_sh2_read16(a, sh2)
  48. #define RL(sh2, a) p32x_sh2_read32(a, sh2)
  49. #define WB(sh2, a, d) p32x_sh2_write8(a, d, sh2)
  50. #define WW(sh2, a, d) p32x_sh2_write16(a, d, sh2)
  51. #define WL(sh2, a, d) p32x_sh2_write32(a, d, sh2)
  52. #endif
  53. // some stuff from sh2comn.h
  54. #define T 0x00000001
  55. #define S 0x00000002
  56. #define I 0x000000f0
  57. #define Q 0x00000100
  58. #define M 0x00000200
  59. #define AM 0xc7ffffff
  60. #define FLAGS (M|Q|I|S|T)
  61. #define Rn ((opcode>>8)&15)
  62. #define Rm ((opcode>>4)&15)
  63. #define sh2_state SH2
  64. extern void lprintf(const char *fmt, ...);
  65. #define logerror lprintf
  66. #ifdef SH2_STATS
  67. static SH2 sh2_stats;
  68. static unsigned int op_refs[0x10000];
  69. # define LRN 1
  70. # define LRM 2
  71. # define LRNM (LRN|LRM)
  72. # define rlog(rnm) { \
  73. int op = opcode; \
  74. if ((rnm) & LRN) { \
  75. op &= ~0x0f00; \
  76. sh2_stats.r[Rn]++; \
  77. } \
  78. if ((rnm) & LRM) { \
  79. op &= ~0x00f0; \
  80. sh2_stats.r[Rm]++; \
  81. } \
  82. op_refs[op]++; \
  83. }
  84. # define rlog1(x) sh2_stats.r[x]++
  85. # define rlog2(x1,x2) sh2_stats.r[x1]++; sh2_stats.r[x2]++
  86. #else
  87. # define rlog(x)
  88. # define rlog1(...)
  89. # define rlog2(...)
  90. #endif
  91. #include "sh2.c"
  92. #ifndef DRC_CMP
  93. int sh2_execute_interpreter(SH2 *sh2, int cycles)
  94. {
  95. UINT32 opcode;
  96. sh2->icount = cycles;
  97. if (sh2->icount <= 0)
  98. goto out;
  99. do
  100. {
  101. if (sh2->delay)
  102. {
  103. sh2->ppc = sh2->delay;
  104. opcode = (UINT32)(UINT16)RW(sh2, sh2->delay);
  105. // TODO: more branch types
  106. if ((opcode >> 13) == 5) { // BRA/BSR
  107. sh2->r[15] -= 4;
  108. WL(sh2, sh2->r[15], sh2->sr);
  109. sh2->r[15] -= 4;
  110. WL(sh2, sh2->r[15], sh2->pc);
  111. sh2->pc = RL(sh2, sh2->vbr + 6 * 4);
  112. sh2->icount -= 5;
  113. opcode = 9; // NOP
  114. }
  115. sh2->pc -= 2;
  116. }
  117. else
  118. {
  119. sh2->ppc = sh2->pc;
  120. opcode = (UINT32)(UINT16)RW(sh2, sh2->pc);
  121. }
  122. sh2->delay = 0;
  123. sh2->pc += 2;
  124. switch (opcode & ( 15 << 12))
  125. {
  126. case 0<<12: op0000(sh2, opcode); break;
  127. case 1<<12: op0001(sh2, opcode); break;
  128. case 2<<12: op0010(sh2, opcode); break;
  129. case 3<<12: op0011(sh2, opcode); break;
  130. case 4<<12: op0100(sh2, opcode); break;
  131. case 5<<12: op0101(sh2, opcode); break;
  132. case 6<<12: op0110(sh2, opcode); break;
  133. case 7<<12: op0111(sh2, opcode); break;
  134. case 8<<12: op1000(sh2, opcode); break;
  135. case 9<<12: op1001(sh2, opcode); break;
  136. case 10<<12: op1010(sh2, opcode); break;
  137. case 11<<12: op1011(sh2, opcode); break;
  138. case 12<<12: op1100(sh2, opcode); break;
  139. case 13<<12: op1101(sh2, opcode); break;
  140. case 14<<12: op1110(sh2, opcode); break;
  141. default: op1111(sh2, opcode); break;
  142. }
  143. sh2->icount--;
  144. if (sh2->test_irq && !sh2->delay)
  145. {
  146. int level = sh2->pending_level;
  147. if (level > ((sh2->sr >> 4) & 0x0f))
  148. {
  149. int vector = sh2->irq_callback(sh2, level);
  150. sh2_do_irq(sh2, level, vector);
  151. }
  152. sh2->test_irq = 0;
  153. }
  154. }
  155. while (sh2->icount > 0 || sh2->delay); /* can't interrupt before delay */
  156. out:
  157. return sh2->icount;
  158. }
  159. #else // if DRC_CMP
  160. int sh2_execute_interpreter(SH2 *sh2, int cycles)
  161. {
  162. static unsigned int base_pc_[2] = { 0, 0 };
  163. static unsigned int end_pc_[2] = { 0, 0 };
  164. static unsigned char op_flags_[2][BLOCK_INSN_LIMIT];
  165. unsigned int *base_pc = &base_pc_[sh2->is_slave];
  166. unsigned int *end_pc = &end_pc_[sh2->is_slave];
  167. unsigned char *op_flags = op_flags_[sh2->is_slave];
  168. unsigned int pc_expect;
  169. UINT32 opcode;
  170. sh2->icount = sh2->cycles_timeslice = cycles;
  171. if (sh2->pending_level > ((sh2->sr >> 4) & 0x0f))
  172. {
  173. int level = sh2->pending_level;
  174. int vector = sh2->irq_callback(sh2, level);
  175. sh2_do_irq(sh2, level, vector);
  176. }
  177. pc_expect = sh2->pc;
  178. if (sh2->icount <= 0)
  179. goto out;
  180. do
  181. {
  182. if (!sh2->delay) {
  183. if (sh2->pc < *base_pc || sh2->pc >= *end_pc) {
  184. *base_pc = sh2->pc;
  185. scan_block(*base_pc, sh2->is_slave,
  186. op_flags, end_pc, NULL, NULL);
  187. }
  188. if ((op_flags[(sh2->pc - *base_pc) / 2]
  189. & OF_BTARGET) || sh2->pc == *base_pc
  190. || pc_expect != sh2->pc) // branched
  191. {
  192. pc_expect = sh2->pc;
  193. if (sh2->icount <= 0)
  194. break;
  195. }
  196. do_sh2_trace(sh2, sh2->icount);
  197. }
  198. pc_expect += 2;
  199. if (sh2->delay)
  200. {
  201. sh2->ppc = sh2->delay;
  202. opcode = (UINT32)(UINT16)RW(sh2, sh2->delay);
  203. sh2->pc -= 2;
  204. }
  205. else
  206. {
  207. sh2->ppc = sh2->pc;
  208. opcode = (UINT32)(UINT16)RW(sh2, sh2->pc);
  209. }
  210. sh2->delay = 0;
  211. sh2->pc += 2;
  212. switch (opcode & ( 15 << 12))
  213. {
  214. case 0<<12: op0000(sh2, opcode); break;
  215. case 1<<12: op0001(sh2, opcode); break;
  216. case 2<<12: op0010(sh2, opcode); break;
  217. case 3<<12: op0011(sh2, opcode); break;
  218. case 4<<12: op0100(sh2, opcode); break;
  219. case 5<<12: op0101(sh2, opcode); break;
  220. case 6<<12: op0110(sh2, opcode); break;
  221. case 7<<12: op0111(sh2, opcode); break;
  222. case 8<<12: op1000(sh2, opcode); break;
  223. case 9<<12: op1001(sh2, opcode); break;
  224. case 10<<12: op1010(sh2, opcode); break;
  225. case 11<<12: op1011(sh2, opcode); break;
  226. case 12<<12: op1100(sh2, opcode); break;
  227. case 13<<12: op1101(sh2, opcode); break;
  228. case 14<<12: op1110(sh2, opcode); break;
  229. default: op1111(sh2, opcode); break;
  230. }
  231. sh2->icount--;
  232. if (sh2->test_irq && !sh2->delay && sh2->pending_level > ((sh2->sr >> 4) & 0x0f))
  233. {
  234. int level = sh2->pending_level;
  235. int vector = sh2->irq_callback(sh2, level);
  236. sh2_do_irq(sh2, level, vector);
  237. sh2->test_irq = 0;
  238. }
  239. }
  240. while (1);
  241. out:
  242. return sh2->icount;
  243. }
  244. #endif // DRC_CMP
  245. #ifdef SH2_STATS
  246. #include <stdio.h>
  247. #include <string.h>
  248. #include "sh2dasm.h"
  249. void sh2_dump_stats(void)
  250. {
  251. static const char *rnames[] = {
  252. "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
  253. "R8", "R9", "R10", "R11", "R12", "R13", "R14", "SP",
  254. "PC", "", "PR", "SR", "GBR", "VBR", "MACH", "MACL"
  255. };
  256. long long total;
  257. char buff[64];
  258. int u, i;
  259. // dump reg usage
  260. total = 0;
  261. for (i = 0; i < 24; i++)
  262. total += sh2_stats.r[i];
  263. for (i = 0; i < 24; i++) {
  264. if (i == 16 || i == 17 || i == 19)
  265. continue;
  266. printf("r %6.3f%% %-4s %9d\n", (double)sh2_stats.r[i] * 100.0 / total,
  267. rnames[i], sh2_stats.r[i]);
  268. }
  269. memset(&sh2_stats, 0, sizeof(sh2_stats));
  270. // dump ops
  271. printf("\n");
  272. total = 0;
  273. for (i = 0; i < 0x10000; i++)
  274. total += op_refs[i];
  275. for (u = 0; u < 16; u++) {
  276. int max = 0, op = 0;
  277. for (i = 0; i < 0x10000; i++) {
  278. if (op_refs[i] > max) {
  279. max = op_refs[i];
  280. op = i;
  281. }
  282. }
  283. DasmSH2(buff, 0, op);
  284. printf("i %6.3f%% %9d %s\n", (double)op_refs[op] * 100.0 / total,
  285. op_refs[op], buff);
  286. op_refs[op] = 0;
  287. }
  288. memset(op_refs, 0, sizeof(op_refs));
  289. }
  290. #endif