drz80.h 3.2 KB

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  1. /*
  2. * DrZ80 Version 1.0
  3. * Z80 Emulator by Reesy
  4. * Copyright 2005 Reesy
  5. *
  6. * This file is part of DrZ80.
  7. *
  8. * DrZ80 is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * DrZ80 is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with DrZ80; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  21. *
  22. */
  23. #ifdef __cplusplus
  24. extern "C" {
  25. #endif
  26. #ifndef DRZ80_H
  27. #define DRZ80_H
  28. extern int DrZ80Ver; /* Version number of library */
  29. struct DrZ80
  30. {
  31. unsigned int Z80PC; /*0x00 - PC Program Counter (Memory Base + PC) */
  32. unsigned int Z80A; /*0x04 - A Register: 0xAA------ */
  33. unsigned int Z80F; /*0x08 - F Register: 0x------FF */
  34. unsigned int Z80BC; /*0x0C - BC Registers: 0xBBCC---- */
  35. unsigned int Z80DE; /*0x10 - DE Registers: 0xDDEE---- */
  36. unsigned int Z80HL; /*0x14 - HL Registers: 0xHHLL---- */
  37. unsigned int Z80SP; /*0x18 - SP Stack Pointer (Memory Base + PC) */
  38. unsigned int Z80PC_BASE; /*0x1C - PC Program Counter (Memory Base) */
  39. unsigned int Z80SP_BASE; /*0x20 - SP Stack Pointer (Memory Base) */
  40. unsigned int Z80IX; /*0x24 - IX Index Register */
  41. unsigned int Z80IY; /*0x28 - IY Index Register */
  42. unsigned int Z80I; /*0x2C - I Interrupt Register */
  43. unsigned int Z80A2; /*0x30 - A' Register: 0xAA------ */
  44. unsigned int Z80F2; /*0x34 - F' Register: 0x------FF */
  45. unsigned int Z80BC2; /*0x38 - B'C' Registers: 0xBBCC---- */
  46. unsigned int Z80DE2; /*0x3C - D'E' Registers: 0xDDEE---- */
  47. unsigned int Z80HL2; /*0x40 - H'L' Registers: 0xHHLL---- */
  48. int cycles; /*0x44 - Cycles pending to be executed yet */
  49. int previouspc; /*0x48 - Previous PC */
  50. unsigned char Z80_IRQ; /*0x4C - Set IRQ Number (must be halfword aligned) */
  51. unsigned char Z80IF; /*0x4D - Interrupt Flags: bit0=_IFF1, bit1=_IFF2, bit2=_HALT, b3=NMI */
  52. unsigned char Z80IM; /*0x4E - Set IRQ Mode */
  53. unsigned char spare; /*0x4F - N/A */
  54. unsigned int z80irqvector; /*0x50 - Set IRQ Vector i.e. 0xFF=RST */
  55. void (*z80_irq_callback )(void);
  56. void (*z80_write8 )(unsigned char d,unsigned short a);
  57. void (*z80_write16 )(unsigned short d,unsigned short a);
  58. unsigned char (*z80_in)(unsigned short p);
  59. void (*z80_out )(unsigned short p,unsigned char d);
  60. unsigned char (*z80_read8)(unsigned short a);
  61. unsigned short (*z80_read16)(unsigned short a);
  62. unsigned int (*z80_rebaseSP)(unsigned short new_sp);
  63. unsigned int (*z80_rebasePC)(unsigned short new_pc);
  64. unsigned int bla;
  65. };
  66. extern int DrZ80Run(struct DrZ80 *pcy,unsigned int cyc);
  67. #endif
  68. #ifdef __cplusplus
  69. } /* End of extern "C" */
  70. #endif