memory_arm.S 6.0 KB

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  1. /*
  2. * PicoDrive
  3. * (C) notaz, 2006-2009
  4. *
  5. * This work is licensed under the terms of MAME license.
  6. * See COPYING file in the top-level directory.
  7. */
  8. #include "pico_int_o32.h"
  9. .equ SRR_MAPPED, (1 << 0)
  10. .equ SRR_READONLY, (1 << 1)
  11. .equ SRF_EEPROM, (1 << 1)
  12. .equ POPT_EN_32X, (1 << 20)
  13. .text
  14. .align 4
  15. .global PicoRead8_sram
  16. .global PicoRead8_io
  17. .global PicoRead16_sram
  18. .global PicoRead16_io
  19. .global PicoWrite8_io
  20. .global PicoWrite16_io
  21. PicoRead8_sram: @ u32 a
  22. ldr r3, =Pico
  23. ldr r1, [r3, #OFS_Pico_sv_end]
  24. cmp r0, r1
  25. bgt m_read8_nosram
  26. ldr r2, [r3, #OFS_Pico_sv_start]
  27. cmp r0, r2
  28. blt m_read8_nosram
  29. ldrb r1, [r3, #OFS_Pico_m_sram_reg]
  30. tst r1, #SRR_MAPPED
  31. beq m_read8_nosram
  32. ldr r1, [r3, #OFS_Pico_sv_flags]
  33. tst r1, #SRF_EEPROM
  34. bne m_read8_eeprom
  35. ldr r1, [r3, #OFS_Pico_sv_data]
  36. sub r0, r0, r2
  37. ldrb r0, [r0, r1]
  38. bx lr
  39. m_read8_nosram:
  40. ldr r1, [r3, #OFS_Pico_romsize]
  41. cmp r0, r1
  42. movgt r0, #0
  43. bxgt lr @ bad location
  44. @ XXX: banking unfriendly
  45. ldr r1, [r3, #OFS_Pico_rom]
  46. eor r0, r0, #1
  47. ldrb r0, [r1, r0]
  48. bx lr
  49. m_read8_eeprom:
  50. stmfd sp!,{r0,lr}
  51. bl EEPROM_read
  52. ldmfd sp!,{r1,lr}
  53. tst r1, #1
  54. moveq r0, r0, lsr #8
  55. bx lr
  56. PicoRead8_io: @ u32 a
  57. bic r2, r0, #0x001f @ most commonly we get i/o port read,
  58. cmp r2, #0xa10000 @ so check for it first
  59. beq io_ports_read
  60. m_read8_not_io:
  61. and r2, r0, #0xfc00
  62. cmp r2, #0x1000
  63. bne PicoRead8_32x
  64. ldr r3, =Pico
  65. mov r1, r0
  66. ldr r0, [r3, #OFS_Pico_m_rotate]
  67. add r0, r0, #1
  68. strb r0, [r3, #OFS_Pico_m_rotate]
  69. eor r0, r0, r0, lsl #6
  70. tst r1, #1
  71. bxne lr @ odd addr -> open bus
  72. bic r0, r0, #1 @ bit0 defined in this area
  73. and r2, r1, #0xff00
  74. cmp r2, #0x1100
  75. bxne lr @ not busreq
  76. ldrb r1, [r3, #OFS_Pico_m_z80Run]
  77. ldrb r2, [r3, #OFS_Pico_m_z80_reset]
  78. orr r0, r0, r1
  79. orr r0, r0, r2
  80. bx lr
  81. @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
  82. PicoRead16_sram: @ u32 a, u32 d
  83. ldr r3, =Pico
  84. ldr r1, [r3, #OFS_Pico_sv_end]
  85. cmp r0, r1
  86. bgt m_read16_nosram
  87. ldr r2, [r3, #OFS_Pico_sv_start]
  88. cmp r0, r2
  89. blt m_read16_nosram
  90. ldrb r1, [r3, #OFS_Pico_m_sram_reg]
  91. tst r1, #SRR_MAPPED
  92. beq m_read16_nosram
  93. ldr r1, [r3, #OFS_Pico_sv_flags]
  94. tst r1, #SRF_EEPROM
  95. bne EEPROM_read
  96. ldr r1, [r3, #OFS_Pico_sv_data]
  97. sub r0, r0, r2
  98. ldrb r1, [r0, r1]!
  99. ldrb r0, [r0, #1]
  100. orr r0, r0, r1, lsl #8
  101. bx lr
  102. m_read16_nosram:
  103. ldr r1, [r3, #OFS_Pico_romsize]
  104. cmp r0, r1
  105. movgt r0, #0
  106. bxgt lr @ bad location
  107. @ XXX: banking unfriendly
  108. ldr r1, [r3, #OFS_Pico_rom]
  109. ldrh r0, [r1, r0]
  110. bx lr
  111. PicoRead16_io: @ u32 a, u32 d
  112. bic r2, r0, #0x001f @ most commonly we get i/o port read,
  113. cmp r2, #0xa10000 @ so check for it first
  114. bne m_read16_not_io
  115. stmfd sp!,{lr}
  116. bl io_ports_read @ same as read8
  117. orr r0, r0, r0, lsl #8 @ only has bytes mirrored
  118. ldmfd sp!,{pc}
  119. m_read16_not_io:
  120. and r2, r0, #0xfc00
  121. cmp r2, #0x1000
  122. bne PicoRead16_32x
  123. ldr r3, =Pico
  124. and r2, r0, #0xff00
  125. ldr r0, [r3, #OFS_Pico_m_rotate]
  126. add r0, r0, #1
  127. strb r0, [r3, #OFS_Pico_m_rotate]
  128. eor r0, r0, r0, lsl #5
  129. eor r0, r0, r0, lsl #8
  130. bic r0, r0, #0x100 @ bit8 defined in this area
  131. cmp r2, #0x1100
  132. bxne lr @ not busreq
  133. ldrb r1, [r3, #OFS_Pico_m_z80Run]
  134. ldrb r2, [r3, #OFS_Pico_m_z80_reset]
  135. orr r0, r0, r1, lsl #8
  136. orr r0, r0, r2, lsl #8
  137. bx lr
  138. @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
  139. PicoWrite8_io: @ u32 a, u32 d
  140. bic r2, r0, #0x1e @ most commonly we get i/o port write,
  141. eor r2, r2, #0xa10000 @ so check for it first
  142. eors r2, r2, #1
  143. beq io_ports_write
  144. m_write8_not_io:
  145. tst r0, #1
  146. bne m_write8_not_z80ctl @ even addrs only
  147. and r2, r0, #0xff00
  148. cmp r2, #0x1100
  149. moveq r0, r1
  150. beq ctl_write_z80busreq
  151. cmp r2, #0x1200
  152. moveq r0, r1
  153. beq ctl_write_z80reset
  154. m_write8_not_z80ctl:
  155. @ unlikely
  156. eor r2, r0, #0xa10000
  157. eor r2, r2, #0x003000
  158. eors r2, r2, #0x0000f1
  159. bne PicoWrite8_32x
  160. ldr r3, =Pico
  161. ldrb r2, [r3, #OFS_Pico_m_sram_reg]
  162. and r1, r1, #(SRR_MAPPED|SRR_READONLY)
  163. bic r2, r2, #(SRR_MAPPED|SRR_READONLY)
  164. orr r2, r2, r1
  165. strb r2, [r3, #OFS_Pico_m_sram_reg]
  166. bx lr
  167. @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
  168. PicoWrite16_io: @ u32 a, u32 d
  169. bic r2, r0, #0x1f @ most commonly we get i/o port write,
  170. cmp r2, #0xa10000 @ so check for it first
  171. beq io_ports_write
  172. m_write16_not_io:
  173. and r2, r0, #0xff00
  174. cmp r2, #0x1100
  175. moveq r0, r1, lsr #8
  176. beq ctl_write_z80busreq
  177. cmp r2, #0x1200
  178. moveq r0, r1, lsr #8
  179. beq ctl_write_z80reset
  180. m_write16_not_z80ctl:
  181. @ unlikely
  182. eor r2, r0, #0xa10000
  183. eor r2, r2, #0x003000
  184. eors r2, r2, #0x0000f0
  185. bne PicoWrite16_32x
  186. ldr r3, =Pico
  187. ldrb r2, [r3, #OFS_Pico_m_sram_reg]
  188. and r1, r1, #(SRR_MAPPED|SRR_READONLY)
  189. bic r2, r2, #(SRR_MAPPED|SRR_READONLY)
  190. orr r2, r2, r1
  191. strb r2, [r3, #OFS_Pico_m_sram_reg]
  192. bx lr
  193. .pool
  194. @ vim:filetype=armasm