memory.c 37 KB

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  1. /*
  2. * memory handling
  3. * (c) Copyright Dave, 2004
  4. * (C) notaz, 2006-2010
  5. *
  6. * This work is licensed under the terms of MAME license.
  7. * See COPYING file in the top-level directory.
  8. */
  9. #include "pico_int.h"
  10. #include "memory.h"
  11. #include "sound/ym2612.h"
  12. #include "sound/sn76496.h"
  13. extern unsigned int lastSSRamWrite; // used by serial eeprom code
  14. uptr m68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];
  15. uptr m68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];
  16. uptr m68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];
  17. uptr m68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];
  18. static void xmap_set(uptr *map, int shift, u32 start_addr, u32 end_addr,
  19. const void *func_or_mh, int is_func)
  20. {
  21. #ifdef __clang__
  22. // workaround bug (segfault) in
  23. // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)
  24. volatile
  25. #endif
  26. uptr addr = (uptr)func_or_mh;
  27. int mask = (1 << shift) - 1;
  28. int i;
  29. if ((start_addr & mask) != 0 || (end_addr & mask) != mask) {
  30. elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: tried to map bad range: %06x-%06x",
  31. start_addr, end_addr);
  32. return;
  33. }
  34. if (addr & 1) {
  35. elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: ptr is not aligned: %08lx", addr);
  36. return;
  37. }
  38. if (!is_func)
  39. addr -= start_addr;
  40. for (i = start_addr >> shift; i <= end_addr >> shift; i++) {
  41. map[i] = addr >> 1;
  42. if (is_func)
  43. map[i] |= MAP_FLAG;
  44. }
  45. }
  46. void z80_map_set(uptr *map, u16 start_addr, u16 end_addr,
  47. const void *func_or_mh, int is_func)
  48. {
  49. xmap_set(map, Z80_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);
  50. #ifdef _USE_CZ80
  51. if (!is_func)
  52. Cz80_Set_Fetch(&CZ80, start_addr, end_addr, (FPTR)func_or_mh);
  53. #endif
  54. }
  55. void cpu68k_map_set(uptr *map, u32 start_addr, u32 end_addr,
  56. const void *func_or_mh, int is_func)
  57. {
  58. xmap_set(map, M68K_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);
  59. #ifdef EMU_F68K
  60. // setup FAME fetchmap
  61. if (!is_func)
  62. {
  63. int shiftout = 24 - FAMEC_FETCHBITS;
  64. int i = start_addr >> shiftout;
  65. uptr base = (uptr)func_or_mh - (i << shiftout);
  66. for (; i <= (end_addr >> shiftout); i++)
  67. PicoCpuFM68k.Fetch[i] = base;
  68. }
  69. #endif
  70. }
  71. // more specialized/optimized function (does same as above)
  72. void cpu68k_map_all_ram(u32 start_addr, u32 end_addr, void *ptr, int is_sub)
  73. {
  74. uptr *r8map, *r16map, *w8map, *w16map;
  75. uptr addr = (uptr)ptr;
  76. int shift = M68K_MEM_SHIFT;
  77. int i;
  78. if (!is_sub) {
  79. r8map = m68k_read8_map;
  80. r16map = m68k_read16_map;
  81. w8map = m68k_write8_map;
  82. w16map = m68k_write16_map;
  83. } else {
  84. r8map = s68k_read8_map;
  85. r16map = s68k_read16_map;
  86. w8map = s68k_write8_map;
  87. w16map = s68k_write16_map;
  88. }
  89. addr -= start_addr;
  90. addr >>= 1;
  91. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  92. r8map[i] = r16map[i] = w8map[i] = w16map[i] = addr;
  93. #ifdef EMU_F68K
  94. // setup FAME fetchmap
  95. {
  96. M68K_CONTEXT *ctx = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;
  97. int shiftout = 24 - FAMEC_FETCHBITS;
  98. i = start_addr >> shiftout;
  99. addr = (uptr)ptr - (i << shiftout);
  100. for (; i <= (end_addr >> shiftout); i++)
  101. ctx->Fetch[i] = addr;
  102. }
  103. #endif
  104. }
  105. static u32 m68k_unmapped_read8(u32 a)
  106. {
  107. elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
  108. return (PicoIn.AHW & PAHW_MCD) ? 0x00 : 0xff; // pulldown if MegaCD2 attached
  109. }
  110. static u32 m68k_unmapped_read16(u32 a)
  111. {
  112. elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);
  113. return (PicoIn.AHW & PAHW_MCD) ? 0x00 : 0xffff;
  114. }
  115. static void m68k_unmapped_write8(u32 a, u32 d)
  116. {
  117. elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
  118. }
  119. static void m68k_unmapped_write16(u32 a, u32 d)
  120. {
  121. elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
  122. }
  123. void m68k_map_unmap(u32 start_addr, u32 end_addr)
  124. {
  125. #ifdef __clang__
  126. // workaround bug (segfault) in
  127. // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)
  128. volatile
  129. #endif
  130. uptr addr;
  131. int shift = M68K_MEM_SHIFT;
  132. int i;
  133. addr = (uptr)m68k_unmapped_read8;
  134. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  135. m68k_read8_map[i] = (addr >> 1) | MAP_FLAG;
  136. addr = (uptr)m68k_unmapped_read16;
  137. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  138. m68k_read16_map[i] = (addr >> 1) | MAP_FLAG;
  139. addr = (uptr)m68k_unmapped_write8;
  140. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  141. m68k_write8_map[i] = (addr >> 1) | MAP_FLAG;
  142. addr = (uptr)m68k_unmapped_write16;
  143. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  144. m68k_write16_map[i] = (addr >> 1) | MAP_FLAG;
  145. }
  146. #ifndef _ASM_MEMORY_C
  147. MAKE_68K_READ8(m68k_read8, m68k_read8_map)
  148. MAKE_68K_READ16(m68k_read16, m68k_read16_map)
  149. MAKE_68K_READ32(m68k_read32, m68k_read16_map)
  150. MAKE_68K_WRITE8(m68k_write8, m68k_write8_map)
  151. MAKE_68K_WRITE16(m68k_write16, m68k_write16_map)
  152. MAKE_68K_WRITE32(m68k_write32, m68k_write16_map)
  153. #endif
  154. // -----------------------------------------------------------------
  155. static u32 ym2612_read_local_68k(void);
  156. static int ym2612_write_local(u32 a, u32 d, int is_from_z80);
  157. static void z80_mem_setup(void);
  158. #ifdef _ASM_MEMORY_C
  159. u32 PicoRead8_sram(u32 a);
  160. u32 PicoRead16_sram(u32 a);
  161. #endif
  162. #ifdef EMU_CORE_DEBUG
  163. u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};
  164. int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;
  165. extern unsigned int ppop;
  166. #endif
  167. #ifdef IO_STATS
  168. void log_io(unsigned int addr, int bits, int rw);
  169. #elif defined(_MSC_VER)
  170. #define log_io
  171. #else
  172. #define log_io(...)
  173. #endif
  174. #if defined(EMU_C68K)
  175. void cyclone_crashed(u32 pc, struct Cyclone *context)
  176. {
  177. elprintf(EL_STATUS|EL_ANOMALY, "%c68k crash detected @ %06x",
  178. context == &PicoCpuCM68k ? 'm' : 's', pc);
  179. context->membase = (u32)Pico.rom;
  180. context->pc = (u32)Pico.rom + Pico.romsize;
  181. }
  182. #endif
  183. // -----------------------------------------------------------------
  184. // memmap helpers
  185. static u32 read_pad_3btn(int i, u32 out_bits)
  186. {
  187. u32 pad = ~PicoIn.padInt[i]; // Get inverse of pad MXYZ SACB RLDU
  188. u32 value;
  189. if (out_bits & 0x40) // TH
  190. value = pad & 0x3f; // ?1CB RLDU
  191. else
  192. value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU
  193. value |= out_bits & 0x40;
  194. return value;
  195. }
  196. static u32 read_pad_6btn(int i, u32 out_bits)
  197. {
  198. u32 pad = ~PicoIn.padInt[i]; // Get inverse of pad MXYZ SACB RLDU
  199. int phase = Pico.m.padTHPhase[i];
  200. u32 value;
  201. if (phase == 2 && !(out_bits & 0x40)) {
  202. value = (pad & 0xc0) >> 2; // ?0SA 0000
  203. goto out;
  204. }
  205. else if(phase == 3) {
  206. if (out_bits & 0x40)
  207. return (pad & 0x30) | ((pad >> 8) & 0xf); // ?1CB MXYZ
  208. else
  209. return ((pad & 0xc0) >> 2) | 0x0f; // ?0SA 1111
  210. goto out;
  211. }
  212. if (out_bits & 0x40) // TH
  213. value = pad & 0x3f; // ?1CB RLDU
  214. else
  215. value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU
  216. out:
  217. value |= out_bits & 0x40;
  218. return value;
  219. }
  220. static u32 read_nothing(int i, u32 out_bits)
  221. {
  222. return 0xff;
  223. }
  224. typedef u32 (port_read_func)(int index, u32 out_bits);
  225. static port_read_func *port_readers[3] = {
  226. read_pad_3btn,
  227. read_pad_3btn,
  228. read_nothing
  229. };
  230. static NOINLINE u32 port_read(int i)
  231. {
  232. u32 data_reg = PicoMem.ioports[i + 1];
  233. u32 ctrl_reg = PicoMem.ioports[i + 4] | 0x80;
  234. u32 in, out;
  235. out = data_reg & ctrl_reg;
  236. // pull-ups: should be 0x7f, but Decap Attack has a bug where it temp.
  237. // disables output before doing TH-low read, so don't emulate it for TH.
  238. // Decap Attack reportedly doesn't work on Nomad but works on must
  239. // other MD revisions (different pull-up strength?).
  240. if (PicoIn.AHW & PAHW_32X) // don't do it on 32X, it breaks WWF Raw
  241. out |= 0x7f & ~ctrl_reg;
  242. else
  243. out |= 0x3f & ~ctrl_reg;
  244. in = port_readers[i](i, out);
  245. return (in & ~ctrl_reg) | (data_reg & ctrl_reg);
  246. }
  247. void PicoSetInputDevice(int port, enum input_device device)
  248. {
  249. port_read_func *func;
  250. if (port < 0 || port > 2)
  251. return;
  252. switch (device) {
  253. case PICO_INPUT_PAD_3BTN:
  254. func = read_pad_3btn;
  255. break;
  256. case PICO_INPUT_PAD_6BTN:
  257. func = read_pad_6btn;
  258. break;
  259. default:
  260. func = read_nothing;
  261. break;
  262. }
  263. port_readers[port] = func;
  264. }
  265. NOINLINE u32 io_ports_read(u32 a)
  266. {
  267. u32 d;
  268. a = (a>>1) & 0xf;
  269. switch (a) {
  270. case 0: d = Pico.m.hardware; break; // Hardware value (Version register)
  271. case 1: d = port_read(0); break;
  272. case 2: d = port_read(1); break;
  273. case 3: d = port_read(2); break;
  274. default: d = PicoMem.ioports[a]; break; // IO ports can be used as RAM
  275. }
  276. return d;
  277. }
  278. NOINLINE void io_ports_write(u32 a, u32 d)
  279. {
  280. a = (a>>1) & 0xf;
  281. // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
  282. if (1 <= a && a <= 2)
  283. {
  284. Pico.m.padDelay[a - 1] = 0;
  285. if (!(PicoMem.ioports[a] & 0x40) && (d & 0x40))
  286. Pico.m.padTHPhase[a - 1]++;
  287. }
  288. // certain IO ports can be used as RAM
  289. PicoMem.ioports[a] = d;
  290. }
  291. static int z80_cycles_from_68k(void)
  292. {
  293. int m68k_cnt = SekCyclesDone() - Pico.t.m68c_frame_start;
  294. return cycles_68k_to_z80(m68k_cnt);
  295. }
  296. void NOINLINE ctl_write_z80busreq(u32 d)
  297. {
  298. d&=1; d^=1;
  299. elprintf(EL_BUSREQ, "set_zrun: %i->%i [%u] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);
  300. if (d ^ Pico.m.z80Run)
  301. {
  302. if (d)
  303. {
  304. Pico.t.z80c_cnt = z80_cycles_from_68k() + 2;
  305. }
  306. else
  307. {
  308. if ((PicoIn.opt & POPT_EN_Z80) && !Pico.m.z80_reset) {
  309. pprof_start(m68k);
  310. PicoSyncZ80(SekCyclesDone());
  311. pprof_end_sub(m68k);
  312. }
  313. }
  314. Pico.m.z80Run = d;
  315. }
  316. }
  317. void NOINLINE ctl_write_z80reset(u32 d)
  318. {
  319. d&=1; d^=1;
  320. elprintf(EL_BUSREQ, "set_zreset: %i->%i [%u] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);
  321. if (d ^ Pico.m.z80_reset)
  322. {
  323. if (d)
  324. {
  325. if ((PicoIn.opt & POPT_EN_Z80) && Pico.m.z80Run) {
  326. pprof_start(m68k);
  327. PicoSyncZ80(SekCyclesDone());
  328. pprof_end_sub(m68k);
  329. }
  330. YM2612ResetChip();
  331. timers_reset();
  332. }
  333. else
  334. {
  335. Pico.t.z80c_cnt = z80_cycles_from_68k() + 2;
  336. z80_reset();
  337. }
  338. Pico.m.z80_reset = d;
  339. }
  340. }
  341. static void psg_write_68k(u32 d)
  342. {
  343. PsndDoPSG(z80_cycles_from_68k());
  344. SN76496Write(d);
  345. }
  346. static void psg_write_z80(u32 d)
  347. {
  348. PsndDoPSG(z80_cyclesDone());
  349. SN76496Write(d);
  350. }
  351. // -----------------------------------------------------------------
  352. #ifndef _ASM_MEMORY_C
  353. // cart (save) RAM area (usually 0x200000 - ...)
  354. static u32 PicoRead8_sram(u32 a)
  355. {
  356. u32 d;
  357. if (Pico.sv.start <= a && a <= Pico.sv.end && (Pico.m.sram_reg & SRR_MAPPED))
  358. {
  359. if (Pico.sv.flags & SRF_EEPROM) {
  360. d = EEPROM_read();
  361. if (!(a & 1))
  362. d >>= 8;
  363. d &= 0xff;
  364. } else
  365. d = *(u8 *)(Pico.sv.data - Pico.sv.start + a);
  366. elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);
  367. return d;
  368. }
  369. // XXX: this is banking unfriendly
  370. if (a < Pico.romsize)
  371. return Pico.rom[MEM_BE2(a)];
  372. return m68k_unmapped_read8(a);
  373. }
  374. static u32 PicoRead16_sram(u32 a)
  375. {
  376. u32 d;
  377. if (Pico.sv.start <= a && a <= Pico.sv.end && (Pico.m.sram_reg & SRR_MAPPED))
  378. {
  379. if (Pico.sv.flags & SRF_EEPROM)
  380. d = EEPROM_read();
  381. else {
  382. u8 *pm = (u8 *)(Pico.sv.data - Pico.sv.start + a);
  383. d = pm[0] << 8;
  384. d |= pm[1];
  385. }
  386. elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);
  387. return d;
  388. }
  389. if (a < Pico.romsize)
  390. return *(u16 *)(Pico.rom + a);
  391. return m68k_unmapped_read16(a);
  392. }
  393. #endif // _ASM_MEMORY_C
  394. static void PicoWrite8_sram(u32 a, u32 d)
  395. {
  396. if (a > Pico.sv.end || a < Pico.sv.start || !(Pico.m.sram_reg & SRR_MAPPED)) {
  397. m68k_unmapped_write8(a, d);
  398. return;
  399. }
  400. elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d & 0xff, SekPc);
  401. if (Pico.sv.flags & SRF_EEPROM)
  402. {
  403. EEPROM_write8(a, d);
  404. }
  405. else {
  406. u8 *pm = (u8 *)(Pico.sv.data - Pico.sv.start + a);
  407. if (*pm != (u8)d) {
  408. Pico.sv.changed = 1;
  409. *pm = (u8)d;
  410. }
  411. }
  412. }
  413. static void PicoWrite16_sram(u32 a, u32 d)
  414. {
  415. if (a > Pico.sv.end || a < Pico.sv.start || !(Pico.m.sram_reg & SRR_MAPPED)) {
  416. m68k_unmapped_write16(a, d);
  417. return;
  418. }
  419. elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d & 0xffff, SekPc);
  420. if (Pico.sv.flags & SRF_EEPROM)
  421. {
  422. EEPROM_write16(d);
  423. }
  424. else {
  425. u8 *pm = (u8 *)(Pico.sv.data - Pico.sv.start + a);
  426. if (pm[0] != (u8)(d >> 8)) {
  427. Pico.sv.changed = 1;
  428. pm[0] = (u8)(d >> 8);
  429. }
  430. if (pm[1] != (u8)d) {
  431. Pico.sv.changed = 1;
  432. pm[1] = (u8)d;
  433. }
  434. }
  435. }
  436. // z80 area (0xa00000 - 0xa0ffff)
  437. // TODO: verify mirrors VDP and bank reg (bank area mirroring verified)
  438. static u32 PicoRead8_z80(u32 a)
  439. {
  440. u32 d = 0xff;
  441. if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {
  442. elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);
  443. // open bus. Pulled down if MegaCD2 is attached.
  444. return 0;
  445. }
  446. if ((a & 0x4000) == 0x0000)
  447. d = PicoMem.zram[a & 0x1fff];
  448. else if ((a & 0x6000) == 0x4000) // 0x4000-0x5fff
  449. d = ym2612_read_local_68k();
  450. else
  451. elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
  452. return d;
  453. }
  454. static u32 PicoRead16_z80(u32 a)
  455. {
  456. u32 d = PicoRead8_z80(a);
  457. return d | (d << 8);
  458. }
  459. static void PicoWrite8_z80(u32 a, u32 d)
  460. {
  461. if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {
  462. // verified on real hw
  463. elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);
  464. return;
  465. }
  466. if ((a & 0x4000) == 0x0000) { // z80 RAM
  467. PicoMem.zram[a & 0x1fff] = (u8)d;
  468. return;
  469. }
  470. if ((a & 0x6000) == 0x4000) { // FM Sound
  471. if (PicoIn.opt & POPT_EN_FM)
  472. ym2612_write_local(a & 3, d & 0xff, 0);
  473. return;
  474. }
  475. // TODO: probably other VDP access too? Maybe more mirrors?
  476. if ((a & 0x7ff9) == 0x7f11) { // PSG Sound
  477. psg_write_68k(d);
  478. return;
  479. }
  480. if ((a & 0x7f00) == 0x6000) // Z80 BANK register
  481. {
  482. Pico.m.z80_bank68k >>= 1;
  483. Pico.m.z80_bank68k |= d << 8;
  484. Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one
  485. elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k << 15);
  486. return;
  487. }
  488. elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @ %06x", a, d&0xff, SekPc);
  489. }
  490. static void PicoWrite16_z80(u32 a, u32 d)
  491. {
  492. // for RAM, only most significant byte is sent
  493. // TODO: verify remaining accesses
  494. PicoWrite8_z80(a, d >> 8);
  495. }
  496. #ifndef _ASM_MEMORY_C
  497. // IO/control area (0xa10000 - 0xa1ffff)
  498. u32 PicoRead8_io(u32 a)
  499. {
  500. u32 d;
  501. if ((a & 0xffe0) == 0x0000) { // I/O ports
  502. d = io_ports_read(a);
  503. goto end;
  504. }
  505. // faking open bus (MegaCD pulldowns don't work here curiously)
  506. d = Pico.m.rotate++;
  507. d ^= d << 6;
  508. if ((a & 0xfc00) == 0x1000) {
  509. // bit8 seems to be readable in this range
  510. if (!(a & 1))
  511. d &= ~0x01;
  512. if ((a & 0xff01) == 0x1100) { // z80 busreq (verified)
  513. d |= (Pico.m.z80Run | Pico.m.z80_reset) & 1;
  514. elprintf(EL_BUSREQ, "get_zrun: %02x [%u] @%06x", d, SekCyclesDone(), SekPc);
  515. }
  516. goto end;
  517. }
  518. d = PicoRead8_32x(a);
  519. end:
  520. return d;
  521. }
  522. u32 PicoRead16_io(u32 a)
  523. {
  524. u32 d;
  525. if ((a & 0xffe0) == 0x0000) { // I/O ports
  526. d = io_ports_read(a);
  527. d |= d << 8;
  528. goto end;
  529. }
  530. // faking open bus
  531. d = (Pico.m.rotate += 0x41);
  532. d ^= (d << 5) ^ (d << 8);
  533. // bit8 seems to be readable in this range
  534. if ((a & 0xfc00) == 0x1000) {
  535. d &= ~0x0100;
  536. if ((a & 0xff00) == 0x1100) { // z80 busreq
  537. d |= ((Pico.m.z80Run | Pico.m.z80_reset) & 1) << 8;
  538. elprintf(EL_BUSREQ, "get_zrun: %04x [%u] @%06x", d, SekCyclesDone(), SekPc);
  539. }
  540. goto end;
  541. }
  542. d = PicoRead16_32x(a);
  543. end:
  544. return d;
  545. }
  546. void PicoWrite8_io(u32 a, u32 d)
  547. {
  548. if ((a & 0xffe1) == 0x0001) { // I/O ports (verified: only LSB!)
  549. io_ports_write(a, d);
  550. return;
  551. }
  552. if ((a & 0xff01) == 0x1100) { // z80 busreq
  553. ctl_write_z80busreq(d);
  554. return;
  555. }
  556. if ((a & 0xff01) == 0x1200) { // z80 reset
  557. ctl_write_z80reset(d);
  558. return;
  559. }
  560. if (a == 0xa130f1) { // sram access register
  561. elprintf(EL_SRAMIO, "sram reg=%02x", d);
  562. Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);
  563. Pico.m.sram_reg |= (u8)(d & 3);
  564. return;
  565. }
  566. PicoWrite8_32x(a, d);
  567. }
  568. void PicoWrite16_io(u32 a, u32 d)
  569. {
  570. if ((a & 0xffe0) == 0x0000) { // I/O ports (verified: only LSB!)
  571. io_ports_write(a, d);
  572. return;
  573. }
  574. if ((a & 0xff00) == 0x1100) { // z80 busreq
  575. ctl_write_z80busreq(d >> 8);
  576. return;
  577. }
  578. if ((a & 0xff00) == 0x1200) { // z80 reset
  579. ctl_write_z80reset(d >> 8);
  580. return;
  581. }
  582. if (a == 0xa130f0) { // sram access register
  583. elprintf(EL_SRAMIO, "sram reg=%02x", d);
  584. Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);
  585. Pico.m.sram_reg |= (u8)(d & 3);
  586. return;
  587. }
  588. PicoWrite16_32x(a, d);
  589. }
  590. #endif // _ASM_MEMORY_C
  591. // VDP area (0xc00000 - 0xdfffff)
  592. // TODO: verify if lower byte goes to PSG on word writes
  593. u32 PicoRead8_vdp(u32 a)
  594. {
  595. if ((a & 0x00f0) == 0x0000) {
  596. switch (a & 0x0d)
  597. {
  598. case 0x00: return PicoVideoRead8DataH(0);
  599. case 0x01: return PicoVideoRead8DataL(0);
  600. case 0x04: return PicoVideoRead8CtlH(0);
  601. case 0x05: return PicoVideoRead8CtlL(0);
  602. case 0x08:
  603. case 0x0c: return PicoVideoRead8HV_H(0);
  604. case 0x09:
  605. case 0x0d: return PicoVideoRead8HV_L(0);
  606. }
  607. }
  608. elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
  609. return 0;
  610. }
  611. static u32 PicoRead16_vdp(u32 a)
  612. {
  613. if ((a & 0x00e0) == 0x0000)
  614. return PicoVideoRead(a);
  615. elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
  616. return 0;
  617. }
  618. static void PicoWrite8_vdp(u32 a, u32 d)
  619. {
  620. if ((a & 0x00f9) == 0x0011) { // PSG Sound
  621. psg_write_68k(d);
  622. return;
  623. }
  624. if ((a & 0x00e0) == 0x0000) {
  625. d &= 0xff;
  626. PicoVideoWrite(a, d | (d << 8));
  627. return;
  628. }
  629. elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @%06x", a, d & 0xff, SekPc);
  630. }
  631. static void PicoWrite16_vdp(u32 a, u32 d)
  632. {
  633. if ((a & 0x00f9) == 0x0010) { // PSG Sound
  634. psg_write_68k(d);
  635. return;
  636. }
  637. if ((a & 0x00e0) == 0x0000) {
  638. PicoVideoWrite(a, d);
  639. return;
  640. }
  641. elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %04x @%06x", a, d & 0xffff, SekPc);
  642. }
  643. // -----------------------------------------------------------------
  644. #ifdef EMU_M68K
  645. static void m68k_mem_setup(void);
  646. #endif
  647. PICO_INTERNAL void PicoMemSetup(void)
  648. {
  649. int mask, rs, sstart, a;
  650. // setup the memory map
  651. cpu68k_map_set(m68k_read8_map, 0x000000, 0xffffff, m68k_unmapped_read8, 1);
  652. cpu68k_map_set(m68k_read16_map, 0x000000, 0xffffff, m68k_unmapped_read16, 1);
  653. cpu68k_map_set(m68k_write8_map, 0x000000, 0xffffff, m68k_unmapped_write8, 1);
  654. cpu68k_map_set(m68k_write16_map, 0x000000, 0xffffff, m68k_unmapped_write16, 1);
  655. // ROM
  656. // align to bank size. We know ROM loader allocated enough for this
  657. mask = (1 << M68K_MEM_SHIFT) - 1;
  658. rs = (Pico.romsize + mask) & ~mask;
  659. if (rs > 0x400000) rs = 0x400000; // max cartridge area
  660. cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico.rom, 0);
  661. cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico.rom, 0);
  662. // Common case of on-cart (save) RAM, usually at 0x200000-...
  663. if ((Pico.sv.flags & SRF_ENABLED) && Pico.sv.data != NULL) {
  664. sstart = Pico.sv.start & ~mask;
  665. rs = Pico.sv.end - sstart;
  666. rs = (rs + mask) & ~mask;
  667. if (sstart + rs >= 0x1000000)
  668. rs = 0x1000000 - sstart;
  669. cpu68k_map_set(m68k_read8_map, sstart, sstart + rs - 1, PicoRead8_sram, 1);
  670. cpu68k_map_set(m68k_read16_map, sstart, sstart + rs - 1, PicoRead16_sram, 1);
  671. cpu68k_map_set(m68k_write8_map, sstart, sstart + rs - 1, PicoWrite8_sram, 1);
  672. cpu68k_map_set(m68k_write16_map, sstart, sstart + rs - 1, PicoWrite16_sram, 1);
  673. }
  674. // Z80 region
  675. cpu68k_map_set(m68k_read8_map, 0xa00000, 0xa0ffff, PicoRead8_z80, 1);
  676. cpu68k_map_set(m68k_read16_map, 0xa00000, 0xa0ffff, PicoRead16_z80, 1);
  677. cpu68k_map_set(m68k_write8_map, 0xa00000, 0xa0ffff, PicoWrite8_z80, 1);
  678. cpu68k_map_set(m68k_write16_map, 0xa00000, 0xa0ffff, PicoWrite16_z80, 1);
  679. // IO/control region
  680. cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_io, 1);
  681. cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_io, 1);
  682. cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_io, 1);
  683. cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_io, 1);
  684. // VDP region
  685. for (a = 0xc00000; a < 0xe00000; a += 0x010000) {
  686. if ((a & 0xe700e0) != 0xc00000)
  687. continue;
  688. cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoRead8_vdp, 1);
  689. cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoRead16_vdp, 1);
  690. cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoWrite8_vdp, 1);
  691. cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoWrite16_vdp, 1);
  692. }
  693. // RAM and it's mirrors
  694. for (a = 0xe00000; a < 0x1000000; a += 0x010000) {
  695. cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoMem.ram, 0);
  696. cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoMem.ram, 0);
  697. cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoMem.ram, 0);
  698. cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoMem.ram, 0);
  699. }
  700. // Setup memory callbacks:
  701. #ifdef EMU_C68K
  702. PicoCpuCM68k.read8 = (void *)m68k_read8_map;
  703. PicoCpuCM68k.read16 = (void *)m68k_read16_map;
  704. PicoCpuCM68k.read32 = (void *)m68k_read16_map;
  705. PicoCpuCM68k.write8 = (void *)m68k_write8_map;
  706. PicoCpuCM68k.write16 = (void *)m68k_write16_map;
  707. PicoCpuCM68k.write32 = (void *)m68k_write16_map;
  708. PicoCpuCM68k.checkpc = NULL; /* unused */
  709. PicoCpuCM68k.fetch8 = NULL;
  710. PicoCpuCM68k.fetch16 = NULL;
  711. PicoCpuCM68k.fetch32 = NULL;
  712. #endif
  713. #ifdef EMU_F68K
  714. PicoCpuFM68k.read_byte = (void *)m68k_read8;
  715. PicoCpuFM68k.read_word = (void *)m68k_read16;
  716. PicoCpuFM68k.read_long = (void *)m68k_read32;
  717. PicoCpuFM68k.write_byte = (void *)m68k_write8;
  718. PicoCpuFM68k.write_word = (void *)m68k_write16;
  719. PicoCpuFM68k.write_long = (void *)m68k_write32;
  720. // setup FAME fetchmap
  721. {
  722. int i;
  723. // by default, point everything to first 64k of ROM
  724. for (i = 0; i < M68K_FETCHBANK1 * 0xe0 / 0x100; i++)
  725. PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
  726. // now real ROM
  727. for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
  728. PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom;
  729. // RAM already set
  730. }
  731. #endif
  732. #ifdef EMU_M68K
  733. m68k_mem_setup();
  734. #endif
  735. z80_mem_setup();
  736. }
  737. #ifdef EMU_M68K
  738. unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;
  739. unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;
  740. unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL;
  741. void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;
  742. void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;
  743. void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;
  744. /* it appears that Musashi doesn't always mask the unused bits */
  745. unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }
  746. unsigned int m68k_read_memory_16(unsigned int address) { return pm68k_read_memory_16(address) & 0xffff; }
  747. unsigned int m68k_read_memory_32(unsigned int address) { return pm68k_read_memory_32(address); }
  748. void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }
  749. void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }
  750. void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }
  751. static void m68k_mem_setup(void)
  752. {
  753. pm68k_read_memory_8 = m68k_read8;
  754. pm68k_read_memory_16 = m68k_read16;
  755. pm68k_read_memory_32 = m68k_read32;
  756. pm68k_write_memory_8 = m68k_write8;
  757. pm68k_write_memory_16 = m68k_write16;
  758. pm68k_write_memory_32 = m68k_write32;
  759. }
  760. #endif // EMU_M68K
  761. // -----------------------------------------------------------------
  762. static int get_scanline(int is_from_z80)
  763. {
  764. if (is_from_z80) {
  765. int mclk_z80 = (z80_cyclesLeft<0 ? Pico.t.z80c_aim : z80_cyclesDone()) * 15;
  766. int mclk_line = Pico.t.z80_scanline * 488 * 7;
  767. while (mclk_z80 - mclk_line >= 488 * 7)
  768. Pico.t.z80_scanline++, mclk_line += 488 * 7;
  769. return Pico.t.z80_scanline;
  770. }
  771. return Pico.m.scanline;
  772. }
  773. /* probably should not be in this file, but it's near related code here */
  774. void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new)
  775. {
  776. int xcycles = z80_cycles << 8;
  777. /* check for overflows */
  778. if ((mode_old & 4) && xcycles >= Pico.t.timer_a_next_oflow)
  779. ym2612.OPN.ST.status |= 1;
  780. if ((mode_old & 8) && xcycles >= Pico.t.timer_b_next_oflow)
  781. ym2612.OPN.ST.status |= 2;
  782. /* update timer a */
  783. if (mode_old & 1)
  784. while (xcycles > Pico.t.timer_a_next_oflow)
  785. Pico.t.timer_a_next_oflow += Pico.t.timer_a_step;
  786. if ((mode_old ^ mode_new) & 1) // turning on/off
  787. {
  788. if (mode_old & 1)
  789. Pico.t.timer_a_next_oflow = TIMER_NO_OFLOW;
  790. else
  791. Pico.t.timer_a_next_oflow = xcycles + Pico.t.timer_a_step;
  792. }
  793. if (mode_new & 1)
  794. elprintf(EL_YMTIMER, "timer a upd to %i @ %i", Pico.t.timer_a_next_oflow>>8, z80_cycles);
  795. /* update timer b */
  796. if (mode_old & 2)
  797. while (xcycles > Pico.t.timer_b_next_oflow)
  798. Pico.t.timer_b_next_oflow += Pico.t.timer_b_step;
  799. if ((mode_old ^ mode_new) & 2)
  800. {
  801. if (mode_old & 2)
  802. Pico.t.timer_b_next_oflow = TIMER_NO_OFLOW;
  803. else
  804. Pico.t.timer_b_next_oflow = xcycles + Pico.t.timer_b_step;
  805. }
  806. if (mode_new & 2)
  807. elprintf(EL_YMTIMER, "timer b upd to %i @ %i", Pico.t.timer_b_next_oflow>>8, z80_cycles);
  808. }
  809. // ym2612 DAC and timer I/O handlers for z80
  810. static int ym2612_write_local(u32 a, u32 d, int is_from_z80)
  811. {
  812. int addr;
  813. a &= 3;
  814. if (a == 1 && ym2612.OPN.ST.address == 0x2a) /* DAC data */
  815. {
  816. int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();
  817. //elprintf(EL_STATUS, "%03i dac w %08x z80 %i", cycles, d, is_from_z80);
  818. if (ym2612.dacen)
  819. PsndDoDAC(cycles);
  820. ym2612.dacout = ((int)d - 0x80) << 6;
  821. return 0;
  822. }
  823. switch (a)
  824. {
  825. case 0: /* address port 0 */
  826. ym2612.OPN.ST.address = d;
  827. ym2612.addr_A1 = 0;
  828. #ifdef __GP2X__
  829. if (PicoIn.opt & POPT_EXT_FM) YM2612Write_940(a, d, -1);
  830. #endif
  831. return 0;
  832. case 1: /* data port 0 */
  833. if (ym2612.addr_A1 != 0)
  834. return 0;
  835. addr = ym2612.OPN.ST.address;
  836. ym2612.REGS[addr] = d;
  837. switch (addr)
  838. {
  839. case 0x24: // timer A High 8
  840. case 0x25: { // timer A Low 2
  841. int TAnew = (addr == 0x24) ? ((ym2612.OPN.ST.TA & 0x03)|(((int)d)<<2))
  842. : ((ym2612.OPN.ST.TA & 0x3fc)|(d&3));
  843. if (ym2612.OPN.ST.TA != TAnew)
  844. {
  845. //elprintf(EL_STATUS, "timer a set %i", TAnew);
  846. ym2612.OPN.ST.TA = TAnew;
  847. //ym2612.OPN.ST.TAC = (1024-TAnew)*18;
  848. //ym2612.OPN.ST.TAT = 0;
  849. Pico.t.timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);
  850. if (ym2612.OPN.ST.mode & 1) {
  851. // this is not right, should really be done on overflow only
  852. int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();
  853. Pico.t.timer_a_next_oflow = (cycles << 8) + Pico.t.timer_a_step;
  854. }
  855. elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, Pico.t.timer_a_next_oflow>>8);
  856. }
  857. return 0;
  858. }
  859. case 0x26: // timer B
  860. if (ym2612.OPN.ST.TB != d) {
  861. //elprintf(EL_STATUS, "timer b set %i", d);
  862. ym2612.OPN.ST.TB = d;
  863. //ym2612.OPN.ST.TBC = (256-d) * 288;
  864. //ym2612.OPN.ST.TBT = 0;
  865. Pico.t.timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800
  866. if (ym2612.OPN.ST.mode & 2) {
  867. int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();
  868. Pico.t.timer_b_next_oflow = (cycles << 8) + Pico.t.timer_b_step;
  869. }
  870. elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, Pico.t.timer_b_next_oflow>>8);
  871. }
  872. return 0;
  873. case 0x27: { /* mode, timer control */
  874. int old_mode = ym2612.OPN.ST.mode;
  875. int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();
  876. ym2612.OPN.ST.mode = d;
  877. elprintf(EL_YMTIMER, "st mode %02x", d);
  878. ym2612_sync_timers(cycles, old_mode, d);
  879. /* reset Timer a flag */
  880. if (d & 0x10)
  881. ym2612.OPN.ST.status &= ~1;
  882. /* reset Timer b flag */
  883. if (d & 0x20)
  884. ym2612.OPN.ST.status &= ~2;
  885. if ((d ^ old_mode) & 0xc0) {
  886. #ifdef __GP2X__
  887. if (PicoIn.opt & POPT_EXT_FM) return YM2612Write_940(a, d, get_scanline(is_from_z80));
  888. #endif
  889. PsndDoFM(cycles);
  890. return 1;
  891. }
  892. return 0;
  893. }
  894. case 0x2b: { /* DAC Sel (YM2612) */
  895. ym2612.dacen = d & 0x80;
  896. #ifdef __GP2X__
  897. if (PicoIn.opt & POPT_EXT_FM) YM2612Write_940(a, d, get_scanline(is_from_z80));
  898. #endif
  899. return 0;
  900. }
  901. }
  902. break;
  903. case 2: /* address port 1 */
  904. ym2612.OPN.ST.address = d;
  905. ym2612.addr_A1 = 1;
  906. #ifdef __GP2X__
  907. if (PicoIn.opt & POPT_EXT_FM) YM2612Write_940(a, d, -1);
  908. #endif
  909. return 0;
  910. case 3: /* data port 1 */
  911. if (ym2612.addr_A1 != 1)
  912. return 0;
  913. addr = ym2612.OPN.ST.address | 0x100;
  914. ym2612.REGS[addr] = d;
  915. break;
  916. }
  917. #ifdef __GP2X__
  918. if (PicoIn.opt & POPT_EXT_FM)
  919. return YM2612Write_940(a, d, get_scanline(is_from_z80));
  920. #endif
  921. PsndDoFM(is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k());
  922. return YM2612Write_(a, d);
  923. }
  924. #define ym2612_read_local() \
  925. if (xcycles >= Pico.t.timer_a_next_oflow) \
  926. ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 1; \
  927. if (xcycles >= Pico.t.timer_b_next_oflow) \
  928. ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2
  929. static u32 ym2612_read_local_z80(void)
  930. {
  931. int xcycles = z80_cyclesDone() << 8;
  932. ym2612_read_local();
  933. elprintf(EL_YMTIMER, "timer z80 read %i, sched %i, %i @ %i|%i",
  934. ym2612.OPN.ST.status, Pico.t.timer_a_next_oflow >> 8,
  935. Pico.t.timer_b_next_oflow >> 8, xcycles >> 8, (xcycles >> 8) / 228);
  936. return ym2612.OPN.ST.status;
  937. }
  938. static u32 ym2612_read_local_68k(void)
  939. {
  940. int xcycles = z80_cycles_from_68k() << 8;
  941. ym2612_read_local();
  942. elprintf(EL_YMTIMER, "timer 68k read %i, sched %i, %i @ %i|%i",
  943. ym2612.OPN.ST.status, Pico.t.timer_a_next_oflow >> 8,
  944. Pico.t.timer_b_next_oflow >> 8, xcycles >> 8, (xcycles >> 8) / 228);
  945. return ym2612.OPN.ST.status;
  946. }
  947. void ym2612_pack_state(void)
  948. {
  949. // timers are saved as tick counts, in 16.16 int format
  950. int tac, tat = 0, tbc, tbt = 0;
  951. tac = 1024 - ym2612.OPN.ST.TA;
  952. tbc = 256 - ym2612.OPN.ST.TB;
  953. if (Pico.t.timer_a_next_oflow != TIMER_NO_OFLOW)
  954. tat = (int)((double)(Pico.t.timer_a_step - Pico.t.timer_a_next_oflow)
  955. / (double)Pico.t.timer_a_step * tac * 65536);
  956. if (Pico.t.timer_b_next_oflow != TIMER_NO_OFLOW)
  957. tbt = (int)((double)(Pico.t.timer_b_step - Pico.t.timer_b_next_oflow)
  958. / (double)Pico.t.timer_b_step * tbc * 65536);
  959. elprintf(EL_YMTIMER, "save: timer a %i/%i", tat >> 16, tac);
  960. elprintf(EL_YMTIMER, "save: timer b %i/%i", tbt >> 16, tbc);
  961. #ifdef __GP2X__
  962. if (PicoIn.opt & POPT_EXT_FM)
  963. YM2612PicoStateSave2_940(tat, tbt);
  964. else
  965. #endif
  966. YM2612PicoStateSave2(tat, tbt);
  967. }
  968. void ym2612_unpack_state(void)
  969. {
  970. int i, ret, tac, tat, tbc, tbt;
  971. YM2612PicoStateLoad();
  972. // feed all the registers and update internal state
  973. for (i = 0x20; i < 0xA0; i++) {
  974. ym2612_write_local(0, i, 0);
  975. ym2612_write_local(1, ym2612.REGS[i], 0);
  976. }
  977. for (i = 0x30; i < 0xA0; i++) {
  978. ym2612_write_local(2, i, 0);
  979. ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
  980. }
  981. for (i = 0xAF; i >= 0xA0; i--) { // must apply backwards
  982. ym2612_write_local(2, i, 0);
  983. ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
  984. ym2612_write_local(0, i, 0);
  985. ym2612_write_local(1, ym2612.REGS[i], 0);
  986. }
  987. for (i = 0xB0; i < 0xB8; i++) {
  988. ym2612_write_local(0, i, 0);
  989. ym2612_write_local(1, ym2612.REGS[i], 0);
  990. ym2612_write_local(2, i, 0);
  991. ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
  992. }
  993. #ifdef __GP2X__
  994. if (PicoIn.opt & POPT_EXT_FM)
  995. ret = YM2612PicoStateLoad2_940(&tat, &tbt);
  996. else
  997. #endif
  998. ret = YM2612PicoStateLoad2(&tat, &tbt);
  999. if (ret != 0) {
  1000. elprintf(EL_STATUS, "old ym2612 state");
  1001. return; // no saved timers
  1002. }
  1003. tac = (1024 - ym2612.OPN.ST.TA) << 16;
  1004. tbc = (256 - ym2612.OPN.ST.TB) << 16;
  1005. if (ym2612.OPN.ST.mode & 1)
  1006. Pico.t.timer_a_next_oflow = (int)((double)(tac - tat) / (double)tac * Pico.t.timer_a_step);
  1007. else
  1008. Pico.t.timer_a_next_oflow = TIMER_NO_OFLOW;
  1009. if (ym2612.OPN.ST.mode & 2)
  1010. Pico.t.timer_b_next_oflow = (int)((double)(tbc - tbt) / (double)tbc * Pico.t.timer_b_step);
  1011. else
  1012. Pico.t.timer_b_next_oflow = TIMER_NO_OFLOW;
  1013. elprintf(EL_YMTIMER, "load: %i/%i, timer_a_next_oflow %i", tat>>16, tac>>16, Pico.t.timer_a_next_oflow >> 8);
  1014. elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, Pico.t.timer_b_next_oflow >> 8);
  1015. }
  1016. #if defined(NO_32X) && defined(_ASM_MEMORY_C)
  1017. // referenced by asm code
  1018. u32 PicoRead8_32x(u32 a) { return 0; }
  1019. u32 PicoRead16_32x(u32 a) { return 0; }
  1020. void PicoWrite8_32x(u32 a, u32 d) {}
  1021. void PicoWrite16_32x(u32 a, u32 d) {}
  1022. #endif
  1023. // -----------------------------------------------------------------
  1024. // z80 memhandlers
  1025. static unsigned char z80_md_vdp_read(unsigned short a)
  1026. {
  1027. z80_subCLeft(2);
  1028. if ((a & 0x00f0) == 0x0000) {
  1029. switch (a & 0x0d)
  1030. {
  1031. case 0x00: return PicoVideoRead8DataH(1);
  1032. case 0x01: return PicoVideoRead8DataL(1);
  1033. case 0x04: return PicoVideoRead8CtlH(1);
  1034. case 0x05: return PicoVideoRead8CtlL(1);
  1035. case 0x08:
  1036. case 0x0c: return get_scanline(1); // FIXME: make it proper
  1037. case 0x09:
  1038. case 0x0d: return Pico.m.rotate++;
  1039. }
  1040. }
  1041. elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, 0xff);
  1042. return 0xff;
  1043. }
  1044. static unsigned char z80_md_bank_read(unsigned short a)
  1045. {
  1046. unsigned int addr68k;
  1047. unsigned char ret;
  1048. z80_subCLeft(3);
  1049. addr68k = Pico.m.z80_bank68k << 15;
  1050. addr68k |= a & 0x7fff;
  1051. ret = m68k_read8(addr68k);
  1052. elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);
  1053. return ret;
  1054. }
  1055. static void z80_md_ym2612_write(unsigned int a, unsigned char data)
  1056. {
  1057. if (PicoIn.opt & POPT_EN_FM)
  1058. ym2612_write_local(a, data, 1);
  1059. }
  1060. static void z80_md_vdp_br_write(unsigned int a, unsigned char data)
  1061. {
  1062. if ((a&0xfff9) == 0x7f11) // 7f11 7f13 7f15 7f17
  1063. {
  1064. psg_write_z80(data);
  1065. return;
  1066. }
  1067. // at least VDP data writes hang my machine
  1068. if ((a>>8) == 0x60)
  1069. {
  1070. Pico.m.z80_bank68k >>= 1;
  1071. Pico.m.z80_bank68k |= data << 8;
  1072. Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one
  1073. return;
  1074. }
  1075. elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);
  1076. }
  1077. static void z80_md_bank_write(unsigned int a, unsigned char data)
  1078. {
  1079. unsigned int addr68k;
  1080. addr68k = Pico.m.z80_bank68k << 15;
  1081. addr68k += a & 0x7fff;
  1082. elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);
  1083. m68k_write8(addr68k, data);
  1084. }
  1085. // -----------------------------------------------------------------
  1086. static unsigned char z80_md_in(unsigned short p)
  1087. {
  1088. elprintf(EL_ANOMALY, "Z80 port %04x read", p);
  1089. return 0xff;
  1090. }
  1091. static void z80_md_out(unsigned short p, unsigned char d)
  1092. {
  1093. elprintf(EL_ANOMALY, "Z80 port %04x write %02x", p, d);
  1094. }
  1095. static void z80_mem_setup(void)
  1096. {
  1097. z80_map_set(z80_read_map, 0x0000, 0x1fff, PicoMem.zram, 0);
  1098. z80_map_set(z80_read_map, 0x2000, 0x3fff, PicoMem.zram, 0);
  1099. z80_map_set(z80_read_map, 0x4000, 0x5fff, ym2612_read_local_z80, 1);
  1100. z80_map_set(z80_read_map, 0x6000, 0x7fff, z80_md_vdp_read, 1);
  1101. z80_map_set(z80_read_map, 0x8000, 0xffff, z80_md_bank_read, 1);
  1102. z80_map_set(z80_write_map, 0x0000, 0x1fff, PicoMem.zram, 0);
  1103. z80_map_set(z80_write_map, 0x2000, 0x3fff, PicoMem.zram, 0);
  1104. z80_map_set(z80_write_map, 0x4000, 0x5fff, z80_md_ym2612_write, 1);
  1105. z80_map_set(z80_write_map, 0x6000, 0x7fff, z80_md_vdp_br_write, 1);
  1106. z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write, 1);
  1107. #ifdef _USE_DRZ80
  1108. drZ80.z80_in = z80_md_in;
  1109. drZ80.z80_out = z80_md_out;
  1110. #endif
  1111. #ifdef _USE_CZ80
  1112. Cz80_Set_INPort(&CZ80, z80_md_in);
  1113. Cz80_Set_OUTPort(&CZ80, z80_md_out);
  1114. #endif
  1115. }
  1116. // vim:shiftwidth=2:ts=2:expandtab