memory_arm.S 6.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255
  1. /*
  2. * PicoDrive
  3. * (C) notaz, 2006-2009
  4. *
  5. * This work is licensed under the terms of MAME license.
  6. * See COPYING file in the top-level directory.
  7. */
  8. #include "pico_int_o32.h"
  9. .equ SRR_MAPPED, (1 << 0)
  10. .equ SRR_READONLY, (1 << 1)
  11. .equ SRF_EEPROM, (1 << 1)
  12. .equ POPT_EN_32X, (1 << 20)
  13. .text
  14. .align 4
  15. .global PicoRead8_sram
  16. .global PicoRead8_io
  17. .global PicoRead16_sram
  18. .global PicoRead16_io
  19. .global PicoWrite8_io
  20. .global PicoWrite16_io
  21. PicoRead8_sram: @ u32 a
  22. ldr r3, =Pico
  23. ldr r1, [r3, #OFS_Pico_sv_end]
  24. cmp r0, r1
  25. bgt m_read8_nosram
  26. ldr r2, [r3, #OFS_Pico_sv_start]
  27. cmp r0, r2
  28. blt m_read8_nosram
  29. ldrb r1, [r3, #OFS_Pico_m_sram_reg]
  30. tst r1, #SRR_MAPPED
  31. beq m_read8_nosram
  32. ldr r1, [r3, #OFS_Pico_sv_flags]
  33. tst r1, #SRF_EEPROM
  34. bne m_read8_eeprom
  35. ldr r1, [r3, #OFS_Pico_sv_data]
  36. sub r0, r0, r2
  37. ldrb r0, [r0, r1]
  38. bx lr
  39. m_read8_nosram:
  40. ldr r1, [r3, #OFS_Pico_romsize]
  41. cmp r0, r1
  42. movgt r0, #0
  43. bxgt lr @ bad location
  44. @ XXX: banking unfriendly
  45. ldr r1, [r3, #OFS_Pico_rom]
  46. eor r0, r0, #1
  47. ldrb r0, [r1, r0]
  48. bx lr
  49. m_read8_eeprom:
  50. stmfd sp!,{r0,lr}
  51. bl EEPROM_read
  52. ldmfd sp!,{r1,lr}
  53. tst r1, #1
  54. moveq r0, r0, lsr #8
  55. bx lr
  56. PicoRead8_io: @ u32 a
  57. bic r2, r0, #0x001f @ most commonly we get i/o port read,
  58. cmp r2, #0xa10000 @ so check for it first
  59. beq io_ports_read
  60. m_read8_not_io:
  61. and r2, r0, #0xfc00
  62. cmp r2, #0x1000
  63. bne m_read8_not_brq
  64. ldr r3, =Pico
  65. mov r1, r0
  66. ldr r0, [r3, #OFS_Pico_m_rotate]
  67. add r0, r0, #1
  68. strb r0, [r3, #OFS_Pico_m_rotate]
  69. eor r0, r0, r0, lsl #6
  70. tst r1, #1
  71. bxne lr @ odd addr -> open bus
  72. bic r0, r0, #1 @ bit0 defined in this area
  73. and r2, r1, #0xff00
  74. cmp r2, #0x1100
  75. bxne lr @ not busreq
  76. ldrb r1, [r3, #OFS_Pico_m_z80Run]
  77. ldrb r2, [r3, #OFS_Pico_m_z80_reset]
  78. orr r0, r0, r1
  79. orr r0, r0, r2
  80. bx lr
  81. m_read8_not_brq:
  82. ldr r2, =PicoOpt
  83. ldr r2, [r2]
  84. tst r2, #POPT_EN_32X
  85. bne PicoRead8_32x
  86. mov r0, #0
  87. bx lr
  88. @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
  89. PicoRead16_sram: @ u32 a, u32 d
  90. ldr r3, =Pico
  91. ldr r1, [r3, #OFS_Pico_sv_end]
  92. cmp r0, r1
  93. bgt m_read16_nosram
  94. ldr r2, [r3, #OFS_Pico_sv_start]
  95. cmp r0, r2
  96. blt m_read16_nosram
  97. ldrb r1, [r3, #OFS_Pico_m_sram_reg]
  98. tst r1, #SRR_MAPPED
  99. beq m_read16_nosram
  100. ldr r1, [r3, #OFS_Pico_sv_flags]
  101. tst r1, #SRF_EEPROM
  102. bne EEPROM_read
  103. ldr r1, [r3, #OFS_Pico_sv_data]
  104. sub r0, r0, r2
  105. ldrb r1, [r0, r1]!
  106. ldrb r0, [r0, #1]
  107. orr r0, r0, r1, lsl #8
  108. bx lr
  109. m_read16_nosram:
  110. ldr r1, [r3, #OFS_Pico_romsize]
  111. cmp r0, r1
  112. movgt r0, #0
  113. bxgt lr @ bad location
  114. @ XXX: banking unfriendly
  115. ldr r1, [r3, #OFS_Pico_rom]
  116. ldrh r0, [r1, r0]
  117. bx lr
  118. PicoRead16_io: @ u32 a, u32 d
  119. bic r2, r0, #0x001f @ most commonly we get i/o port read,
  120. cmp r2, #0xa10000 @ so check for it first
  121. bne m_read16_not_io
  122. stmfd sp!,{lr}
  123. bl io_ports_read @ same as read8
  124. orr r0, r0, r0, lsl #8 @ only has bytes mirrored
  125. ldmfd sp!,{pc}
  126. m_read16_not_io:
  127. and r2, r0, #0xfc00
  128. cmp r2, #0x1000
  129. bne m_read16_not_brq
  130. ldr r3, =Pico
  131. and r2, r0, #0xff00
  132. ldr r0, [r3, #OFS_Pico_m_rotate]
  133. add r0, r0, #1
  134. strb r0, [r3, #OFS_Pico_m_rotate]
  135. eor r0, r0, r0, lsl #5
  136. eor r0, r0, r0, lsl #8
  137. bic r0, r0, #0x100 @ bit8 defined in this area
  138. cmp r2, #0x1100
  139. bxne lr @ not busreq
  140. ldrb r1, [r3, #OFS_Pico_m_z80Run]
  141. ldrb r2, [r3, #OFS_Pico_m_z80_reset]
  142. orr r0, r0, r1, lsl #8
  143. orr r0, r0, r2, lsl #8
  144. bx lr
  145. m_read16_not_brq:
  146. ldr r2, =PicoOpt
  147. ldr r2, [r2]
  148. tst r2, #POPT_EN_32X
  149. bne PicoRead16_32x
  150. mov r0, #0
  151. bx lr
  152. @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
  153. PicoWrite8_io: @ u32 a, u32 d
  154. bic r2, r0, #0x1e @ most commonly we get i/o port write,
  155. eor r2, r2, #0xa10000 @ so check for it first
  156. eors r2, r2, #1
  157. beq io_ports_write
  158. m_write8_not_io:
  159. tst r0, #1
  160. bne m_write8_not_z80ctl @ even addrs only
  161. and r2, r0, #0xff00
  162. cmp r2, #0x1100
  163. moveq r0, r1
  164. beq ctl_write_z80busreq
  165. cmp r2, #0x1200
  166. moveq r0, r1
  167. beq ctl_write_z80reset
  168. m_write8_not_z80ctl:
  169. @ unlikely
  170. eor r2, r0, #0xa10000
  171. eor r2, r2, #0x003000
  172. eors r2, r2, #0x0000f1
  173. bne m_write8_not_sreg
  174. ldr r3, =Pico
  175. ldrb r2, [r3, #OFS_Pico_m_sram_reg]
  176. and r1, r1, #(SRR_MAPPED|SRR_READONLY)
  177. bic r2, r2, #(SRR_MAPPED|SRR_READONLY)
  178. orr r2, r2, r1
  179. strb r2, [r3, #OFS_Pico_m_sram_reg]
  180. bx lr
  181. m_write8_not_sreg:
  182. ldr r2, =PicoOpt
  183. ldr r2, [r2]
  184. tst r2, #POPT_EN_32X
  185. bne PicoWrite8_32x
  186. bx lr
  187. @ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
  188. PicoWrite16_io: @ u32 a, u32 d
  189. bic r2, r0, #0x1f @ most commonly we get i/o port write,
  190. cmp r2, #0xa10000 @ so check for it first
  191. beq io_ports_write
  192. m_write16_not_io:
  193. and r2, r0, #0xff00
  194. cmp r2, #0x1100
  195. moveq r0, r1, lsr #8
  196. beq ctl_write_z80busreq
  197. cmp r2, #0x1200
  198. moveq r0, r1, lsr #8
  199. beq ctl_write_z80reset
  200. m_write16_not_z80ctl:
  201. @ unlikely
  202. eor r2, r0, #0xa10000
  203. eor r2, r2, #0x003000
  204. eors r2, r2, #0x0000f0
  205. bne m_write16_not_sreg
  206. ldr r3, =Pico
  207. ldrb r2, [r3, #OFS_Pico_m_sram_reg]
  208. and r1, r1, #(SRR_MAPPED|SRR_READONLY)
  209. bic r2, r2, #(SRR_MAPPED|SRR_READONLY)
  210. orr r2, r2, r1
  211. strb r2, [r3, #OFS_Pico_m_sram_reg]
  212. bx lr
  213. m_write16_not_sreg:
  214. ldr r2, =PicoOpt
  215. ldr r2, [r2]
  216. tst r2, #POPT_EN_32X
  217. bne PicoWrite16_32x
  218. bx lr
  219. .pool
  220. @ vim:filetype=armasm