memory.c 36 KB

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  1. /*
  2. * memory handling
  3. * (c) Copyright Dave, 2004
  4. * (C) notaz, 2006-2010
  5. *
  6. * This work is licensed under the terms of MAME license.
  7. * See COPYING file in the top-level directory.
  8. */
  9. #include "pico_int.h"
  10. #include "memory.h"
  11. #include "sound/ym2612.h"
  12. #include "sound/sn76496.h"
  13. extern unsigned int lastSSRamWrite; // used by serial eeprom code
  14. uptr m68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];
  15. uptr m68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];
  16. uptr m68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];
  17. uptr m68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];
  18. static void xmap_set(uptr *map, int shift, int start_addr, int end_addr,
  19. const void *func_or_mh, int is_func)
  20. {
  21. #ifdef __clang__
  22. // workaround bug (segfault) in
  23. // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)
  24. volatile
  25. #endif
  26. uptr addr = (uptr)func_or_mh;
  27. int mask = (1 << shift) - 1;
  28. int i;
  29. if ((start_addr & mask) != 0 || (end_addr & mask) != mask) {
  30. elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: tried to map bad range: %06x-%06x",
  31. start_addr, end_addr);
  32. return;
  33. }
  34. if (addr & 1) {
  35. elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: ptr is not aligned: %08lx", addr);
  36. return;
  37. }
  38. if (!is_func)
  39. addr -= start_addr;
  40. for (i = start_addr >> shift; i <= end_addr >> shift; i++) {
  41. map[i] = addr >> 1;
  42. if (is_func)
  43. map[i] |= MAP_FLAG;
  44. }
  45. }
  46. void z80_map_set(uptr *map, int start_addr, int end_addr,
  47. const void *func_or_mh, int is_func)
  48. {
  49. xmap_set(map, Z80_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);
  50. }
  51. void cpu68k_map_set(uptr *map, int start_addr, int end_addr,
  52. const void *func_or_mh, int is_func)
  53. {
  54. xmap_set(map, M68K_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);
  55. #ifdef EMU_F68K
  56. // setup FAME fetchmap
  57. if (!is_func)
  58. {
  59. int shiftout = 24 - FAMEC_FETCHBITS;
  60. int i = start_addr >> shiftout;
  61. uptr base = (uptr)func_or_mh - (i << shiftout);
  62. for (; i <= (end_addr >> shiftout); i++)
  63. PicoCpuFM68k.Fetch[i] = base;
  64. }
  65. #endif
  66. }
  67. // more specialized/optimized function (does same as above)
  68. void cpu68k_map_all_ram(int start_addr, int end_addr, void *ptr, int is_sub)
  69. {
  70. uptr *r8map, *r16map, *w8map, *w16map;
  71. uptr addr = (uptr)ptr;
  72. int shift = M68K_MEM_SHIFT;
  73. int i;
  74. if (!is_sub) {
  75. r8map = m68k_read8_map;
  76. r16map = m68k_read16_map;
  77. w8map = m68k_write8_map;
  78. w16map = m68k_write16_map;
  79. } else {
  80. r8map = s68k_read8_map;
  81. r16map = s68k_read16_map;
  82. w8map = s68k_write8_map;
  83. w16map = s68k_write16_map;
  84. }
  85. addr -= start_addr;
  86. addr >>= 1;
  87. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  88. r8map[i] = r16map[i] = w8map[i] = w16map[i] = addr;
  89. #ifdef EMU_F68K
  90. // setup FAME fetchmap
  91. {
  92. M68K_CONTEXT *ctx = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;
  93. int shiftout = 24 - FAMEC_FETCHBITS;
  94. i = start_addr >> shiftout;
  95. addr = (uptr)ptr - (i << shiftout);
  96. for (; i <= (end_addr >> shiftout); i++)
  97. ctx->Fetch[i] = addr;
  98. }
  99. #endif
  100. }
  101. static u32 m68k_unmapped_read8(u32 a)
  102. {
  103. elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
  104. return 0; // assume pulldown, as if MegaCD2 was attached
  105. }
  106. static u32 m68k_unmapped_read16(u32 a)
  107. {
  108. elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);
  109. return 0;
  110. }
  111. static void m68k_unmapped_write8(u32 a, u32 d)
  112. {
  113. elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
  114. }
  115. static void m68k_unmapped_write16(u32 a, u32 d)
  116. {
  117. elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
  118. }
  119. void m68k_map_unmap(int start_addr, int end_addr)
  120. {
  121. #ifdef __clang__
  122. // workaround bug (segfault) in
  123. // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)
  124. volatile
  125. #endif
  126. uptr addr;
  127. int shift = M68K_MEM_SHIFT;
  128. int i;
  129. addr = (uptr)m68k_unmapped_read8;
  130. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  131. m68k_read8_map[i] = (addr >> 1) | MAP_FLAG;
  132. addr = (uptr)m68k_unmapped_read16;
  133. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  134. m68k_read16_map[i] = (addr >> 1) | MAP_FLAG;
  135. addr = (uptr)m68k_unmapped_write8;
  136. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  137. m68k_write8_map[i] = (addr >> 1) | MAP_FLAG;
  138. addr = (uptr)m68k_unmapped_write16;
  139. for (i = start_addr >> shift; i <= end_addr >> shift; i++)
  140. m68k_write16_map[i] = (addr >> 1) | MAP_FLAG;
  141. }
  142. MAKE_68K_READ8(m68k_read8, m68k_read8_map)
  143. MAKE_68K_READ16(m68k_read16, m68k_read16_map)
  144. MAKE_68K_READ32(m68k_read32, m68k_read16_map)
  145. MAKE_68K_WRITE8(m68k_write8, m68k_write8_map)
  146. MAKE_68K_WRITE16(m68k_write16, m68k_write16_map)
  147. MAKE_68K_WRITE32(m68k_write32, m68k_write16_map)
  148. // -----------------------------------------------------------------
  149. static u32 ym2612_read_local_68k(void);
  150. static int ym2612_write_local(u32 a, u32 d, int is_from_z80);
  151. static void z80_mem_setup(void);
  152. #ifdef _ASM_MEMORY_C
  153. u32 PicoRead8_sram(u32 a);
  154. u32 PicoRead16_sram(u32 a);
  155. #endif
  156. #ifdef EMU_CORE_DEBUG
  157. u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};
  158. int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;
  159. extern unsigned int ppop;
  160. #endif
  161. #ifdef IO_STATS
  162. void log_io(unsigned int addr, int bits, int rw);
  163. #elif defined(_MSC_VER)
  164. #define log_io
  165. #else
  166. #define log_io(...)
  167. #endif
  168. #if defined(EMU_C68K)
  169. void cyclone_crashed(u32 pc, struct Cyclone *context)
  170. {
  171. elprintf(EL_STATUS|EL_ANOMALY, "%c68k crash detected @ %06x",
  172. context == &PicoCpuCM68k ? 'm' : 's', pc);
  173. context->membase = (u32)Pico.rom;
  174. context->pc = (u32)Pico.rom + Pico.romsize;
  175. }
  176. #endif
  177. // -----------------------------------------------------------------
  178. // memmap helpers
  179. static u32 read_pad_3btn(int i, u32 out_bits)
  180. {
  181. u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU
  182. u32 value;
  183. if (out_bits & 0x40) // TH
  184. value = pad & 0x3f; // ?1CB RLDU
  185. else
  186. value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU
  187. value |= out_bits & 0x40;
  188. return value;
  189. }
  190. static u32 read_pad_6btn(int i, u32 out_bits)
  191. {
  192. u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU
  193. int phase = Pico.m.padTHPhase[i];
  194. u32 value;
  195. if (phase == 2 && !(out_bits & 0x40)) {
  196. value = (pad & 0xc0) >> 2; // ?0SA 0000
  197. goto out;
  198. }
  199. else if(phase == 3) {
  200. if (out_bits & 0x40)
  201. return (pad & 0x30) | ((pad >> 8) & 0xf); // ?1CB MXYZ
  202. else
  203. return ((pad & 0xc0) >> 2) | 0x0f; // ?0SA 1111
  204. goto out;
  205. }
  206. if (out_bits & 0x40) // TH
  207. value = pad & 0x3f; // ?1CB RLDU
  208. else
  209. value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU
  210. out:
  211. value |= out_bits & 0x40;
  212. return value;
  213. }
  214. static u32 read_nothing(int i, u32 out_bits)
  215. {
  216. return 0xff;
  217. }
  218. typedef u32 (port_read_func)(int index, u32 out_bits);
  219. static port_read_func *port_readers[3] = {
  220. read_pad_3btn,
  221. read_pad_3btn,
  222. read_nothing
  223. };
  224. static NOINLINE u32 port_read(int i)
  225. {
  226. u32 data_reg = PicoMem.ioports[i + 1];
  227. u32 ctrl_reg = PicoMem.ioports[i + 4] | 0x80;
  228. u32 in, out;
  229. out = data_reg & ctrl_reg;
  230. out |= 0x7f & ~ctrl_reg; // pull-ups
  231. in = port_readers[i](i, out);
  232. return (in & ~ctrl_reg) | (data_reg & ctrl_reg);
  233. }
  234. void PicoSetInputDevice(int port, enum input_device device)
  235. {
  236. port_read_func *func;
  237. if (port < 0 || port > 2)
  238. return;
  239. switch (device) {
  240. case PICO_INPUT_PAD_3BTN:
  241. func = read_pad_3btn;
  242. break;
  243. case PICO_INPUT_PAD_6BTN:
  244. func = read_pad_6btn;
  245. break;
  246. default:
  247. func = read_nothing;
  248. break;
  249. }
  250. port_readers[port] = func;
  251. }
  252. NOINLINE u32 io_ports_read(u32 a)
  253. {
  254. u32 d;
  255. a = (a>>1) & 0xf;
  256. switch (a) {
  257. case 0: d = Pico.m.hardware; break; // Hardware value (Version register)
  258. case 1: d = port_read(0); break;
  259. case 2: d = port_read(1); break;
  260. case 3: d = port_read(2); break;
  261. default: d = PicoMem.ioports[a]; break; // IO ports can be used as RAM
  262. }
  263. return d;
  264. }
  265. NOINLINE void io_ports_write(u32 a, u32 d)
  266. {
  267. a = (a>>1) & 0xf;
  268. // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
  269. if (1 <= a && a <= 2)
  270. {
  271. Pico.m.padDelay[a - 1] = 0;
  272. if (!(PicoMem.ioports[a] & 0x40) && (d & 0x40))
  273. Pico.m.padTHPhase[a - 1]++;
  274. }
  275. // certain IO ports can be used as RAM
  276. PicoMem.ioports[a] = d;
  277. }
  278. static int z80_cycles_from_68k(void)
  279. {
  280. int m68k_cnt = SekCyclesDone() - Pico.t.m68c_frame_start;
  281. return cycles_68k_to_z80(m68k_cnt);
  282. }
  283. void NOINLINE ctl_write_z80busreq(u32 d)
  284. {
  285. d&=1; d^=1;
  286. elprintf(EL_BUSREQ, "set_zrun: %i->%i [%u] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);
  287. if (d ^ Pico.m.z80Run)
  288. {
  289. if (d)
  290. {
  291. Pico.t.z80c_cnt = z80_cycles_from_68k() + 2;
  292. }
  293. else
  294. {
  295. if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset) {
  296. pprof_start(m68k);
  297. PicoSyncZ80(SekCyclesDone());
  298. pprof_end_sub(m68k);
  299. }
  300. }
  301. Pico.m.z80Run = d;
  302. }
  303. }
  304. void NOINLINE ctl_write_z80reset(u32 d)
  305. {
  306. d&=1; d^=1;
  307. elprintf(EL_BUSREQ, "set_zreset: %i->%i [%u] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);
  308. if (d ^ Pico.m.z80_reset)
  309. {
  310. if (d)
  311. {
  312. if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run) {
  313. pprof_start(m68k);
  314. PicoSyncZ80(SekCyclesDone());
  315. pprof_end_sub(m68k);
  316. }
  317. YM2612ResetChip();
  318. timers_reset();
  319. }
  320. else
  321. {
  322. Pico.t.z80c_cnt = z80_cycles_from_68k() + 2;
  323. z80_reset();
  324. }
  325. Pico.m.z80_reset = d;
  326. }
  327. }
  328. static int get_scanline(int is_from_z80);
  329. static void psg_write_68k(u32 d)
  330. {
  331. // look for volume write and update if needed
  332. if ((d & 0x90) == 0x90 && PsndPsgLine < Pico.m.scanline)
  333. PsndDoPSG(Pico.m.scanline);
  334. SN76496Write(d);
  335. }
  336. static void psg_write_z80(u32 d)
  337. {
  338. if ((d & 0x90) == 0x90) {
  339. int scanline = get_scanline(1);
  340. if (PsndPsgLine < scanline)
  341. PsndDoPSG(scanline);
  342. }
  343. SN76496Write(d);
  344. }
  345. // -----------------------------------------------------------------
  346. #ifndef _ASM_MEMORY_C
  347. // cart (save) RAM area (usually 0x200000 - ...)
  348. static u32 PicoRead8_sram(u32 a)
  349. {
  350. u32 d;
  351. if (Pico.sv.start <= a && a <= Pico.sv.end && (Pico.m.sram_reg & SRR_MAPPED))
  352. {
  353. if (Pico.sv.flags & SRF_EEPROM) {
  354. d = EEPROM_read();
  355. if (!(a & 1))
  356. d >>= 8;
  357. } else
  358. d = *(u8 *)(Pico.sv.data - Pico.sv.start + a);
  359. elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);
  360. return d;
  361. }
  362. // XXX: this is banking unfriendly
  363. if (a < Pico.romsize)
  364. return Pico.rom[a ^ 1];
  365. return m68k_unmapped_read8(a);
  366. }
  367. static u32 PicoRead16_sram(u32 a)
  368. {
  369. u32 d;
  370. if (Pico.sv.start <= a && a <= Pico.sv.end && (Pico.m.sram_reg & SRR_MAPPED))
  371. {
  372. if (Pico.sv.flags & SRF_EEPROM)
  373. d = EEPROM_read();
  374. else {
  375. u8 *pm = (u8 *)(Pico.sv.data - Pico.sv.start + a);
  376. d = pm[0] << 8;
  377. d |= pm[1];
  378. }
  379. elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);
  380. return d;
  381. }
  382. if (a < Pico.romsize)
  383. return *(u16 *)(Pico.rom + a);
  384. return m68k_unmapped_read16(a);
  385. }
  386. #endif // _ASM_MEMORY_C
  387. static void PicoWrite8_sram(u32 a, u32 d)
  388. {
  389. if (a > Pico.sv.end || a < Pico.sv.start || !(Pico.m.sram_reg & SRR_MAPPED)) {
  390. m68k_unmapped_write8(a, d);
  391. return;
  392. }
  393. elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d & 0xff, SekPc);
  394. if (Pico.sv.flags & SRF_EEPROM)
  395. {
  396. EEPROM_write8(a, d);
  397. }
  398. else {
  399. u8 *pm = (u8 *)(Pico.sv.data - Pico.sv.start + a);
  400. if (*pm != (u8)d) {
  401. Pico.sv.changed = 1;
  402. *pm = (u8)d;
  403. }
  404. }
  405. }
  406. static void PicoWrite16_sram(u32 a, u32 d)
  407. {
  408. if (a > Pico.sv.end || a < Pico.sv.start || !(Pico.m.sram_reg & SRR_MAPPED)) {
  409. m68k_unmapped_write16(a, d);
  410. return;
  411. }
  412. elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d & 0xffff, SekPc);
  413. if (Pico.sv.flags & SRF_EEPROM)
  414. {
  415. EEPROM_write16(d);
  416. }
  417. else {
  418. u8 *pm = (u8 *)(Pico.sv.data - Pico.sv.start + a);
  419. if (pm[0] != (u8)(d >> 8)) {
  420. Pico.sv.changed = 1;
  421. pm[0] = (u8)(d >> 8);
  422. }
  423. if (pm[1] != (u8)d) {
  424. Pico.sv.changed = 1;
  425. pm[1] = (u8)d;
  426. }
  427. }
  428. }
  429. // z80 area (0xa00000 - 0xa0ffff)
  430. // TODO: verify mirrors VDP and bank reg (bank area mirroring verified)
  431. static u32 PicoRead8_z80(u32 a)
  432. {
  433. u32 d = 0xff;
  434. if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {
  435. elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);
  436. // open bus. Pulled down if MegaCD2 is attached.
  437. return 0;
  438. }
  439. if ((a & 0x4000) == 0x0000)
  440. d = PicoMem.zram[a & 0x1fff];
  441. else if ((a & 0x6000) == 0x4000) // 0x4000-0x5fff
  442. d = ym2612_read_local_68k();
  443. else
  444. elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
  445. return d;
  446. }
  447. static u32 PicoRead16_z80(u32 a)
  448. {
  449. u32 d = PicoRead8_z80(a);
  450. return d | (d << 8);
  451. }
  452. static void PicoWrite8_z80(u32 a, u32 d)
  453. {
  454. if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {
  455. // verified on real hw
  456. elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);
  457. return;
  458. }
  459. if ((a & 0x4000) == 0x0000) { // z80 RAM
  460. PicoMem.zram[a & 0x1fff] = (u8)d;
  461. return;
  462. }
  463. if ((a & 0x6000) == 0x4000) { // FM Sound
  464. if (PicoOpt & POPT_EN_FM)
  465. emustatus |= ym2612_write_local(a&3, d&0xff, 0)&1;
  466. return;
  467. }
  468. // TODO: probably other VDP access too? Maybe more mirrors?
  469. if ((a & 0x7ff9) == 0x7f11) { // PSG Sound
  470. psg_write_68k(d);
  471. return;
  472. }
  473. if ((a & 0x7f00) == 0x6000) // Z80 BANK register
  474. {
  475. Pico.m.z80_bank68k >>= 1;
  476. Pico.m.z80_bank68k |= d << 8;
  477. Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one
  478. elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k << 15);
  479. return;
  480. }
  481. elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @ %06x", a, d&0xff, SekPc);
  482. }
  483. static void PicoWrite16_z80(u32 a, u32 d)
  484. {
  485. // for RAM, only most significant byte is sent
  486. // TODO: verify remaining accesses
  487. PicoWrite8_z80(a, d >> 8);
  488. }
  489. #ifndef _ASM_MEMORY_C
  490. // IO/control area (0xa10000 - 0xa1ffff)
  491. u32 PicoRead8_io(u32 a)
  492. {
  493. u32 d;
  494. if ((a & 0xffe0) == 0x0000) { // I/O ports
  495. d = io_ports_read(a);
  496. goto end;
  497. }
  498. // faking open bus (MegaCD pulldowns don't work here curiously)
  499. d = Pico.m.rotate++;
  500. d ^= d << 6;
  501. if ((a & 0xfc00) == 0x1000) {
  502. // bit8 seems to be readable in this range
  503. if (!(a & 1))
  504. d &= ~0x01;
  505. if ((a & 0xff01) == 0x1100) { // z80 busreq (verified)
  506. d |= (Pico.m.z80Run | Pico.m.z80_reset) & 1;
  507. elprintf(EL_BUSREQ, "get_zrun: %02x [%u] @%06x", d, SekCyclesDone(), SekPc);
  508. }
  509. goto end;
  510. }
  511. if (PicoOpt & POPT_EN_32X) {
  512. d = PicoRead8_32x(a);
  513. goto end;
  514. }
  515. d = m68k_unmapped_read8(a);
  516. end:
  517. return d;
  518. }
  519. u32 PicoRead16_io(u32 a)
  520. {
  521. u32 d;
  522. if ((a & 0xffe0) == 0x0000) { // I/O ports
  523. d = io_ports_read(a);
  524. d |= d << 8;
  525. goto end;
  526. }
  527. // faking open bus
  528. d = (Pico.m.rotate += 0x41);
  529. d ^= (d << 5) ^ (d << 8);
  530. // bit8 seems to be readable in this range
  531. if ((a & 0xfc00) == 0x1000) {
  532. d &= ~0x0100;
  533. if ((a & 0xff00) == 0x1100) { // z80 busreq
  534. d |= ((Pico.m.z80Run | Pico.m.z80_reset) & 1) << 8;
  535. elprintf(EL_BUSREQ, "get_zrun: %04x [%u] @%06x", d, SekCyclesDone(), SekPc);
  536. }
  537. goto end;
  538. }
  539. if (PicoOpt & POPT_EN_32X) {
  540. d = PicoRead16_32x(a);
  541. goto end;
  542. }
  543. d = m68k_unmapped_read16(a);
  544. end:
  545. return d;
  546. }
  547. void PicoWrite8_io(u32 a, u32 d)
  548. {
  549. if ((a & 0xffe1) == 0x0001) { // I/O ports (verified: only LSB!)
  550. io_ports_write(a, d);
  551. return;
  552. }
  553. if ((a & 0xff01) == 0x1100) { // z80 busreq
  554. ctl_write_z80busreq(d);
  555. return;
  556. }
  557. if ((a & 0xff01) == 0x1200) { // z80 reset
  558. ctl_write_z80reset(d);
  559. return;
  560. }
  561. if (a == 0xa130f1) { // sram access register
  562. elprintf(EL_SRAMIO, "sram reg=%02x", d);
  563. Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);
  564. Pico.m.sram_reg |= (u8)(d & 3);
  565. return;
  566. }
  567. if (PicoOpt & POPT_EN_32X) {
  568. PicoWrite8_32x(a, d);
  569. return;
  570. }
  571. m68k_unmapped_write8(a, d);
  572. }
  573. void PicoWrite16_io(u32 a, u32 d)
  574. {
  575. if ((a & 0xffe0) == 0x0000) { // I/O ports (verified: only LSB!)
  576. io_ports_write(a, d);
  577. return;
  578. }
  579. if ((a & 0xff00) == 0x1100) { // z80 busreq
  580. ctl_write_z80busreq(d >> 8);
  581. return;
  582. }
  583. if ((a & 0xff00) == 0x1200) { // z80 reset
  584. ctl_write_z80reset(d >> 8);
  585. return;
  586. }
  587. if (a == 0xa130f0) { // sram access register
  588. elprintf(EL_SRAMIO, "sram reg=%02x", d);
  589. Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);
  590. Pico.m.sram_reg |= (u8)(d & 3);
  591. return;
  592. }
  593. if (PicoOpt & POPT_EN_32X) {
  594. PicoWrite16_32x(a, d);
  595. return;
  596. }
  597. m68k_unmapped_write16(a, d);
  598. }
  599. #endif // _ASM_MEMORY_C
  600. // VDP area (0xc00000 - 0xdfffff)
  601. // TODO: verify if lower byte goes to PSG on word writes
  602. u32 PicoRead8_vdp(u32 a)
  603. {
  604. if ((a & 0x00f0) == 0x0000) {
  605. switch (a & 0x0d)
  606. {
  607. case 0x00: return PicoVideoRead8DataH();
  608. case 0x01: return PicoVideoRead8DataL();
  609. case 0x04: return PicoVideoRead8CtlH();
  610. case 0x05: return PicoVideoRead8CtlL();
  611. case 0x08:
  612. case 0x0c: return PicoVideoRead8HV_H();
  613. case 0x09:
  614. case 0x0d: return PicoVideoRead8HV_L();
  615. }
  616. }
  617. elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
  618. return 0;
  619. }
  620. static u32 PicoRead16_vdp(u32 a)
  621. {
  622. if ((a & 0x00e0) == 0x0000)
  623. return PicoVideoRead(a);
  624. elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
  625. return 0;
  626. }
  627. static void PicoWrite8_vdp(u32 a, u32 d)
  628. {
  629. if ((a & 0x00f9) == 0x0011) { // PSG Sound
  630. psg_write_68k(d);
  631. return;
  632. }
  633. if ((a & 0x00e0) == 0x0000) {
  634. d &= 0xff;
  635. PicoVideoWrite(a, d | (d << 8));
  636. return;
  637. }
  638. elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @%06x", a, d & 0xff, SekPc);
  639. }
  640. static void PicoWrite16_vdp(u32 a, u32 d)
  641. {
  642. if ((a & 0x00f9) == 0x0010) // PSG Sound
  643. psg_write_68k(d);
  644. if ((a & 0x00e0) == 0x0000) {
  645. PicoVideoWrite(a, d);
  646. return;
  647. }
  648. elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %04x @%06x", a, d & 0xffff, SekPc);
  649. }
  650. // -----------------------------------------------------------------
  651. #ifdef EMU_M68K
  652. static void m68k_mem_setup(void);
  653. #endif
  654. PICO_INTERNAL void PicoMemSetup(void)
  655. {
  656. int mask, rs, sstart, a;
  657. // setup the memory map
  658. cpu68k_map_set(m68k_read8_map, 0x000000, 0xffffff, m68k_unmapped_read8, 1);
  659. cpu68k_map_set(m68k_read16_map, 0x000000, 0xffffff, m68k_unmapped_read16, 1);
  660. cpu68k_map_set(m68k_write8_map, 0x000000, 0xffffff, m68k_unmapped_write8, 1);
  661. cpu68k_map_set(m68k_write16_map, 0x000000, 0xffffff, m68k_unmapped_write16, 1);
  662. // ROM
  663. // align to bank size. We know ROM loader allocated enough for this
  664. mask = (1 << M68K_MEM_SHIFT) - 1;
  665. rs = (Pico.romsize + mask) & ~mask;
  666. cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico.rom, 0);
  667. cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico.rom, 0);
  668. // Common case of on-cart (save) RAM, usually at 0x200000-...
  669. if ((Pico.sv.flags & SRF_ENABLED) && Pico.sv.data != NULL) {
  670. sstart = Pico.sv.start;
  671. rs = Pico.sv.end - sstart;
  672. rs = (rs + mask) & ~mask;
  673. if (sstart + rs >= 0x1000000)
  674. rs = 0x1000000 - sstart;
  675. cpu68k_map_set(m68k_read8_map, sstart, sstart + rs - 1, PicoRead8_sram, 1);
  676. cpu68k_map_set(m68k_read16_map, sstart, sstart + rs - 1, PicoRead16_sram, 1);
  677. cpu68k_map_set(m68k_write8_map, sstart, sstart + rs - 1, PicoWrite8_sram, 1);
  678. cpu68k_map_set(m68k_write16_map, sstart, sstart + rs - 1, PicoWrite16_sram, 1);
  679. }
  680. // Z80 region
  681. cpu68k_map_set(m68k_read8_map, 0xa00000, 0xa0ffff, PicoRead8_z80, 1);
  682. cpu68k_map_set(m68k_read16_map, 0xa00000, 0xa0ffff, PicoRead16_z80, 1);
  683. cpu68k_map_set(m68k_write8_map, 0xa00000, 0xa0ffff, PicoWrite8_z80, 1);
  684. cpu68k_map_set(m68k_write16_map, 0xa00000, 0xa0ffff, PicoWrite16_z80, 1);
  685. // IO/control region
  686. cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_io, 1);
  687. cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_io, 1);
  688. cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_io, 1);
  689. cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_io, 1);
  690. // VDP region
  691. for (a = 0xc00000; a < 0xe00000; a += 0x010000) {
  692. if ((a & 0xe700e0) != 0xc00000)
  693. continue;
  694. cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoRead8_vdp, 1);
  695. cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoRead16_vdp, 1);
  696. cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoWrite8_vdp, 1);
  697. cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoWrite16_vdp, 1);
  698. }
  699. // RAM and it's mirrors
  700. for (a = 0xe00000; a < 0x1000000; a += 0x010000) {
  701. cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoMem.ram, 0);
  702. cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoMem.ram, 0);
  703. cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoMem.ram, 0);
  704. cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoMem.ram, 0);
  705. }
  706. // Setup memory callbacks:
  707. #ifdef EMU_C68K
  708. PicoCpuCM68k.read8 = (void *)m68k_read8_map;
  709. PicoCpuCM68k.read16 = (void *)m68k_read16_map;
  710. PicoCpuCM68k.read32 = (void *)m68k_read16_map;
  711. PicoCpuCM68k.write8 = (void *)m68k_write8_map;
  712. PicoCpuCM68k.write16 = (void *)m68k_write16_map;
  713. PicoCpuCM68k.write32 = (void *)m68k_write16_map;
  714. PicoCpuCM68k.checkpc = NULL; /* unused */
  715. PicoCpuCM68k.fetch8 = NULL;
  716. PicoCpuCM68k.fetch16 = NULL;
  717. PicoCpuCM68k.fetch32 = NULL;
  718. #endif
  719. #ifdef EMU_F68K
  720. PicoCpuFM68k.read_byte = m68k_read8;
  721. PicoCpuFM68k.read_word = m68k_read16;
  722. PicoCpuFM68k.read_long = m68k_read32;
  723. PicoCpuFM68k.write_byte = m68k_write8;
  724. PicoCpuFM68k.write_word = m68k_write16;
  725. PicoCpuFM68k.write_long = m68k_write32;
  726. // setup FAME fetchmap
  727. {
  728. int i;
  729. // by default, point everything to first 64k of ROM
  730. for (i = 0; i < M68K_FETCHBANK1 * 0xe0 / 0x100; i++)
  731. PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
  732. // now real ROM
  733. for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
  734. PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;
  735. // RAM already set
  736. }
  737. #endif
  738. #ifdef EMU_M68K
  739. m68k_mem_setup();
  740. #endif
  741. z80_mem_setup();
  742. }
  743. #ifdef EMU_M68K
  744. unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;
  745. unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;
  746. unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL;
  747. void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;
  748. void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;
  749. void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;
  750. /* it appears that Musashi doesn't always mask the unused bits */
  751. unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }
  752. unsigned int m68k_read_memory_16(unsigned int address) { return pm68k_read_memory_16(address) & 0xffff; }
  753. unsigned int m68k_read_memory_32(unsigned int address) { return pm68k_read_memory_32(address); }
  754. void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }
  755. void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }
  756. void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }
  757. static void m68k_mem_setup(void)
  758. {
  759. pm68k_read_memory_8 = m68k_read8;
  760. pm68k_read_memory_16 = m68k_read16;
  761. pm68k_read_memory_32 = m68k_read32;
  762. pm68k_write_memory_8 = m68k_write8;
  763. pm68k_write_memory_16 = m68k_write16;
  764. pm68k_write_memory_32 = m68k_write32;
  765. }
  766. #endif // EMU_M68K
  767. // -----------------------------------------------------------------
  768. static int get_scanline(int is_from_z80)
  769. {
  770. if (is_from_z80) {
  771. int mclk_z80 = z80_cyclesDone() * 15;
  772. int mclk_line = Pico.t.z80_scanline * 488 * 7;
  773. while (mclk_z80 - mclk_line >= 488 * 7)
  774. Pico.t.z80_scanline++, mclk_line += 488 * 7;
  775. return Pico.t.z80_scanline;
  776. }
  777. return Pico.m.scanline;
  778. }
  779. /* probably should not be in this file, but it's near related code here */
  780. void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new)
  781. {
  782. int xcycles = z80_cycles << 8;
  783. /* check for overflows */
  784. if ((mode_old & 4) && xcycles > timer_a_next_oflow)
  785. ym2612.OPN.ST.status |= 1;
  786. if ((mode_old & 8) && xcycles > timer_b_next_oflow)
  787. ym2612.OPN.ST.status |= 2;
  788. /* update timer a */
  789. if (mode_old & 1)
  790. while (xcycles > timer_a_next_oflow)
  791. timer_a_next_oflow += timer_a_step;
  792. if ((mode_old ^ mode_new) & 1) // turning on/off
  793. {
  794. if (mode_old & 1)
  795. timer_a_next_oflow = TIMER_NO_OFLOW;
  796. else
  797. timer_a_next_oflow = xcycles + timer_a_step;
  798. }
  799. if (mode_new & 1)
  800. elprintf(EL_YMTIMER, "timer a upd to %i @ %i", timer_a_next_oflow>>8, z80_cycles);
  801. /* update timer b */
  802. if (mode_old & 2)
  803. while (xcycles > timer_b_next_oflow)
  804. timer_b_next_oflow += timer_b_step;
  805. if ((mode_old ^ mode_new) & 2)
  806. {
  807. if (mode_old & 2)
  808. timer_b_next_oflow = TIMER_NO_OFLOW;
  809. else
  810. timer_b_next_oflow = xcycles + timer_b_step;
  811. }
  812. if (mode_new & 2)
  813. elprintf(EL_YMTIMER, "timer b upd to %i @ %i", timer_b_next_oflow>>8, z80_cycles);
  814. }
  815. // ym2612 DAC and timer I/O handlers for z80
  816. static int ym2612_write_local(u32 a, u32 d, int is_from_z80)
  817. {
  818. int addr;
  819. a &= 3;
  820. if (a == 1 && ym2612.OPN.ST.address == 0x2a) /* DAC data */
  821. {
  822. int scanline = get_scanline(is_from_z80);
  823. //elprintf(EL_STATUS, "%03i -> %03i dac w %08x z80 %i", PsndDacLine, scanline, d, is_from_z80);
  824. ym2612.dacout = ((int)d - 0x80) << 6;
  825. if (ym2612.dacen)
  826. PsndDoDAC(scanline);
  827. return 0;
  828. }
  829. switch (a)
  830. {
  831. case 0: /* address port 0 */
  832. ym2612.OPN.ST.address = d;
  833. ym2612.addr_A1 = 0;
  834. #ifdef __GP2X__
  835. if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);
  836. #endif
  837. return 0;
  838. case 1: /* data port 0 */
  839. if (ym2612.addr_A1 != 0)
  840. return 0;
  841. addr = ym2612.OPN.ST.address;
  842. ym2612.REGS[addr] = d;
  843. switch (addr)
  844. {
  845. case 0x24: // timer A High 8
  846. case 0x25: { // timer A Low 2
  847. int TAnew = (addr == 0x24) ? ((ym2612.OPN.ST.TA & 0x03)|(((int)d)<<2))
  848. : ((ym2612.OPN.ST.TA & 0x3fc)|(d&3));
  849. if (ym2612.OPN.ST.TA != TAnew)
  850. {
  851. //elprintf(EL_STATUS, "timer a set %i", TAnew);
  852. ym2612.OPN.ST.TA = TAnew;
  853. //ym2612.OPN.ST.TAC = (1024-TAnew)*18;
  854. //ym2612.OPN.ST.TAT = 0;
  855. timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);
  856. if (ym2612.OPN.ST.mode & 1) {
  857. // this is not right, should really be done on overflow only
  858. int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();
  859. timer_a_next_oflow = (cycles << 8) + timer_a_step;
  860. }
  861. elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8);
  862. }
  863. return 0;
  864. }
  865. case 0x26: // timer B
  866. if (ym2612.OPN.ST.TB != d) {
  867. //elprintf(EL_STATUS, "timer b set %i", d);
  868. ym2612.OPN.ST.TB = d;
  869. //ym2612.OPN.ST.TBC = (256-d) * 288;
  870. //ym2612.OPN.ST.TBT = 0;
  871. timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800
  872. if (ym2612.OPN.ST.mode & 2) {
  873. int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();
  874. timer_b_next_oflow = (cycles << 8) + timer_b_step;
  875. }
  876. elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8);
  877. }
  878. return 0;
  879. case 0x27: { /* mode, timer control */
  880. int old_mode = ym2612.OPN.ST.mode;
  881. int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();
  882. ym2612.OPN.ST.mode = d;
  883. elprintf(EL_YMTIMER, "st mode %02x", d);
  884. ym2612_sync_timers(cycles, old_mode, d);
  885. /* reset Timer a flag */
  886. if (d & 0x10)
  887. ym2612.OPN.ST.status &= ~1;
  888. /* reset Timer b flag */
  889. if (d & 0x20)
  890. ym2612.OPN.ST.status &= ~2;
  891. if ((d ^ old_mode) & 0xc0) {
  892. #ifdef __GP2X__
  893. if (PicoOpt & POPT_EXT_FM) return YM2612Write_940(a, d, get_scanline(is_from_z80));
  894. #endif
  895. return 1;
  896. }
  897. return 0;
  898. }
  899. case 0x2b: { /* DAC Sel (YM2612) */
  900. int scanline = get_scanline(is_from_z80);
  901. if (ym2612.dacen != (d & 0x80)) {
  902. ym2612.dacen = d & 0x80;
  903. PsndDacLine = scanline;
  904. }
  905. #ifdef __GP2X__
  906. if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, scanline);
  907. #endif
  908. return 0;
  909. }
  910. }
  911. break;
  912. case 2: /* address port 1 */
  913. ym2612.OPN.ST.address = d;
  914. ym2612.addr_A1 = 1;
  915. #ifdef __GP2X__
  916. if (PicoOpt & POPT_EXT_FM) YM2612Write_940(a, d, -1);
  917. #endif
  918. return 0;
  919. case 3: /* data port 1 */
  920. if (ym2612.addr_A1 != 1)
  921. return 0;
  922. addr = ym2612.OPN.ST.address | 0x100;
  923. ym2612.REGS[addr] = d;
  924. break;
  925. }
  926. #ifdef __GP2X__
  927. if (PicoOpt & POPT_EXT_FM)
  928. return YM2612Write_940(a, d, get_scanline(is_from_z80));
  929. #endif
  930. return YM2612Write_(a, d);
  931. }
  932. #define ym2612_read_local() \
  933. if (xcycles >= timer_a_next_oflow) \
  934. ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 1; \
  935. if (xcycles >= timer_b_next_oflow) \
  936. ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2
  937. static u32 ym2612_read_local_z80(void)
  938. {
  939. int xcycles = z80_cyclesDone() << 8;
  940. ym2612_read_local();
  941. elprintf(EL_YMTIMER, "timer z80 read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,
  942. timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);
  943. return ym2612.OPN.ST.status;
  944. }
  945. static u32 ym2612_read_local_68k(void)
  946. {
  947. int xcycles = z80_cycles_from_68k() << 8;
  948. ym2612_read_local();
  949. elprintf(EL_YMTIMER, "timer 68k read %i, sched %i, %i @ %i|%i", ym2612.OPN.ST.status,
  950. timer_a_next_oflow>>8, timer_b_next_oflow>>8, xcycles >> 8, (xcycles >> 8) / 228);
  951. return ym2612.OPN.ST.status;
  952. }
  953. void ym2612_pack_state(void)
  954. {
  955. // timers are saved as tick counts, in 16.16 int format
  956. int tac, tat = 0, tbc, tbt = 0;
  957. tac = 1024 - ym2612.OPN.ST.TA;
  958. tbc = 256 - ym2612.OPN.ST.TB;
  959. if (timer_a_next_oflow != TIMER_NO_OFLOW)
  960. tat = (int)((double)(timer_a_step - timer_a_next_oflow) / (double)timer_a_step * tac * 65536);
  961. if (timer_b_next_oflow != TIMER_NO_OFLOW)
  962. tbt = (int)((double)(timer_b_step - timer_b_next_oflow) / (double)timer_b_step * tbc * 65536);
  963. elprintf(EL_YMTIMER, "save: timer a %i/%i", tat >> 16, tac);
  964. elprintf(EL_YMTIMER, "save: timer b %i/%i", tbt >> 16, tbc);
  965. #ifdef __GP2X__
  966. if (PicoOpt & POPT_EXT_FM)
  967. YM2612PicoStateSave2_940(tat, tbt);
  968. else
  969. #endif
  970. YM2612PicoStateSave2(tat, tbt);
  971. }
  972. void ym2612_unpack_state(void)
  973. {
  974. int i, ret, tac, tat, tbc, tbt;
  975. YM2612PicoStateLoad();
  976. // feed all the registers and update internal state
  977. for (i = 0x20; i < 0xA0; i++) {
  978. ym2612_write_local(0, i, 0);
  979. ym2612_write_local(1, ym2612.REGS[i], 0);
  980. }
  981. for (i = 0x30; i < 0xA0; i++) {
  982. ym2612_write_local(2, i, 0);
  983. ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
  984. }
  985. for (i = 0xAF; i >= 0xA0; i--) { // must apply backwards
  986. ym2612_write_local(2, i, 0);
  987. ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
  988. ym2612_write_local(0, i, 0);
  989. ym2612_write_local(1, ym2612.REGS[i], 0);
  990. }
  991. for (i = 0xB0; i < 0xB8; i++) {
  992. ym2612_write_local(0, i, 0);
  993. ym2612_write_local(1, ym2612.REGS[i], 0);
  994. ym2612_write_local(2, i, 0);
  995. ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
  996. }
  997. #ifdef __GP2X__
  998. if (PicoOpt & POPT_EXT_FM)
  999. ret = YM2612PicoStateLoad2_940(&tat, &tbt);
  1000. else
  1001. #endif
  1002. ret = YM2612PicoStateLoad2(&tat, &tbt);
  1003. if (ret != 0) {
  1004. elprintf(EL_STATUS, "old ym2612 state");
  1005. return; // no saved timers
  1006. }
  1007. tac = (1024 - ym2612.OPN.ST.TA) << 16;
  1008. tbc = (256 - ym2612.OPN.ST.TB) << 16;
  1009. if (ym2612.OPN.ST.mode & 1)
  1010. timer_a_next_oflow = (int)((double)(tac - tat) / (double)tac * timer_a_step);
  1011. else
  1012. timer_a_next_oflow = TIMER_NO_OFLOW;
  1013. if (ym2612.OPN.ST.mode & 2)
  1014. timer_b_next_oflow = (int)((double)(tbc - tbt) / (double)tbc * timer_b_step);
  1015. else
  1016. timer_b_next_oflow = TIMER_NO_OFLOW;
  1017. elprintf(EL_YMTIMER, "load: %i/%i, timer_a_next_oflow %i", tat>>16, tac>>16, timer_a_next_oflow >> 8);
  1018. elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, timer_b_next_oflow >> 8);
  1019. }
  1020. #if defined(NO_32X) && defined(_ASM_MEMORY_C)
  1021. // referenced by asm code
  1022. u32 PicoRead8_32x(u32 a) { return 0; }
  1023. u32 PicoRead16_32x(u32 a) { return 0; }
  1024. void PicoWrite8_32x(u32 a, u32 d) {}
  1025. void PicoWrite16_32x(u32 a, u32 d) {}
  1026. #endif
  1027. // -----------------------------------------------------------------
  1028. // z80 memhandlers
  1029. static unsigned char z80_md_vdp_read(unsigned short a)
  1030. {
  1031. z80_subCLeft(2);
  1032. if ((a & 0x00f0) == 0x0000) {
  1033. switch (a & 0x0d)
  1034. {
  1035. case 0x00: return PicoVideoRead8DataH();
  1036. case 0x01: return PicoVideoRead8DataL();
  1037. case 0x04: return PicoVideoRead8CtlH();
  1038. case 0x05: return PicoVideoRead8CtlL();
  1039. case 0x08:
  1040. case 0x0c: return get_scanline(1); // FIXME: make it proper
  1041. case 0x09:
  1042. case 0x0d: return Pico.m.rotate++;
  1043. }
  1044. }
  1045. elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, 0xff);
  1046. return 0xff;
  1047. }
  1048. static unsigned char z80_md_bank_read(unsigned short a)
  1049. {
  1050. unsigned int addr68k;
  1051. unsigned char ret;
  1052. z80_subCLeft(3);
  1053. addr68k = Pico.m.z80_bank68k << 15;
  1054. addr68k |= a & 0x7fff;
  1055. ret = m68k_read8(addr68k);
  1056. elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);
  1057. return ret;
  1058. }
  1059. static void z80_md_ym2612_write(unsigned int a, unsigned char data)
  1060. {
  1061. if (PicoOpt & POPT_EN_FM)
  1062. emustatus |= ym2612_write_local(a, data, 1) & 1;
  1063. }
  1064. static void z80_md_vdp_br_write(unsigned int a, unsigned char data)
  1065. {
  1066. if ((a&0xfff9) == 0x7f11) // 7f11 7f13 7f15 7f17
  1067. {
  1068. psg_write_z80(data);
  1069. return;
  1070. }
  1071. // at least VDP data writes hang my machine
  1072. if ((a>>8) == 0x60)
  1073. {
  1074. Pico.m.z80_bank68k >>= 1;
  1075. Pico.m.z80_bank68k |= data << 8;
  1076. Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one
  1077. return;
  1078. }
  1079. elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);
  1080. }
  1081. static void z80_md_bank_write(unsigned int a, unsigned char data)
  1082. {
  1083. unsigned int addr68k;
  1084. addr68k = Pico.m.z80_bank68k << 15;
  1085. addr68k += a & 0x7fff;
  1086. elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);
  1087. m68k_write8(addr68k, data);
  1088. }
  1089. // -----------------------------------------------------------------
  1090. static unsigned char z80_md_in(unsigned short p)
  1091. {
  1092. elprintf(EL_ANOMALY, "Z80 port %04x read", p);
  1093. return 0xff;
  1094. }
  1095. static void z80_md_out(unsigned short p, unsigned char d)
  1096. {
  1097. elprintf(EL_ANOMALY, "Z80 port %04x write %02x", p, d);
  1098. }
  1099. static void z80_mem_setup(void)
  1100. {
  1101. z80_map_set(z80_read_map, 0x0000, 0x1fff, PicoMem.zram, 0);
  1102. z80_map_set(z80_read_map, 0x2000, 0x3fff, PicoMem.zram, 0);
  1103. z80_map_set(z80_read_map, 0x4000, 0x5fff, ym2612_read_local_z80, 1);
  1104. z80_map_set(z80_read_map, 0x6000, 0x7fff, z80_md_vdp_read, 1);
  1105. z80_map_set(z80_read_map, 0x8000, 0xffff, z80_md_bank_read, 1);
  1106. z80_map_set(z80_write_map, 0x0000, 0x1fff, PicoMem.zram, 0);
  1107. z80_map_set(z80_write_map, 0x2000, 0x3fff, PicoMem.zram, 0);
  1108. z80_map_set(z80_write_map, 0x4000, 0x5fff, z80_md_ym2612_write, 1);
  1109. z80_map_set(z80_write_map, 0x6000, 0x7fff, z80_md_vdp_br_write, 1);
  1110. z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write, 1);
  1111. #ifdef _USE_DRZ80
  1112. drZ80.z80_in = z80_md_in;
  1113. drZ80.z80_out = z80_md_out;
  1114. #endif
  1115. #ifdef _USE_CZ80
  1116. Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (FPTR)PicoMem.zram); // main RAM
  1117. Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (FPTR)PicoMem.zram); // mirror
  1118. Cz80_Set_INPort(&CZ80, z80_md_in);
  1119. Cz80_Set_OUTPort(&CZ80, z80_md_out);
  1120. #endif
  1121. }
  1122. // vim:shiftwidth=2:ts=2:expandtab