memory.c 37 KB

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  1. /*
  2. * Memory I/O handlers for Sega/Mega CD.
  3. * (C) notaz, 2007-2009
  4. *
  5. * This work is licensed under the terms of MAME license.
  6. * See COPYING file in the top-level directory.
  7. */
  8. #include "../pico_int.h"
  9. #include "../memory.h"
  10. uptr s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];
  11. uptr s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];
  12. uptr s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];
  13. uptr s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];
  14. MAKE_68K_READ8(s68k_read8, s68k_read8_map)
  15. MAKE_68K_READ16(s68k_read16, s68k_read16_map)
  16. MAKE_68K_READ32(s68k_read32, s68k_read16_map)
  17. MAKE_68K_WRITE8(s68k_write8, s68k_write8_map)
  18. MAKE_68K_WRITE16(s68k_write16, s68k_write16_map)
  19. MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)
  20. // -----------------------------------------------------------------
  21. // provided by ASM code:
  22. #ifdef _ASM_CD_MEMORY_C
  23. u32 PicoReadS68k8_pr(u32 a);
  24. u32 PicoReadS68k16_pr(u32 a);
  25. void PicoWriteS68k8_pr(u32 a, u32 d);
  26. void PicoWriteS68k16_pr(u32 a, u32 d);
  27. u32 PicoReadM68k8_cell0(u32 a);
  28. u32 PicoReadM68k8_cell1(u32 a);
  29. u32 PicoReadM68k16_cell0(u32 a);
  30. u32 PicoReadM68k16_cell1(u32 a);
  31. void PicoWriteM68k8_cell0(u32 a, u32 d);
  32. void PicoWriteM68k8_cell1(u32 a, u32 d);
  33. void PicoWriteM68k16_cell0(u32 a, u32 d);
  34. void PicoWriteM68k16_cell1(u32 a, u32 d);
  35. u32 PicoReadS68k8_dec0(u32 a);
  36. u32 PicoReadS68k8_dec1(u32 a);
  37. u32 PicoReadS68k16_dec0(u32 a);
  38. u32 PicoReadS68k16_dec1(u32 a);
  39. void PicoWriteS68k8_dec_m0b0(u32 a, u32 d);
  40. void PicoWriteS68k8_dec_m1b0(u32 a, u32 d);
  41. void PicoWriteS68k8_dec_m2b0(u32 a, u32 d);
  42. void PicoWriteS68k8_dec_m0b1(u32 a, u32 d);
  43. void PicoWriteS68k8_dec_m1b1(u32 a, u32 d);
  44. void PicoWriteS68k8_dec_m2b1(u32 a, u32 d);
  45. void PicoWriteS68k16_dec_m0b0(u32 a, u32 d);
  46. void PicoWriteS68k16_dec_m1b0(u32 a, u32 d);
  47. void PicoWriteS68k16_dec_m2b0(u32 a, u32 d);
  48. void PicoWriteS68k16_dec_m0b1(u32 a, u32 d);
  49. void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);
  50. void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);
  51. #endif
  52. static void remap_prg_window(u32 r1, u32 r3);
  53. static void remap_word_ram(u32 r3);
  54. // poller detection
  55. #define POLL_LIMIT 16
  56. #define POLL_CYCLES 64
  57. void m68k_comm_check(u32 a)
  58. {
  59. pcd_sync_s68k(SekCyclesDone(), 0);
  60. if (a >= 0x0e && !Pico_mcd->m.need_sync) {
  61. // there are cases when slave updates comm and only switches RAM
  62. // over after that (mcd1b), so there must be a resync..
  63. SekEndRun(64);
  64. Pico_mcd->m.need_sync = 1;
  65. }
  66. if (SekNotPolling || a != Pico_mcd->m.m68k_poll_a) {
  67. Pico_mcd->m.m68k_poll_a = a;
  68. Pico_mcd->m.m68k_poll_cnt = 0;
  69. SekNotPolling = 0;
  70. return;
  71. }
  72. Pico_mcd->m.m68k_poll_cnt++;
  73. }
  74. #ifndef _ASM_CD_MEMORY_C
  75. static u32 m68k_reg_read16(u32 a)
  76. {
  77. u32 d = 0;
  78. a &= 0x3e;
  79. switch (a) {
  80. case 0:
  81. // here IFL2 is always 0, just like in Gens
  82. d = ((Pico_mcd->s68k_regs[0x33] << 13) & 0x8000)
  83. | Pico_mcd->m.busreq;
  84. goto end;
  85. case 2:
  86. m68k_comm_check(a);
  87. d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
  88. elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);
  89. goto end;
  90. case 4:
  91. d = Pico_mcd->s68k_regs[4]<<8;
  92. goto end;
  93. case 6:
  94. d = *(u16 *)(Pico_mcd->bios + 0x72);
  95. goto end;
  96. case 8:
  97. d = cdc_host_r();
  98. goto end;
  99. case 0xA:
  100. elprintf(EL_UIO, "m68k FIXME: reserved read");
  101. goto end;
  102. case 0xC: // 384 cycle stopwatch timer
  103. // ugh..
  104. d = pcd_cycles_m68k_to_s68k(SekCyclesDone());
  105. d = (d - Pico_mcd->m.stopwatch_base_c) / 384;
  106. d &= 0x0fff;
  107. elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);
  108. goto end;
  109. }
  110. if (a < 0x30) {
  111. // comm flag/cmd/status (0xE-0x2F)
  112. m68k_comm_check(a);
  113. d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
  114. goto end;
  115. }
  116. elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);
  117. end:
  118. return d;
  119. }
  120. #endif
  121. #ifndef _ASM_CD_MEMORY_C
  122. static
  123. #endif
  124. void m68k_reg_write8(u32 a, u32 d)
  125. {
  126. u32 dold;
  127. a &= 0x3f;
  128. switch (a) {
  129. case 0:
  130. d &= 1;
  131. if (d && (Pico_mcd->s68k_regs[0x33] & PCDS_IEN2)) {
  132. elprintf(EL_INTS, "m68k: s68k irq 2");
  133. pcd_sync_s68k(SekCyclesDone(), 0);
  134. SekInterruptS68k(2);
  135. }
  136. return;
  137. case 1:
  138. d &= 3;
  139. dold = Pico_mcd->m.busreq;
  140. if (!(d & 1))
  141. d |= 2; // verified: can't release bus on reset
  142. if (dold == d)
  143. return;
  144. pcd_sync_s68k(SekCyclesDone(), 0);
  145. if ((dold ^ d) & 1)
  146. elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));
  147. if (!(d & 1))
  148. Pico_mcd->m.state_flags |= PCD_ST_S68K_RST;
  149. else if (d == 1 && (Pico_mcd->m.state_flags & PCD_ST_S68K_RST)) {
  150. Pico_mcd->m.state_flags &= ~PCD_ST_S68K_RST;
  151. elprintf(EL_CDREGS, "m68k: resetting s68k");
  152. SekResetS68k();
  153. }
  154. if ((dold ^ d) & 2) {
  155. elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);
  156. remap_prg_window(d, Pico_mcd->s68k_regs[3]);
  157. }
  158. Pico_mcd->m.busreq = d;
  159. return;
  160. case 2:
  161. elprintf(EL_CDREGS, "m68k: prg wp=%02x", d);
  162. Pico_mcd->s68k_regs[2] = d; // really use s68k side register
  163. return;
  164. case 3:
  165. dold = Pico_mcd->s68k_regs[3];
  166. elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);
  167. if ((d ^ dold) & 0xc0) {
  168. elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i",
  169. (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
  170. remap_prg_window(Pico_mcd->m.busreq, d);
  171. }
  172. // 2M mode state is tracked regardless of current mode
  173. if (d & 2) {
  174. Pico_mcd->m.dmna_ret_2m |= 2;
  175. Pico_mcd->m.dmna_ret_2m &= ~1;
  176. }
  177. if (dold & 4) { // 1M mode
  178. d ^= 2; // 0 sets DMNA, 1 does nothing
  179. d = (d & 0xc2) | (dold & 0x1f);
  180. }
  181. else
  182. d = (d & 0xc0) | (dold & 0x1c) | Pico_mcd->m.dmna_ret_2m;
  183. goto write_comm;
  184. case 6:
  185. Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
  186. return;
  187. case 7:
  188. Pico_mcd->bios[0x72] = d;
  189. elprintf(EL_CDREGS, "hint vector set to %04x%04x",
  190. ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);
  191. return;
  192. case 0x0f:
  193. a = 0x0e;
  194. case 0x0e:
  195. goto write_comm;
  196. }
  197. if ((a&0xf0) == 0x10)
  198. goto write_comm;
  199. elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);
  200. return;
  201. write_comm:
  202. if (d == Pico_mcd->s68k_regs[a])
  203. return;
  204. pcd_sync_s68k(SekCyclesDone(), 0);
  205. Pico_mcd->s68k_regs[a] = d;
  206. if (Pico_mcd->m.s68k_poll_a == (a & ~1))
  207. {
  208. if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {
  209. elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
  210. SekSetStopS68k(0);
  211. }
  212. Pico_mcd->m.s68k_poll_a = 0;
  213. }
  214. }
  215. u32 s68k_poll_detect(u32 a, u32 d)
  216. {
  217. #ifdef USE_POLL_DETECT
  218. u32 cycles, cnt = 0;
  219. if (SekIsStoppedS68k())
  220. return d;
  221. cycles = SekCyclesDoneS68k();
  222. if (!SekNotPolling && a == Pico_mcd->m.s68k_poll_a) {
  223. u32 clkdiff = cycles - Pico_mcd->m.s68k_poll_clk;
  224. if (clkdiff <= POLL_CYCLES) {
  225. cnt = Pico_mcd->m.s68k_poll_cnt + 1;
  226. //printf("-- diff: %u, cnt = %i\n", clkdiff, cnt);
  227. if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {
  228. SekSetStopS68k(1);
  229. elprintf(EL_CDPOLL, "s68k poll detected @%06x, a=%02x",
  230. SekPcS68k, a);
  231. }
  232. }
  233. }
  234. Pico_mcd->m.s68k_poll_a = a;
  235. Pico_mcd->m.s68k_poll_clk = cycles;
  236. Pico_mcd->m.s68k_poll_cnt = cnt;
  237. SekNotPollingS68k = 0;
  238. #endif
  239. return d;
  240. }
  241. #define READ_FONT_DATA(basemask) \
  242. { \
  243. unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
  244. unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
  245. if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
  246. if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
  247. if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
  248. if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
  249. }
  250. #ifndef _ASM_CD_MEMORY_C
  251. static
  252. #endif
  253. u32 s68k_reg_read16(u32 a)
  254. {
  255. u32 d=0;
  256. switch (a) {
  257. case 0:
  258. return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
  259. case 2:
  260. d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);
  261. elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
  262. return s68k_poll_detect(a, d);
  263. case 6:
  264. return cdc_reg_r();
  265. case 8:
  266. return cdc_host_r();
  267. case 0xC:
  268. d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;
  269. d /= 384;
  270. d &= 0x0fff;
  271. elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);
  272. return d;
  273. case 0x30:
  274. elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
  275. return Pico_mcd->s68k_regs[31];
  276. case 0x34: // fader
  277. return 0; // no busy bit
  278. case 0x50: // font data (check: Lunar 2, Silpheed)
  279. READ_FONT_DATA(0x00100000);
  280. return d;
  281. case 0x52:
  282. READ_FONT_DATA(0x00010000);
  283. return d;
  284. case 0x54:
  285. READ_FONT_DATA(0x10000000);
  286. return d;
  287. case 0x56:
  288. READ_FONT_DATA(0x01000000);
  289. return d;
  290. }
  291. d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
  292. if (a >= 0x0e && a < 0x30)
  293. return s68k_poll_detect(a, d);
  294. return d;
  295. }
  296. #ifndef _ASM_CD_MEMORY_C
  297. static
  298. #endif
  299. void s68k_reg_write8(u32 a, u32 d)
  300. {
  301. // Warning: d might have upper bits set
  302. switch (a) {
  303. case 1:
  304. if (!(d & 1))
  305. pcd_soft_reset();
  306. return;
  307. case 2:
  308. return; // only m68k can change WP
  309. case 3: {
  310. int dold = Pico_mcd->s68k_regs[3];
  311. elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);
  312. d &= 0x1d;
  313. d |= dold & 0xc2;
  314. // 2M mode state
  315. if (d & 1) {
  316. Pico_mcd->m.dmna_ret_2m |= 1;
  317. Pico_mcd->m.dmna_ret_2m &= ~2; // DMNA clears
  318. }
  319. if (d & 4)
  320. {
  321. if (!(dold & 4)) {
  322. elprintf(EL_CDREG3, "wram mode 2M->1M");
  323. wram_2M_to_1M(Pico_mcd->word_ram2M);
  324. }
  325. if ((d ^ dold) & 0x1d)
  326. remap_word_ram(d);
  327. if ((d ^ dold) & 0x05)
  328. d &= ~2; // clear DMNA - swap complete
  329. }
  330. else
  331. {
  332. if (dold & 4) {
  333. elprintf(EL_CDREG3, "wram mode 1M->2M");
  334. wram_1M_to_2M(Pico_mcd->word_ram2M);
  335. remap_word_ram(d);
  336. }
  337. d = (d & ~3) | Pico_mcd->m.dmna_ret_2m;
  338. }
  339. goto write_comm;
  340. }
  341. case 4:
  342. elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);
  343. Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
  344. return;
  345. case 5:
  346. //dprintf("s68k CDC reg addr: %x", d&0xf);
  347. break;
  348. case 7:
  349. cdc_reg_w(d & 0xff);
  350. return;
  351. case 0xa:
  352. elprintf(EL_CDREGS, "s68k set CDC dma addr");
  353. break;
  354. case 0xc:
  355. case 0xd: // 384 cycle stopwatch timer
  356. elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);
  357. // does this also reset internal 384 cycle counter?
  358. Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();
  359. return;
  360. case 0x0e:
  361. a = 0x0f;
  362. case 0x0f:
  363. goto write_comm;
  364. case 0x31: // 384 cycle int3 timer
  365. d &= 0xff;
  366. elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);
  367. Pico_mcd->s68k_regs[a] = (u8) d;
  368. if (d) // d or d+1??
  369. pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);
  370. else
  371. pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);
  372. break;
  373. case 0x33: // IRQ mask
  374. elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d);
  375. d &= 0x7e;
  376. if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) {
  377. // XXX: emulate pending irq instead?
  378. if (Pico_mcd->s68k_regs[0x37] & 4) {
  379. elprintf(EL_INTS, "cdd export irq 4 (unmask)");
  380. SekInterruptS68k(4);
  381. }
  382. }
  383. break;
  384. case 0x34: // fader
  385. Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
  386. return;
  387. case 0x36:
  388. return; // d/m bit is unsetable
  389. case 0x37: {
  390. u32 d_old = Pico_mcd->s68k_regs[0x37];
  391. Pico_mcd->s68k_regs[0x37] = d & 7;
  392. if ((d&4) && !(d_old&4)) {
  393. // ??
  394. pcd_event_schedule_s68k(PCD_EVENT_CDC, 12500000/75);
  395. if (Pico_mcd->s68k_regs[0x33] & PCDS_IEN4) {
  396. elprintf(EL_INTS, "cdd export irq 4");
  397. SekInterruptS68k(4);
  398. }
  399. }
  400. return;
  401. }
  402. case 0x4b:
  403. Pico_mcd->s68k_regs[a] = 0; // (u8) d; ?
  404. cdd_process();
  405. {
  406. static const char *nm[] =
  407. { "stat", "stop", "read_toc", "play",
  408. "seek", "???", "pause", "resume",
  409. "ff", "fr", "tjump", "???",
  410. "close","open", "???", "???" };
  411. u8 *c = &Pico_mcd->s68k_regs[0x42];
  412. u8 *s = &Pico_mcd->s68k_regs[0x38];
  413. elprintf(EL_CD,
  414. "CDD command: %02x %02x %02x %02x %02x %02x %02x %02x %12s",
  415. c[0], c[1], c[2], c[3], c[4], c[5], c[6], c[7], nm[c[0] & 0x0f]);
  416. elprintf(EL_CD,
  417. "CDD status: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
  418. s[0], s[1], s[2], s[3], s[4], s[5], s[6], s[7], s[8], s[9]);
  419. }
  420. return;
  421. case 0x58:
  422. return;
  423. }
  424. if ((a&0x1f0) == 0x20)
  425. goto write_comm;
  426. if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
  427. {
  428. elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);
  429. return;
  430. }
  431. Pico_mcd->s68k_regs[a] = (u8) d;
  432. return;
  433. write_comm:
  434. Pico_mcd->s68k_regs[a] = (u8) d;
  435. if (Pico_mcd->m.m68k_poll_cnt)
  436. SekEndRunS68k(0);
  437. Pico_mcd->m.m68k_poll_cnt = 0;
  438. }
  439. void s68k_reg_write16(u32 a, u32 d)
  440. {
  441. u8 *r = Pico_mcd->s68k_regs;
  442. if ((a & 0x1f0) == 0x20)
  443. goto write_comm;
  444. switch (a) {
  445. case 0x0e:
  446. // special case, 2 byte writes would be handled differently
  447. // TODO: verify
  448. r[0xf] = d;
  449. return;
  450. case 0x58: // stamp data size
  451. r[0x59] = d & 7;
  452. return;
  453. case 0x5a: // stamp map base address
  454. r[0x5a] = d >> 8;
  455. r[0x5b] = d & 0xe0;
  456. return;
  457. case 0x5c: // V cell size
  458. r[0x5d] = d & 0x1f;
  459. return;
  460. case 0x5e: // image buffer start address
  461. r[0x5e] = d >> 8;
  462. r[0x5f] = d & 0xf8;
  463. return;
  464. case 0x60: // image buffer offset
  465. r[0x61] = d & 0x3f;
  466. return;
  467. case 0x62: // h dot size
  468. r[0x62] = (d >> 8) & 1;
  469. r[0x63] = d;
  470. return;
  471. case 0x64: // v dot size
  472. r[0x65] = d;
  473. return;
  474. case 0x66: // trace vector base address
  475. d &= 0xfffe;
  476. r[0x66] = d >> 8;
  477. r[0x67] = d;
  478. gfx_start(d);
  479. return;
  480. default:
  481. break;
  482. }
  483. s68k_reg_write8(a, d >> 8);
  484. s68k_reg_write8(a + 1, d & 0xff);
  485. return;
  486. write_comm:
  487. r[a] = d >> 8;
  488. r[a + 1] = d;
  489. if (Pico_mcd->m.m68k_poll_cnt)
  490. SekEndRunS68k(0);
  491. Pico_mcd->m.m68k_poll_cnt = 0;
  492. }
  493. // -----------------------------------------------------------------
  494. // Main 68k
  495. // -----------------------------------------------------------------
  496. #ifndef _ASM_CD_MEMORY_C
  497. #include "cell_map.c"
  498. // WORD RAM, cell aranged area (220000 - 23ffff)
  499. static u32 PicoReadM68k8_cell0(u32 a)
  500. {
  501. a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
  502. return Pico_mcd->word_ram1M[0][a ^ 1];
  503. }
  504. static u32 PicoReadM68k8_cell1(u32 a)
  505. {
  506. a = (a&3) | (cell_map(a >> 2) << 2);
  507. return Pico_mcd->word_ram1M[1][a ^ 1];
  508. }
  509. static u32 PicoReadM68k16_cell0(u32 a)
  510. {
  511. a = (a&2) | (cell_map(a >> 2) << 2);
  512. return *(u16 *)(Pico_mcd->word_ram1M[0] + a);
  513. }
  514. static u32 PicoReadM68k16_cell1(u32 a)
  515. {
  516. a = (a&2) | (cell_map(a >> 2) << 2);
  517. return *(u16 *)(Pico_mcd->word_ram1M[1] + a);
  518. }
  519. static void PicoWriteM68k8_cell0(u32 a, u32 d)
  520. {
  521. a = (a&3) | (cell_map(a >> 2) << 2);
  522. Pico_mcd->word_ram1M[0][a ^ 1] = d;
  523. }
  524. static void PicoWriteM68k8_cell1(u32 a, u32 d)
  525. {
  526. a = (a&3) | (cell_map(a >> 2) << 2);
  527. Pico_mcd->word_ram1M[1][a ^ 1] = d;
  528. }
  529. static void PicoWriteM68k16_cell0(u32 a, u32 d)
  530. {
  531. a = (a&3) | (cell_map(a >> 2) << 2);
  532. *(u16 *)(Pico_mcd->word_ram1M[0] + a) = d;
  533. }
  534. static void PicoWriteM68k16_cell1(u32 a, u32 d)
  535. {
  536. a = (a&3) | (cell_map(a >> 2) << 2);
  537. *(u16 *)(Pico_mcd->word_ram1M[1] + a) = d;
  538. }
  539. #endif
  540. // RAM cart (40000 - 7fffff, optional)
  541. static u32 PicoReadM68k8_ramc(u32 a)
  542. {
  543. u32 d = 0;
  544. if (a == 0x400001) {
  545. if (Pico.sv.data != NULL)
  546. d = 3; // 64k cart
  547. return d;
  548. }
  549. if ((a & 0xfe0000) == 0x600000) {
  550. if (Pico.sv.data != NULL)
  551. d = Pico.sv.data[((a >> 1) & 0xffff) + 0x2000];
  552. return d;
  553. }
  554. if (a == 0x7fffff)
  555. return Pico_mcd->m.bcram_reg;
  556. elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
  557. return d;
  558. }
  559. static u32 PicoReadM68k16_ramc(u32 a)
  560. {
  561. elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);
  562. return PicoReadM68k8_ramc(a + 1);
  563. }
  564. static void PicoWriteM68k8_ramc(u32 a, u32 d)
  565. {
  566. if ((a & 0xfe0000) == 0x600000) {
  567. if (Pico.sv.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {
  568. Pico.sv.data[((a>>1) & 0xffff) + 0x2000] = d;
  569. Pico.sv.changed = 1;
  570. }
  571. return;
  572. }
  573. if (a == 0x7fffff) {
  574. Pico_mcd->m.bcram_reg = d;
  575. return;
  576. }
  577. elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x",
  578. a, d & 0xff, SekPc);
  579. }
  580. static void PicoWriteM68k16_ramc(u32 a, u32 d)
  581. {
  582. elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x",
  583. a, d, SekPcS68k);
  584. PicoWriteM68k8_ramc(a + 1, d);
  585. }
  586. // IO/control/cd registers (a10000 - ...)
  587. #ifndef _ASM_CD_MEMORY_C
  588. u32 PicoRead8_mcd_io(u32 a)
  589. {
  590. u32 d;
  591. if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
  592. d = m68k_reg_read16(a); // TODO: m68k_reg_read8
  593. if (!(a & 1))
  594. d >>= 8;
  595. d &= 0xff;
  596. elprintf(EL_CDREGS, "m68k_regs r8: [%02x] %02x @%06x",
  597. a & 0x3f, d, SekPc);
  598. return d;
  599. }
  600. // fallback to default MD handler
  601. return PicoRead8_io(a);
  602. }
  603. u32 PicoRead16_mcd_io(u32 a)
  604. {
  605. u32 d;
  606. if ((a & 0xff00) == 0x2000) {
  607. d = m68k_reg_read16(a);
  608. elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x",
  609. a & 0x3f, d, SekPc);
  610. return d;
  611. }
  612. return PicoRead16_io(a);
  613. }
  614. void PicoWrite8_mcd_io(u32 a, u32 d)
  615. {
  616. if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
  617. elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x",
  618. a & 0x3f, d, SekPc);
  619. m68k_reg_write8(a, d);
  620. return;
  621. }
  622. PicoWrite8_io(a, d);
  623. }
  624. void PicoWrite16_mcd_io(u32 a, u32 d)
  625. {
  626. if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
  627. elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x",
  628. a & 0x3f, d, SekPc);
  629. m68k_reg_write8(a, d >> 8);
  630. if ((a & 0x3e) != 0x0e) // special case
  631. m68k_reg_write8(a + 1, d & 0xff);
  632. return;
  633. }
  634. PicoWrite16_io(a, d);
  635. }
  636. #endif
  637. // -----------------------------------------------------------------
  638. // Sub 68k
  639. // -----------------------------------------------------------------
  640. static u32 s68k_unmapped_read8(u32 a)
  641. {
  642. elprintf(EL_UIO, "s68k unmapped r8 [%06x] @%06x", a, SekPc);
  643. return 0;
  644. }
  645. static u32 s68k_unmapped_read16(u32 a)
  646. {
  647. elprintf(EL_UIO, "s68k unmapped r16 [%06x] @%06x", a, SekPc);
  648. return 0;
  649. }
  650. static void s68k_unmapped_write8(u32 a, u32 d)
  651. {
  652. elprintf(EL_UIO, "s68k unmapped w8 [%06x] %02x @%06x",
  653. a, d & 0xff, SekPc);
  654. }
  655. static void s68k_unmapped_write16(u32 a, u32 d)
  656. {
  657. elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x",
  658. a, d & 0xffff, SekPc);
  659. }
  660. // PRG RAM protected range (000000 - 01fdff)?
  661. // XXX verify: ff00 or 1fe00 max?
  662. static void PicoWriteS68k8_prgwp(u32 a, u32 d)
  663. {
  664. if (a >= (Pico_mcd->s68k_regs[2] << 9))
  665. Pico_mcd->prg_ram[a ^ 1] = d;
  666. }
  667. static void PicoWriteS68k16_prgwp(u32 a, u32 d)
  668. {
  669. if (a >= (Pico_mcd->s68k_regs[2] << 9))
  670. *(u16 *)(Pico_mcd->prg_ram + a) = d;
  671. }
  672. #ifndef _ASM_CD_MEMORY_C
  673. // decode (080000 - 0bffff, in 1M mode)
  674. static u32 PicoReadS68k8_dec0(u32 a)
  675. {
  676. u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];
  677. if (a & 1)
  678. d &= 0x0f;
  679. else
  680. d >>= 4;
  681. return d;
  682. }
  683. static u32 PicoReadS68k8_dec1(u32 a)
  684. {
  685. u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];
  686. if (a & 1)
  687. d &= 0x0f;
  688. else
  689. d >>= 4;
  690. return d;
  691. }
  692. static u32 PicoReadS68k16_dec0(u32 a)
  693. {
  694. u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];
  695. d |= d << 4;
  696. d &= ~0xf0;
  697. return d;
  698. }
  699. static u32 PicoReadS68k16_dec1(u32 a)
  700. {
  701. u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];
  702. d |= d << 4;
  703. d &= ~0xf0;
  704. return d;
  705. }
  706. /* check: jaguar xj 220 (draws entire world using decode) */
  707. #define mk_decode_w8(bank) \
  708. static void PicoWriteS68k8_dec_m0b##bank(u32 a, u32 d) \
  709. { \
  710. u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
  711. \
  712. if (!(a & 1)) \
  713. *pd = (*pd & 0x0f) | (d << 4); \
  714. else \
  715. *pd = (*pd & 0xf0) | (d & 0x0f); \
  716. } \
  717. \
  718. static void PicoWriteS68k8_dec_m1b##bank(u32 a, u32 d) \
  719. { \
  720. u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
  721. u8 mask = (a & 1) ? 0x0f : 0xf0; \
  722. \
  723. if (!(*pd & mask) && (d & 0x0f)) /* underwrite */ \
  724. PicoWriteS68k8_dec_m0b##bank(a, d); \
  725. } \
  726. \
  727. static void PicoWriteS68k8_dec_m2b##bank(u32 a, u32 d) /* ...and m3? */ \
  728. { \
  729. if (d & 0x0f) /* overwrite */ \
  730. PicoWriteS68k8_dec_m0b##bank(a, d); \
  731. }
  732. mk_decode_w8(0)
  733. mk_decode_w8(1)
  734. #define mk_decode_w16(bank) \
  735. static void PicoWriteS68k16_dec_m0b##bank(u32 a, u32 d) \
  736. { \
  737. u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
  738. \
  739. d &= 0x0f0f; \
  740. *pd = d | (d >> 4); \
  741. } \
  742. \
  743. static void PicoWriteS68k16_dec_m1b##bank(u32 a, u32 d) \
  744. { \
  745. u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
  746. \
  747. d &= 0x0f0f; /* underwrite */ \
  748. if (!(*pd & 0xf0)) *pd |= d >> 4; \
  749. if (!(*pd & 0x0f)) *pd |= d; \
  750. } \
  751. \
  752. static void PicoWriteS68k16_dec_m2b##bank(u32 a, u32 d) \
  753. { \
  754. u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
  755. \
  756. d &= 0x0f0f; /* overwrite */ \
  757. d |= d >> 4; \
  758. \
  759. if (!(d & 0xf0)) d |= *pd & 0xf0; \
  760. if (!(d & 0x0f)) d |= *pd & 0x0f; \
  761. *pd = d; \
  762. }
  763. mk_decode_w16(0)
  764. mk_decode_w16(1)
  765. #endif
  766. // backup RAM (fe0000 - feffff)
  767. static u32 PicoReadS68k8_bram(u32 a)
  768. {
  769. return Pico_mcd->bram[(a>>1)&0x1fff];
  770. }
  771. static u32 PicoReadS68k16_bram(u32 a)
  772. {
  773. u32 d;
  774. elprintf(EL_ANOMALY, "FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
  775. a = (a >> 1) & 0x1fff;
  776. d = Pico_mcd->bram[a++];
  777. d|= Pico_mcd->bram[a++] << 8; // probably wrong, TODO: verify
  778. return d;
  779. }
  780. static void PicoWriteS68k8_bram(u32 a, u32 d)
  781. {
  782. Pico_mcd->bram[(a >> 1) & 0x1fff] = d;
  783. Pico.sv.changed = 1;
  784. }
  785. static void PicoWriteS68k16_bram(u32 a, u32 d)
  786. {
  787. elprintf(EL_ANOMALY, "s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
  788. a = (a >> 1) & 0x1fff;
  789. Pico_mcd->bram[a++] = d;
  790. Pico_mcd->bram[a++] = d >> 8; // TODO: verify..
  791. Pico.sv.changed = 1;
  792. }
  793. #ifndef _ASM_CD_MEMORY_C
  794. // PCM and registers (ff0000 - ffffff)
  795. static u32 PicoReadS68k8_pr(u32 a)
  796. {
  797. u32 d = 0;
  798. // regs
  799. if ((a & 0xfe00) == 0x8000) {
  800. a &= 0x1ff;
  801. if (a >= 0x0e && a < 0x30) {
  802. d = Pico_mcd->s68k_regs[a];
  803. s68k_poll_detect(a & ~1, d);
  804. goto regs_done;
  805. }
  806. d = s68k_reg_read16(a & ~1);
  807. if (!(a & 1))
  808. d >>= 8;
  809. regs_done:
  810. d &= 0xff;
  811. elprintf(EL_CDREGS, "s68k_regs r8: [%02x] %02x @%06x",
  812. a, d, SekPcS68k);
  813. return d;
  814. }
  815. // PCM
  816. // XXX: verify: probably odd addrs only?
  817. if ((a & 0x8000) == 0x0000) {
  818. a &= 0x7fff;
  819. if (a >= 0x2000)
  820. d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];
  821. else if (a >= 0x20)
  822. d = pcd_pcm_read(a >> 1);
  823. return d;
  824. }
  825. return s68k_unmapped_read8(a);
  826. }
  827. static u32 PicoReadS68k16_pr(u32 a)
  828. {
  829. u32 d = 0;
  830. // regs
  831. if ((a & 0xfe00) == 0x8000) {
  832. a &= 0x1fe;
  833. d = s68k_reg_read16(a);
  834. elprintf(EL_CDREGS, "s68k_regs r16: [%02x] %04x @%06x",
  835. a, d, SekPcS68k);
  836. return d;
  837. }
  838. // PCM
  839. if ((a & 0x8000) == 0x0000) {
  840. a &= 0x7fff;
  841. if (a >= 0x2000)
  842. d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];
  843. else if (a >= 0x20)
  844. d = pcd_pcm_read(a >> 1);
  845. return d;
  846. }
  847. return s68k_unmapped_read16(a);
  848. }
  849. static void PicoWriteS68k8_pr(u32 a, u32 d)
  850. {
  851. // regs
  852. if ((a & 0xfe00) == 0x8000) {
  853. a &= 0x1ff;
  854. elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @%06x", a, d, SekPcS68k);
  855. if (0x59 <= a && a < 0x68) // word regs
  856. s68k_reg_write16(a & ~1, (d << 8) | d);
  857. else
  858. s68k_reg_write8(a, d);
  859. return;
  860. }
  861. // PCM
  862. if ((a & 0x8000) == 0x0000) {
  863. a &= 0x7fff;
  864. if (a >= 0x2000)
  865. Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
  866. else if (a < 0x12)
  867. pcd_pcm_write(a>>1, d);
  868. return;
  869. }
  870. s68k_unmapped_write8(a, d);
  871. }
  872. static void PicoWriteS68k16_pr(u32 a, u32 d)
  873. {
  874. // regs
  875. if ((a & 0xfe00) == 0x8000) {
  876. a &= 0x1fe;
  877. elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @%06x", a, d, SekPcS68k);
  878. s68k_reg_write16(a, d);
  879. return;
  880. }
  881. // PCM
  882. if ((a & 0x8000) == 0x0000) {
  883. a &= 0x7fff;
  884. if (a >= 0x2000)
  885. Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
  886. else if (a < 0x12)
  887. pcd_pcm_write(a>>1, d & 0xff);
  888. return;
  889. }
  890. s68k_unmapped_write16(a, d);
  891. }
  892. #endif
  893. static const void *m68k_cell_read8[] = { PicoReadM68k8_cell0, PicoReadM68k8_cell1 };
  894. static const void *m68k_cell_read16[] = { PicoReadM68k16_cell0, PicoReadM68k16_cell1 };
  895. static const void *m68k_cell_write8[] = { PicoWriteM68k8_cell0, PicoWriteM68k8_cell1 };
  896. static const void *m68k_cell_write16[] = { PicoWriteM68k16_cell0, PicoWriteM68k16_cell1 };
  897. static const void *s68k_dec_read8[] = { PicoReadS68k8_dec0, PicoReadS68k8_dec1 };
  898. static const void *s68k_dec_read16[] = { PicoReadS68k16_dec0, PicoReadS68k16_dec1 };
  899. static const void *s68k_dec_write8[2][4] = {
  900. { PicoWriteS68k8_dec_m0b0, PicoWriteS68k8_dec_m1b0, PicoWriteS68k8_dec_m2b0, PicoWriteS68k8_dec_m2b0 },
  901. { PicoWriteS68k8_dec_m0b1, PicoWriteS68k8_dec_m1b1, PicoWriteS68k8_dec_m2b1, PicoWriteS68k8_dec_m2b1 },
  902. };
  903. static const void *s68k_dec_write16[2][4] = {
  904. { PicoWriteS68k16_dec_m0b0, PicoWriteS68k16_dec_m1b0, PicoWriteS68k16_dec_m2b0, PicoWriteS68k16_dec_m2b0 },
  905. { PicoWriteS68k16_dec_m0b1, PicoWriteS68k16_dec_m1b1, PicoWriteS68k16_dec_m2b1, PicoWriteS68k16_dec_m2b1 },
  906. };
  907. // -----------------------------------------------------------------
  908. static void remap_prg_window(u32 r1, u32 r3)
  909. {
  910. // PRG RAM
  911. if (r1 & 2) {
  912. void *bank = Pico_mcd->prg_ram_b[(r3 >> 6) & 3];
  913. cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);
  914. }
  915. else {
  916. m68k_map_unmap(0x020000, 0x03ffff);
  917. }
  918. }
  919. static void remap_word_ram(u32 r3)
  920. {
  921. void *bank;
  922. // WORD RAM
  923. if (!(r3 & 4)) {
  924. // 2M mode. XXX: allowing access in all cases for simplicity
  925. bank = Pico_mcd->word_ram2M;
  926. cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);
  927. cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);
  928. // TODO: handle 0x0c0000
  929. }
  930. else {
  931. int b0 = r3 & 1;
  932. int m = (r3 & 0x18) >> 3;
  933. bank = Pico_mcd->word_ram1M[b0];
  934. cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);
  935. bank = Pico_mcd->word_ram1M[b0 ^ 1];
  936. cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);
  937. // "cell arrange" on m68k
  938. cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1);
  939. cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1);
  940. cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1);
  941. cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1);
  942. // "decode format" on s68k
  943. cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1);
  944. cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1);
  945. cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);
  946. cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);
  947. }
  948. }
  949. void pcd_state_loaded_mem(void)
  950. {
  951. u32 r3 = Pico_mcd->s68k_regs[3];
  952. /* after load events */
  953. if (r3 & 4) // 1M mode?
  954. wram_2M_to_1M(Pico_mcd->word_ram2M);
  955. remap_word_ram(r3);
  956. remap_prg_window(Pico_mcd->m.busreq, r3);
  957. Pico_mcd->m.dmna_ret_2m &= 3;
  958. // restore hint vector
  959. *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;
  960. }
  961. #ifdef EMU_M68K
  962. static void m68k_mem_setup_cd(void);
  963. #endif
  964. PICO_INTERNAL void PicoMemSetupCD(void)
  965. {
  966. // setup default main68k map
  967. PicoMemSetup();
  968. // main68k map (BIOS mapped by PicoMemSetup()):
  969. // RAM cart
  970. if (PicoOpt & POPT_EN_MCD_RAMCART) {
  971. cpu68k_map_set(m68k_read8_map, 0x400000, 0x7fffff, PicoReadM68k8_ramc, 1);
  972. cpu68k_map_set(m68k_read16_map, 0x400000, 0x7fffff, PicoReadM68k16_ramc, 1);
  973. cpu68k_map_set(m68k_write8_map, 0x400000, 0x7fffff, PicoWriteM68k8_ramc, 1);
  974. cpu68k_map_set(m68k_write16_map, 0x400000, 0x7fffff, PicoWriteM68k16_ramc, 1);
  975. }
  976. // registers/IO:
  977. cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_mcd_io, 1);
  978. cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_mcd_io, 1);
  979. cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_mcd_io, 1);
  980. cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_mcd_io, 1);
  981. // sub68k map
  982. cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);
  983. cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 1);
  984. cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 1);
  985. cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);
  986. // PRG RAM
  987. cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
  988. cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
  989. cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
  990. cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
  991. cpu68k_map_set(s68k_write8_map, 0x000000, 0x01ffff, PicoWriteS68k8_prgwp, 1);
  992. cpu68k_map_set(s68k_write16_map, 0x000000, 0x01ffff, PicoWriteS68k16_prgwp, 1);
  993. // BRAM
  994. cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);
  995. cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);
  996. cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);
  997. cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);
  998. // PCM, regs
  999. cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 1);
  1000. cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 1);
  1001. cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);
  1002. cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);
  1003. // RAMs
  1004. remap_word_ram(1);
  1005. #ifdef EMU_C68K
  1006. // s68k
  1007. PicoCpuCS68k.read8 = (void *)s68k_read8_map;
  1008. PicoCpuCS68k.read16 = (void *)s68k_read16_map;
  1009. PicoCpuCS68k.read32 = (void *)s68k_read16_map;
  1010. PicoCpuCS68k.write8 = (void *)s68k_write8_map;
  1011. PicoCpuCS68k.write16 = (void *)s68k_write16_map;
  1012. PicoCpuCS68k.write32 = (void *)s68k_write16_map;
  1013. PicoCpuCS68k.checkpc = NULL; /* unused */
  1014. PicoCpuCS68k.fetch8 = NULL;
  1015. PicoCpuCS68k.fetch16 = NULL;
  1016. PicoCpuCS68k.fetch32 = NULL;
  1017. #endif
  1018. #ifdef EMU_F68K
  1019. // s68k
  1020. PicoCpuFS68k.read_byte = s68k_read8;
  1021. PicoCpuFS68k.read_word = s68k_read16;
  1022. PicoCpuFS68k.read_long = s68k_read32;
  1023. PicoCpuFS68k.write_byte = s68k_write8;
  1024. PicoCpuFS68k.write_word = s68k_write16;
  1025. PicoCpuFS68k.write_long = s68k_write32;
  1026. // setup FAME fetchmap
  1027. {
  1028. int i;
  1029. // M68k
  1030. // by default, point everything to fitst 64k of ROM (BIOS)
  1031. for (i = 0; i < M68K_FETCHBANK1; i++)
  1032. PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
  1033. // now real ROM (BIOS)
  1034. for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
  1035. PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;
  1036. // .. and RAM
  1037. for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
  1038. PicoCpuFM68k.Fetch[i] = (unsigned long)PicoMem.ram - (i<<(24-FAMEC_FETCHBITS));
  1039. // S68k
  1040. // PRG RAM is default
  1041. for (i = 0; i < M68K_FETCHBANK1; i++)
  1042. PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));
  1043. // real PRG RAM
  1044. for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)
  1045. PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram;
  1046. // WORD RAM 2M area
  1047. for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)
  1048. PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x80000;
  1049. // remap_word_ram() will setup word ram for both
  1050. }
  1051. #endif
  1052. #ifdef EMU_M68K
  1053. m68k_mem_setup_cd();
  1054. #endif
  1055. }
  1056. #ifdef EMU_M68K
  1057. u32 m68k_read8(u32 a);
  1058. u32 m68k_read16(u32 a);
  1059. u32 m68k_read32(u32 a);
  1060. void m68k_write8(u32 a, u8 d);
  1061. void m68k_write16(u32 a, u16 d);
  1062. void m68k_write32(u32 a, u32 d);
  1063. static unsigned int PicoReadCD8w (unsigned int a) {
  1064. return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read8(a) : m68k_read8(a);
  1065. }
  1066. static unsigned int PicoReadCD16w(unsigned int a) {
  1067. return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read16(a) : m68k_read16(a);
  1068. }
  1069. static unsigned int PicoReadCD32w(unsigned int a) {
  1070. return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read32(a) : m68k_read32(a);
  1071. }
  1072. static void PicoWriteCD8w (unsigned int a, unsigned char d) {
  1073. if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write8(a, d); else m68k_write8(a, d);
  1074. }
  1075. static void PicoWriteCD16w(unsigned int a, unsigned short d) {
  1076. if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write16(a, d); else m68k_write16(a, d);
  1077. }
  1078. static void PicoWriteCD32w(unsigned int a, unsigned int d) {
  1079. if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write32(a, d); else m68k_write32(a, d);
  1080. }
  1081. extern unsigned int (*pm68k_read_memory_8) (unsigned int address);
  1082. extern unsigned int (*pm68k_read_memory_16)(unsigned int address);
  1083. extern unsigned int (*pm68k_read_memory_32)(unsigned int address);
  1084. extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);
  1085. extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);
  1086. extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);
  1087. static void m68k_mem_setup_cd(void)
  1088. {
  1089. pm68k_read_memory_8 = PicoReadCD8w;
  1090. pm68k_read_memory_16 = PicoReadCD16w;
  1091. pm68k_read_memory_32 = PicoReadCD32w;
  1092. pm68k_write_memory_8 = PicoWriteCD8w;
  1093. pm68k_write_memory_16 = PicoWriteCD16w;
  1094. pm68k_write_memory_32 = PicoWriteCD32w;
  1095. }
  1096. #endif // EMU_M68K
  1097. // vim:shiftwidth=2:ts=2:expandtab