carthw.c 17 KB

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  1. /*
  2. * Support for a few cart mappers and some protection.
  3. * (C) notaz, 2008-2011
  4. *
  5. * This work is licensed under the terms of MAME license.
  6. * See COPYING file in the top-level directory.
  7. */
  8. #include "../pico_int.h"
  9. #include "../memory.h"
  10. #include "eeprom_spi.h"
  11. static int have_bank(u32 base)
  12. {
  13. // the loader allocs in 512K quantities
  14. if (base >= Pico.romsize) {
  15. elprintf(EL_ANOMALY|EL_STATUS, "carthw: missing bank @ %06x", base);
  16. return 0;
  17. }
  18. return 1;
  19. }
  20. /* The SSFII mapper */
  21. static unsigned char ssf2_banks[8];
  22. static carthw_state_chunk carthw_ssf2_state[] =
  23. {
  24. { CHUNK_CARTHW, sizeof(ssf2_banks), &ssf2_banks },
  25. { 0, 0, NULL }
  26. };
  27. static void carthw_ssf2_write8(u32 a, u32 d)
  28. {
  29. u32 target, base;
  30. if ((a & 0xfffff0) != 0xa130f0) {
  31. PicoWrite8_io(a, d);
  32. return;
  33. }
  34. a &= 0x0e;
  35. if (a == 0)
  36. return;
  37. ssf2_banks[a >> 1] = d;
  38. base = d << 19;
  39. target = a << 18;
  40. if (!have_bank(base))
  41. return;
  42. cpu68k_map_set(m68k_read8_map, target, target + 0x80000 - 1, Pico.rom + base, 0);
  43. cpu68k_map_set(m68k_read16_map, target, target + 0x80000 - 1, Pico.rom + base, 0);
  44. }
  45. static void carthw_ssf2_mem_setup(void)
  46. {
  47. cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, carthw_ssf2_write8, 1);
  48. }
  49. static void carthw_ssf2_statef(void)
  50. {
  51. int i;
  52. for (i = 1; i < 8; i++)
  53. carthw_ssf2_write8(0xa130f0 | (i << 1), ssf2_banks[i]);
  54. }
  55. void carthw_ssf2_startup(void)
  56. {
  57. int i;
  58. elprintf(EL_STATUS, "SSF2 mapper startup");
  59. // default map
  60. for (i = 0; i < 8; i++)
  61. ssf2_banks[i] = i;
  62. PicoCartMemSetup = carthw_ssf2_mem_setup;
  63. PicoLoadStateHook = carthw_ssf2_statef;
  64. carthw_chunks = carthw_ssf2_state;
  65. }
  66. /* Common *-in-1 pirate mapper.
  67. * Switches banks based on addr lines when /TIME is set.
  68. * TODO: verify
  69. */
  70. static unsigned int carthw_Xin1_baddr = 0;
  71. static void carthw_Xin1_do(u32 a, int mask, int shift)
  72. {
  73. int len;
  74. carthw_Xin1_baddr = a;
  75. a &= mask;
  76. a <<= shift;
  77. len = Pico.romsize - a;
  78. if (len <= 0) {
  79. elprintf(EL_ANOMALY|EL_STATUS, "X-in-1: missing bank @ %06x", a);
  80. return;
  81. }
  82. len = (len + M68K_BANK_MASK) & ~M68K_BANK_MASK;
  83. cpu68k_map_set(m68k_read8_map, 0x000000, len - 1, Pico.rom + a, 0);
  84. cpu68k_map_set(m68k_read16_map, 0x000000, len - 1, Pico.rom + a, 0);
  85. }
  86. static carthw_state_chunk carthw_Xin1_state[] =
  87. {
  88. { CHUNK_CARTHW, sizeof(carthw_Xin1_baddr), &carthw_Xin1_baddr },
  89. { 0, 0, NULL }
  90. };
  91. // TODO: test a0, reads, w16
  92. static void carthw_Xin1_write8(u32 a, u32 d)
  93. {
  94. if ((a & 0xffff00) != 0xa13000) {
  95. PicoWrite8_io(a, d);
  96. return;
  97. }
  98. carthw_Xin1_do(a, 0x3f, 16);
  99. }
  100. static void carthw_Xin1_mem_setup(void)
  101. {
  102. cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, carthw_Xin1_write8, 1);
  103. }
  104. static void carthw_Xin1_reset(void)
  105. {
  106. carthw_Xin1_write8(0xa13000, 0);
  107. }
  108. static void carthw_Xin1_statef(void)
  109. {
  110. carthw_Xin1_write8(carthw_Xin1_baddr, 0);
  111. }
  112. void carthw_Xin1_startup(void)
  113. {
  114. elprintf(EL_STATUS, "X-in-1 mapper startup");
  115. PicoCartMemSetup = carthw_Xin1_mem_setup;
  116. PicoResetHook = carthw_Xin1_reset;
  117. PicoLoadStateHook = carthw_Xin1_statef;
  118. carthw_chunks = carthw_Xin1_state;
  119. }
  120. /* Realtec, based on TascoDLX doc
  121. * http://www.sharemation.com/TascoDLX/REALTEC%20Cart%20Mapper%20-%20description%20v1.txt
  122. */
  123. static int realtec_bank = 0x80000000, realtec_size = 0x80000000;
  124. static void carthw_realtec_write8(u32 a, u32 d)
  125. {
  126. int i, bank_old = realtec_bank, size_old = realtec_size;
  127. if (a == 0x400000)
  128. {
  129. realtec_bank &= 0x0e0000;
  130. realtec_bank |= 0x300000 & (d << 19);
  131. if (realtec_bank != bank_old)
  132. elprintf(EL_ANOMALY, "write [%06x] %02x @ %06x", a, d, SekPc);
  133. }
  134. else if (a == 0x402000)
  135. {
  136. realtec_size = (d << 17) & 0x3e0000;
  137. if (realtec_size != size_old)
  138. elprintf(EL_ANOMALY, "write [%06x] %02x @ %06x", a, d, SekPc);
  139. }
  140. else if (a == 0x404000)
  141. {
  142. realtec_bank &= 0x300000;
  143. realtec_bank |= 0x0e0000 & (d << 17);
  144. if (realtec_bank != bank_old)
  145. elprintf(EL_ANOMALY, "write [%06x] %02x @ %06x", a, d, SekPc);
  146. }
  147. else
  148. elprintf(EL_ANOMALY, "realtec: unexpected write [%06x] %02x @ %06x", a, d, SekPc);
  149. if (realtec_bank >= 0 && realtec_size >= 0 &&
  150. (realtec_bank != bank_old || realtec_size != size_old))
  151. {
  152. elprintf(EL_ANOMALY, "realtec: new bank %06x, size %06x", realtec_bank, realtec_size, SekPc);
  153. if (realtec_size > Pico.romsize - realtec_bank)
  154. {
  155. elprintf(EL_ANOMALY, "realtec: bank too large / out of range?");
  156. return;
  157. }
  158. for (i = 0; i < 0x400000; i += realtec_size) {
  159. cpu68k_map_set(m68k_read8_map, i, realtec_size - 1, Pico.rom + realtec_bank, 0);
  160. cpu68k_map_set(m68k_read16_map, i, realtec_size - 1, Pico.rom + realtec_bank, 0);
  161. }
  162. }
  163. }
  164. static void carthw_realtec_reset(void)
  165. {
  166. int i;
  167. /* map boot code */
  168. for (i = 0; i < 0x400000; i += M68K_BANK_SIZE) {
  169. cpu68k_map_set(m68k_read8_map, i, i + M68K_BANK_SIZE - 1, Pico.rom + Pico.romsize, 0);
  170. cpu68k_map_set(m68k_read16_map, i, i + M68K_BANK_SIZE - 1, Pico.rom + Pico.romsize, 0);
  171. }
  172. cpu68k_map_set(m68k_write8_map, 0x400000, 0x400000 + M68K_BANK_SIZE - 1, carthw_realtec_write8, 1);
  173. realtec_bank = realtec_size = 0x80000000;
  174. }
  175. void carthw_realtec_startup(void)
  176. {
  177. int i;
  178. elprintf(EL_STATUS, "Realtec mapper startup");
  179. // allocate additional bank for boot code
  180. // (we know those ROMs have aligned size)
  181. i = PicoCartResize(Pico.romsize + M68K_BANK_SIZE);
  182. if (i != 0) {
  183. elprintf(EL_STATUS, "OOM");
  184. return;
  185. }
  186. // create bank for boot code
  187. for (i = 0; i < M68K_BANK_SIZE; i += 0x2000)
  188. memcpy(Pico.rom + Pico.romsize + i, Pico.rom + Pico.romsize - 0x2000, 0x2000);
  189. PicoResetHook = carthw_realtec_reset;
  190. }
  191. /* Radica mapper, based on DevSter's info
  192. * http://devster.monkeeh.com/sega/radica/
  193. * XXX: mostly the same as X-in-1, merge?
  194. */
  195. static u32 carthw_radica_read16(u32 a)
  196. {
  197. if ((a & 0xffff00) != 0xa13000)
  198. return PicoRead16_io(a);
  199. carthw_Xin1_do(a, 0x7e, 15);
  200. return 0;
  201. }
  202. static void carthw_radica_mem_setup(void)
  203. {
  204. cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, carthw_radica_read16, 1);
  205. }
  206. static void carthw_radica_statef(void)
  207. {
  208. carthw_radica_read16(carthw_Xin1_baddr);
  209. }
  210. static void carthw_radica_reset(void)
  211. {
  212. carthw_radica_read16(0xa13000);
  213. }
  214. void carthw_radica_startup(void)
  215. {
  216. elprintf(EL_STATUS, "Radica mapper startup");
  217. PicoCartMemSetup = carthw_radica_mem_setup;
  218. PicoResetHook = carthw_radica_reset;
  219. PicoLoadStateHook = carthw_radica_statef;
  220. carthw_chunks = carthw_Xin1_state;
  221. }
  222. /* Pier Solar. Based on my own research */
  223. static unsigned char pier_regs[8];
  224. static unsigned char pier_dump_prot;
  225. static carthw_state_chunk carthw_pier_state[] =
  226. {
  227. { CHUNK_CARTHW, sizeof(pier_regs), pier_regs },
  228. { CHUNK_CARTHW + 1, sizeof(pier_dump_prot), &pier_dump_prot },
  229. { CHUNK_CARTHW + 2, 0, NULL }, // filled later
  230. { 0, 0, NULL }
  231. };
  232. static void carthw_pier_write8(u32 a, u32 d)
  233. {
  234. u32 a8, target, base;
  235. if ((a & 0xffff00) != 0xa13000) {
  236. PicoWrite8_io(a, d);
  237. return;
  238. }
  239. a8 = a & 0x0f;
  240. pier_regs[a8 / 2] = d;
  241. elprintf(EL_UIO, "pier w8 [%06x] %02x @%06x", a, d & 0xffff, SekPc);
  242. switch (a8) {
  243. case 0x01:
  244. break;
  245. case 0x03:
  246. if (!(pier_regs[0] & 2))
  247. goto unmapped;
  248. target = 0x280000;
  249. base = d << 19;
  250. goto do_map;
  251. case 0x05:
  252. if (!(pier_regs[0] & 2))
  253. goto unmapped;
  254. target = 0x300000;
  255. base = d << 19;
  256. goto do_map;
  257. case 0x07:
  258. if (!(pier_regs[0] & 2))
  259. goto unmapped;
  260. target = 0x380000;
  261. base = d << 19;
  262. goto do_map;
  263. case 0x09:
  264. Pico.sv.changed = 1;
  265. eeprom_spi_write(d);
  266. break;
  267. case 0x0b:
  268. // eeprom read
  269. default:
  270. unmapped:
  271. //elprintf(EL_UIO, "pier w8 [%06x] %02x @%06x", a, d & 0xffff, SekPc);
  272. elprintf(EL_STATUS, "-- unmapped w8 [%06x] %02x @%06x", a, d & 0xffff, SekPc);
  273. break;
  274. }
  275. return;
  276. do_map:
  277. if (!have_bank(base))
  278. return;
  279. cpu68k_map_set(m68k_read8_map, target, target + 0x80000 - 1, Pico.rom + base, 0);
  280. cpu68k_map_set(m68k_read16_map, target, target + 0x80000 - 1, Pico.rom + base, 0);
  281. }
  282. static void carthw_pier_write16(u32 a, u32 d)
  283. {
  284. if ((a & 0xffff00) != 0xa13000) {
  285. PicoWrite16_io(a, d);
  286. return;
  287. }
  288. elprintf(EL_UIO, "pier w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
  289. carthw_pier_write8(a + 1, d);
  290. }
  291. static u32 carthw_pier_read8(u32 a)
  292. {
  293. if ((a & 0xffff00) != 0xa13000)
  294. return PicoRead8_io(a);
  295. if (a == 0xa1300b)
  296. return eeprom_spi_read(a);
  297. elprintf(EL_UIO, "pier r8 [%06x] @%06x", a, SekPc);
  298. return 0;
  299. }
  300. static void carthw_pier_statef(void);
  301. static u32 carthw_pier_prot_read8(u32 a)
  302. {
  303. /* it takes more than just these reads here to disable ROM protection,
  304. * but for game emulation purposes this is enough. */
  305. if (pier_dump_prot > 0)
  306. pier_dump_prot--;
  307. if (pier_dump_prot == 0) {
  308. carthw_pier_statef();
  309. elprintf(EL_STATUS, "prot off on r8 @%06x", SekPc);
  310. }
  311. elprintf(EL_UIO, "pier r8 [%06x] @%06x", a, SekPc);
  312. return Pico.rom[(a & 0x7fff) ^ 1];
  313. }
  314. static void carthw_pier_mem_setup(void)
  315. {
  316. cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, carthw_pier_write8, 1);
  317. cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, carthw_pier_write16, 1);
  318. cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, carthw_pier_read8, 1);
  319. }
  320. static void carthw_pier_prot_mem_setup(int prot_enable)
  321. {
  322. if (prot_enable) {
  323. /* the dump protection.. */
  324. int a;
  325. for (a = 0x000000; a < 0x400000; a += M68K_BANK_SIZE) {
  326. cpu68k_map_set(m68k_read8_map, a, a + 0xffff, Pico.rom + Pico.romsize, 0);
  327. cpu68k_map_set(m68k_read16_map, a, a + 0xffff, Pico.rom + Pico.romsize, 0);
  328. }
  329. cpu68k_map_set(m68k_read8_map, M68K_BANK_SIZE, M68K_BANK_SIZE * 2 - 1,
  330. carthw_pier_prot_read8, 1);
  331. }
  332. else {
  333. cpu68k_map_set(m68k_read8_map, 0, 0x27ffff, Pico.rom, 0);
  334. cpu68k_map_set(m68k_read16_map, 0, 0x27ffff, Pico.rom, 0);
  335. }
  336. }
  337. static void carthw_pier_statef(void)
  338. {
  339. carthw_pier_prot_mem_setup(pier_dump_prot);
  340. if (!pier_dump_prot) {
  341. /* setup all banks */
  342. u32 r0 = pier_regs[0];
  343. carthw_pier_write8(0xa13001, 3);
  344. carthw_pier_write8(0xa13003, pier_regs[1]);
  345. carthw_pier_write8(0xa13005, pier_regs[2]);
  346. carthw_pier_write8(0xa13007, pier_regs[3]);
  347. carthw_pier_write8(0xa13001, r0);
  348. }
  349. }
  350. static void carthw_pier_reset(void)
  351. {
  352. pier_regs[0] = 1;
  353. pier_regs[1] = pier_regs[2] = pier_regs[3] = 0;
  354. pier_dump_prot = 3;
  355. carthw_pier_statef();
  356. eeprom_spi_init(NULL);
  357. }
  358. void carthw_pier_startup(void)
  359. {
  360. void *eeprom_state;
  361. int eeprom_size = 0;
  362. int i;
  363. elprintf(EL_STATUS, "Pier Solar mapper startup");
  364. // mostly same as for realtec..
  365. i = PicoCartResize(Pico.romsize + M68K_BANK_SIZE);
  366. if (i != 0) {
  367. elprintf(EL_STATUS, "OOM");
  368. return;
  369. }
  370. // create dump protection bank
  371. for (i = 0; i < M68K_BANK_SIZE; i += 0x8000)
  372. memcpy(Pico.rom + Pico.romsize + i, Pico.rom, 0x8000);
  373. // save EEPROM
  374. eeprom_state = eeprom_spi_init(&eeprom_size);
  375. Pico.sv.flags = 0;
  376. Pico.sv.size = 0x10000;
  377. Pico.sv.data = calloc(1, Pico.sv.size);
  378. if (!Pico.sv.data)
  379. Pico.sv.size = 0;
  380. carthw_pier_state[2].ptr = eeprom_state;
  381. carthw_pier_state[2].size = eeprom_size;
  382. PicoCartMemSetup = carthw_pier_mem_setup;
  383. PicoResetHook = carthw_pier_reset;
  384. PicoLoadStateHook = carthw_pier_statef;
  385. carthw_chunks = carthw_pier_state;
  386. }
  387. /* Simple unlicensed ROM protection emulation */
  388. static struct {
  389. u32 addr;
  390. u32 mask;
  391. u16 val;
  392. u16 readonly;
  393. } *sprot_items;
  394. static int sprot_item_alloc;
  395. static int sprot_item_count;
  396. static u16 *carthw_sprot_get_val(u32 a, int rw_only)
  397. {
  398. int i;
  399. for (i = 0; i < sprot_item_count; i++)
  400. if ((a & sprot_items[i].mask) == sprot_items[i].addr)
  401. if (!rw_only || !sprot_items[i].readonly)
  402. return &sprot_items[i].val;
  403. return NULL;
  404. }
  405. static u32 PicoRead8_sprot(u32 a)
  406. {
  407. u16 *val;
  408. u32 d;
  409. if (0xa10000 <= a && a < 0xa12000)
  410. return PicoRead8_io(a);
  411. val = carthw_sprot_get_val(a, 0);
  412. if (val != NULL) {
  413. d = *val;
  414. if (!(a & 1))
  415. d >>= 8;
  416. elprintf(EL_UIO, "prot r8 [%06x] %02x @%06x", a, d, SekPc);
  417. return d;
  418. }
  419. else {
  420. elprintf(EL_UIO, "prot r8 [%06x] MISS @%06x", a, SekPc);
  421. return 0;
  422. }
  423. }
  424. static u32 PicoRead16_sprot(u32 a)
  425. {
  426. u16 *val;
  427. if (0xa10000 <= a && a < 0xa12000)
  428. return PicoRead16_io(a);
  429. val = carthw_sprot_get_val(a, 0);
  430. if (val != NULL) {
  431. elprintf(EL_UIO, "prot r16 [%06x] %04x @%06x", a, *val, SekPc);
  432. return *val;
  433. }
  434. else {
  435. elprintf(EL_UIO, "prot r16 [%06x] MISS @%06x", a, SekPc);
  436. return 0;
  437. }
  438. }
  439. static void PicoWrite8_sprot(u32 a, u32 d)
  440. {
  441. u16 *val;
  442. if (0xa10000 <= a && a < 0xa12000) {
  443. PicoWrite8_io(a, d);
  444. return;
  445. }
  446. val = carthw_sprot_get_val(a, 1);
  447. if (val != NULL) {
  448. if (a & 1)
  449. *val = (*val & 0xff00) | (d | 0xff);
  450. else
  451. *val = (*val & 0x00ff) | (d << 8);
  452. elprintf(EL_UIO, "prot w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
  453. }
  454. else
  455. elprintf(EL_UIO, "prot w8 [%06x] %02x MISS @%06x", a, d & 0xff, SekPc);
  456. }
  457. static void PicoWrite16_sprot(u32 a, u32 d)
  458. {
  459. u16 *val;
  460. if (0xa10000 <= a && a < 0xa12000) {
  461. PicoWrite16_io(a, d);
  462. return;
  463. }
  464. val = carthw_sprot_get_val(a, 1);
  465. if (val != NULL) {
  466. *val = d;
  467. elprintf(EL_UIO, "prot w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
  468. }
  469. else
  470. elprintf(EL_UIO, "prot w16 [%06x] %04x MISS @%06x", a, d & 0xffff, SekPc);
  471. }
  472. void carthw_sprot_new_location(unsigned int a, unsigned int mask, unsigned short val, int is_ro)
  473. {
  474. if (sprot_items == NULL) {
  475. sprot_items = calloc(8, sizeof(sprot_items[0]));
  476. sprot_item_alloc = 8;
  477. sprot_item_count = 0;
  478. }
  479. if (sprot_item_count == sprot_item_alloc) {
  480. void *tmp;
  481. sprot_item_alloc *= 2;
  482. tmp = realloc(sprot_items, sprot_item_alloc);
  483. if (tmp == NULL) {
  484. elprintf(EL_STATUS, "OOM");
  485. return;
  486. }
  487. sprot_items = tmp;
  488. }
  489. sprot_items[sprot_item_count].addr = a;
  490. sprot_items[sprot_item_count].mask = mask;
  491. sprot_items[sprot_item_count].val = val;
  492. sprot_items[sprot_item_count].readonly = is_ro;
  493. sprot_item_count++;
  494. }
  495. static void carthw_sprot_unload(void)
  496. {
  497. free(sprot_items);
  498. sprot_items = NULL;
  499. sprot_item_count = sprot_item_alloc = 0;
  500. }
  501. static void carthw_sprot_mem_setup(void)
  502. {
  503. int start;
  504. // map ROM - 0x7fffff, /TIME areas (which are tipically used)
  505. start = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
  506. cpu68k_map_set(m68k_read8_map, start, 0x7fffff, PicoRead8_sprot, 1);
  507. cpu68k_map_set(m68k_read16_map, start, 0x7fffff, PicoRead16_sprot, 1);
  508. cpu68k_map_set(m68k_write8_map, start, 0x7fffff, PicoWrite8_sprot, 1);
  509. cpu68k_map_set(m68k_write16_map, start, 0x7fffff, PicoWrite16_sprot, 1);
  510. cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_sprot, 1);
  511. cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_sprot, 1);
  512. cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_sprot, 1);
  513. cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_sprot, 1);
  514. }
  515. void carthw_sprot_startup(void)
  516. {
  517. elprintf(EL_STATUS, "Prot emu startup");
  518. PicoCartMemSetup = carthw_sprot_mem_setup;
  519. PicoCartUnloadHook = carthw_sprot_unload;
  520. }
  521. /* Protection emulation for Lion King 3. Credits go to Haze */
  522. static u8 prot_lk3_cmd, prot_lk3_data;
  523. static u32 PicoRead8_plk3(u32 a)
  524. {
  525. u32 d = 0;
  526. switch (prot_lk3_cmd) {
  527. case 1: d = prot_lk3_data >> 1; break;
  528. case 2: // nibble rotate
  529. d = ((prot_lk3_data >> 4) | (prot_lk3_data << 4)) & 0xff;
  530. break;
  531. case 3: // bit rotate
  532. d = prot_lk3_data;
  533. d = (d >> 4) | (d << 4);
  534. d = ((d & 0xcc) >> 2) | ((d & 0x33) << 2);
  535. d = ((d & 0xaa) >> 1) | ((d & 0x55) << 1);
  536. break;
  537. /* Top Fighter 2000 MK VIII (Unl)
  538. case 0x98: d = 0x50; break; // prot_lk3_data == a8 here
  539. case 0x67: d = 0xde; break; // prot_lk3_data == 7b here (rot!)
  540. case 0xb5: d = 0x9f; break; // prot_lk3_data == 4a
  541. */
  542. default:
  543. elprintf(EL_UIO, "unhandled prot cmd %02x @%06x", prot_lk3_cmd, SekPc);
  544. break;
  545. }
  546. elprintf(EL_UIO, "prot r8 [%06x] %02x @%06x", a, d, SekPc);
  547. return d;
  548. }
  549. static void PicoWrite8_plk3p(u32 a, u32 d)
  550. {
  551. elprintf(EL_UIO, "prot w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
  552. if (a & 2)
  553. prot_lk3_cmd = d;
  554. else
  555. prot_lk3_data = d;
  556. }
  557. static void PicoWrite8_plk3b(u32 a, u32 d)
  558. {
  559. int addr;
  560. elprintf(EL_UIO, "prot w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
  561. addr = d << 15;
  562. if (addr + 0x8000 > Pico.romsize) {
  563. elprintf(EL_UIO|EL_ANOMALY, "prot_lk3: bank too large: %02x", d);
  564. return;
  565. }
  566. if (addr == 0)
  567. memcpy(Pico.rom, Pico.rom + Pico.romsize, 0x8000);
  568. else
  569. memcpy(Pico.rom, Pico.rom + addr, 0x8000);
  570. }
  571. static void carthw_prot_lk3_mem_setup(void)
  572. {
  573. cpu68k_map_set(m68k_read8_map, 0x600000, 0x7fffff, PicoRead8_plk3, 1);
  574. cpu68k_map_set(m68k_write8_map, 0x600000, 0x6fffff, PicoWrite8_plk3p, 1);
  575. cpu68k_map_set(m68k_write8_map, 0x700000, 0x7fffff, PicoWrite8_plk3b, 1);
  576. }
  577. void carthw_prot_lk3_startup(void)
  578. {
  579. int ret;
  580. elprintf(EL_STATUS, "lk3 prot emu startup");
  581. // allocate space for bank0 backup
  582. ret = PicoCartResize(Pico.romsize + 0x8000);
  583. if (ret != 0) {
  584. elprintf(EL_STATUS, "OOM");
  585. return;
  586. }
  587. memcpy(Pico.rom + Pico.romsize, Pico.rom, 0x8000);
  588. PicoCartMemSetup = carthw_prot_lk3_mem_setup;
  589. }
  590. // vim:ts=2:sw=2:expandtab