m68kcpu.h 66 KB

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  1. #include <stdio.h>
  2. /* ======================================================================== */
  3. /* ========================= LICENSING & COPYRIGHT ======================== */
  4. /* ======================================================================== */
  5. /*
  6. * MUSASHI
  7. * Version 3.31
  8. *
  9. * A portable Motorola M680x0 processor emulation engine.
  10. * Copyright 1998-2007 Karl Stenerud. All rights reserved.
  11. *
  12. * This code may be freely used for non-commercial purposes as long as this
  13. * copyright notice remains unaltered in the source code and any binary files
  14. * containing this code in compiled form.
  15. *
  16. * All other lisencing terms must be negotiated with the author
  17. * (Karl Stenerud).
  18. *
  19. * The latest version of this code can be obtained at:
  20. * http://kstenerud.cjb.net
  21. */
  22. #ifndef M68KCPU__HEADER
  23. #define M68KCPU__HEADER
  24. // notaz: something's missing this
  25. #ifndef UINT64
  26. #define UINT64 unsigned long long
  27. #endif
  28. #ifndef UINT16
  29. #define UINT32 unsigned int
  30. #define UINT16 unsigned short
  31. #define UINT8 unsigned char
  32. #endif
  33. #include "m68k.h"
  34. #include <limits.h>
  35. #if M68K_EMULATE_ADDRESS_ERROR
  36. #include <setjmp.h>
  37. #endif /* M68K_EMULATE_ADDRESS_ERROR */
  38. /* ======================================================================== */
  39. /* ==================== ARCHITECTURE-DEPENDANT DEFINES ==================== */
  40. /* ======================================================================== */
  41. /* Check for > 32bit sizes */
  42. #if UINT_MAX > 0xffffffff
  43. #define M68K_INT_GT_32_BIT 1
  44. #else
  45. #define M68K_INT_GT_32_BIT 0
  46. #endif
  47. /* Data types used in this emulation core */
  48. #undef sint8
  49. #undef sint16
  50. #undef sint32
  51. #undef sint64
  52. #undef uint8
  53. #undef uint16
  54. #undef uint32
  55. #undef uint64
  56. #undef sint
  57. #undef uint
  58. #define sint8 signed char /* ASG: changed from char to signed char */
  59. #define sint16 signed short
  60. #define sint32 signed int /* AWJ: changed from long to int */
  61. #define uint8 unsigned char
  62. #define uint16 unsigned short
  63. #define uint32 unsigned int /* AWJ: changed from long to int */
  64. /* signed and unsigned int must be at least 32 bits wide */
  65. #define sint signed int
  66. #define uint unsigned int
  67. #if M68K_USE_64_BIT
  68. #define sint64 signed long long
  69. #define uint64 unsigned long long
  70. #else
  71. #define sint64 sint32
  72. #define uint64 uint32
  73. #endif /* M68K_USE_64_BIT */
  74. /* Allow for architectures that don't have 8-bit sizes */
  75. #if UCHAR_MAX == 0xff
  76. #define MAKE_INT_8(A) (sint8)(A)
  77. #else
  78. #undef sint8
  79. #define sint8 signed int
  80. #undef uint8
  81. #define uint8 unsigned int
  82. INLINE sint MAKE_INT_8(uint value)
  83. {
  84. return (value & 0x80) ? value | ~0xff : value & 0xff;
  85. }
  86. #endif /* UCHAR_MAX == 0xff */
  87. /* Allow for architectures that don't have 16-bit sizes */
  88. #if USHRT_MAX == 0xffff
  89. #define MAKE_INT_16(A) (sint16)(A)
  90. #else
  91. #undef sint16
  92. #define sint16 signed int
  93. #undef uint16
  94. #define uint16 unsigned int
  95. INLINE sint MAKE_INT_16(uint value)
  96. {
  97. return (value & 0x8000) ? value | ~0xffff : value & 0xffff;
  98. }
  99. #endif /* USHRT_MAX == 0xffff */
  100. /* Allow for architectures that don't have 32-bit sizes */
  101. #if UINT_MAX == 0xffffffff
  102. #define MAKE_INT_32(A) (sint32)(A)
  103. #else
  104. #undef sint32
  105. #define sint32 signed int
  106. #undef uint32
  107. #define uint32 unsigned int
  108. INLINE sint MAKE_INT_32(uint value)
  109. {
  110. return (value & 0x80000000) ? value | ~0xffffffff : value & 0xffffffff;
  111. }
  112. #endif /* UINT_MAX == 0xffffffff */
  113. /* ======================================================================== */
  114. /* ============================ GENERAL DEFINES =========================== */
  115. /* ======================================================================== */
  116. /* Exception Vectors handled by emulation */
  117. #define EXCEPTION_BUS_ERROR 2 /* This one is not emulated! */
  118. #define EXCEPTION_ADDRESS_ERROR 3 /* This one is partially emulated (doesn't stack a proper frame yet) */
  119. #undef EXCEPTION_ILLEGAL_INSTRUCTION
  120. #define EXCEPTION_ILLEGAL_INSTRUCTION 4
  121. #define EXCEPTION_ZERO_DIVIDE 5
  122. #define EXCEPTION_CHK 6
  123. #define EXCEPTION_TRAPV 7
  124. #define EXCEPTION_PRIVILEGE_VIOLATION 8
  125. #define EXCEPTION_TRACE 9
  126. #define EXCEPTION_1010 10
  127. #define EXCEPTION_1111 11
  128. #define EXCEPTION_FORMAT_ERROR 14
  129. #define EXCEPTION_UNINITIALIZED_INTERRUPT 15
  130. #define EXCEPTION_SPURIOUS_INTERRUPT 24
  131. #define EXCEPTION_INTERRUPT_AUTOVECTOR 24
  132. #define EXCEPTION_TRAP_BASE 32
  133. /* Function codes set by CPU during data/address bus activity */
  134. #define FUNCTION_CODE_USER_DATA 1
  135. #define FUNCTION_CODE_USER_PROGRAM 2
  136. #define FUNCTION_CODE_SUPERVISOR_DATA 5
  137. #define FUNCTION_CODE_SUPERVISOR_PROGRAM 6
  138. #define FUNCTION_CODE_CPU_SPACE 7
  139. /* CPU types for deciding what to emulate */
  140. #define CPU_TYPE_000 1
  141. #define CPU_TYPE_008 2
  142. #define CPU_TYPE_010 4
  143. #define CPU_TYPE_EC020 8
  144. #define CPU_TYPE_020 16
  145. #define CPU_TYPE_040 32
  146. /* Different ways to stop the CPU */
  147. #define STOP_LEVEL_STOP 1
  148. #define STOP_LEVEL_HALT 2
  149. /* Used for 68000 address error processing */
  150. #define INSTRUCTION_YES 0
  151. #define INSTRUCTION_NO 0x08
  152. #define MODE_READ 0x10
  153. #define MODE_WRITE 0
  154. #define RUN_MODE_NORMAL 0
  155. #define RUN_MODE_BERR_AERR_RESET 1
  156. #ifndef NULL
  157. #define NULL ((void*)0)
  158. #endif
  159. /* ======================================================================== */
  160. /* ================================ MACROS ================================ */
  161. /* ======================================================================== */
  162. /* ---------------------------- General Macros ---------------------------- */
  163. /* Bit Isolation Macros */
  164. #define BIT_0(A) ((A) & 0x00000001)
  165. #define BIT_1(A) ((A) & 0x00000002)
  166. #define BIT_2(A) ((A) & 0x00000004)
  167. #define BIT_3(A) ((A) & 0x00000008)
  168. #define BIT_4(A) ((A) & 0x00000010)
  169. #define BIT_5(A) ((A) & 0x00000020)
  170. #define BIT_6(A) ((A) & 0x00000040)
  171. #define BIT_7(A) ((A) & 0x00000080)
  172. #define BIT_8(A) ((A) & 0x00000100)
  173. #define BIT_9(A) ((A) & 0x00000200)
  174. #define BIT_A(A) ((A) & 0x00000400)
  175. #define BIT_B(A) ((A) & 0x00000800)
  176. #define BIT_C(A) ((A) & 0x00001000)
  177. #define BIT_D(A) ((A) & 0x00002000)
  178. #define BIT_E(A) ((A) & 0x00004000)
  179. #define BIT_F(A) ((A) & 0x00008000)
  180. #define BIT_10(A) ((A) & 0x00010000)
  181. #define BIT_11(A) ((A) & 0x00020000)
  182. #define BIT_12(A) ((A) & 0x00040000)
  183. #define BIT_13(A) ((A) & 0x00080000)
  184. #define BIT_14(A) ((A) & 0x00100000)
  185. #define BIT_15(A) ((A) & 0x00200000)
  186. #define BIT_16(A) ((A) & 0x00400000)
  187. #define BIT_17(A) ((A) & 0x00800000)
  188. #define BIT_18(A) ((A) & 0x01000000)
  189. #define BIT_19(A) ((A) & 0x02000000)
  190. #define BIT_1A(A) ((A) & 0x04000000)
  191. #define BIT_1B(A) ((A) & 0x08000000)
  192. #define BIT_1C(A) ((A) & 0x10000000)
  193. #define BIT_1D(A) ((A) & 0x20000000)
  194. #define BIT_1E(A) ((A) & 0x40000000)
  195. #define BIT_1F(A) ((A) & 0x80000000)
  196. /* Get the most significant bit for specific sizes */
  197. #define GET_MSB_8(A) ((A) & 0x80)
  198. #define GET_MSB_9(A) ((A) & 0x100)
  199. #define GET_MSB_16(A) ((A) & 0x8000)
  200. #define GET_MSB_17(A) ((A) & 0x10000)
  201. #define GET_MSB_32(A) ((A) & 0x80000000)
  202. #if M68K_USE_64_BIT
  203. #define GET_MSB_33(A) ((A) & 0x100000000)
  204. #endif /* M68K_USE_64_BIT */
  205. /* Isolate nibbles */
  206. #define LOW_NIBBLE(A) ((A) & 0x0f)
  207. #define HIGH_NIBBLE(A) ((A) & 0xf0)
  208. /* These are used to isolate 8, 16, and 32 bit sizes */
  209. #define MASK_OUT_ABOVE_2(A) ((A) & 3)
  210. #define MASK_OUT_ABOVE_8(A) ((A) & 0xff)
  211. #define MASK_OUT_ABOVE_16(A) ((A) & 0xffff)
  212. #define MASK_OUT_BELOW_2(A) ((A) & ~3)
  213. #define MASK_OUT_BELOW_8(A) ((A) & ~0xff)
  214. #define MASK_OUT_BELOW_16(A) ((A) & ~0xffff)
  215. /* No need to mask if we are 32 bit */
  216. #if M68K_INT_GT_32_BIT || M68K_USE_64_BIT
  217. #define MASK_OUT_ABOVE_32(A) ((A) & 0xffffffff)
  218. #define MASK_OUT_BELOW_32(A) ((A) & ~0xffffffff)
  219. #else
  220. #define MASK_OUT_ABOVE_32(A) (A)
  221. #define MASK_OUT_BELOW_32(A) 0
  222. #endif /* M68K_INT_GT_32_BIT || M68K_USE_64_BIT */
  223. /* Simulate address lines of 68k family */
  224. #define ADDRESS_68K(A) ((A)&CPU_ADDRESS_MASK)
  225. /* Shift & Rotate Macros. */
  226. #define LSL(A, C) ((A) << (C))
  227. #define LSR(A, C) ((A) >> (C))
  228. /* Some > 32-bit optimizations */
  229. #if M68K_INT_GT_32_BIT
  230. /* Shift left and right */
  231. #define LSR_32(A, C) ((A) >> (C))
  232. #define LSL_32(A, C) ((A) << (C))
  233. #else
  234. /* We have to do this because the morons at ANSI decided that shifts
  235. * by >= data size are undefined.
  236. */
  237. #define LSR_32(A, C) ((C) < 32 ? (A) >> (C) : 0)
  238. #define LSL_32(A, C) ((C) < 32 ? (A) << (C) : 0)
  239. #endif /* M68K_INT_GT_32_BIT */
  240. #if M68K_USE_64_BIT
  241. #define LSL_32_64(A, C) ((A) << (C))
  242. #define LSR_32_64(A, C) ((A) >> (C))
  243. #define ROL_33_64(A, C) (LSL_32_64(A, C) | LSR_32_64(A, 33-(C)))
  244. #define ROR_33_64(A, C) (LSR_32_64(A, C) | LSL_32_64(A, 33-(C)))
  245. #endif /* M68K_USE_64_BIT */
  246. #define ROL_8(A, C) MASK_OUT_ABOVE_8(LSL(A, C) | LSR(A, 8-(C)))
  247. #define ROL_9(A, C) (LSL(A, C) | LSR(A, 9-(C)))
  248. #define ROL_16(A, C) MASK_OUT_ABOVE_16(LSL(A, C) | LSR(A, 16-(C)))
  249. #define ROL_17(A, C) (LSL(A, C) | LSR(A, 17-(C)))
  250. #define ROL_32(A, C) MASK_OUT_ABOVE_32(LSL_32(A, C) | LSR_32(A, 32-(C)))
  251. #define ROL_33(A, C) (LSL_32(A, C) | LSR_32(A, 33-(C)))
  252. #define ROR_8(A, C) MASK_OUT_ABOVE_8(LSR(A, C) | LSL(A, 8-(C)))
  253. #define ROR_9(A, C) (LSR(A, C) | LSL(A, 9-(C)))
  254. #define ROR_16(A, C) MASK_OUT_ABOVE_16(LSR(A, C) | LSL(A, 16-(C)))
  255. #define ROR_17(A, C) (LSR(A, C) | LSL(A, 17-(C)))
  256. #define ROR_32(A, C) MASK_OUT_ABOVE_32(LSR_32(A, C) | LSL_32(A, 32-(C)))
  257. #define ROR_33(A, C) (LSR_32(A, C) | LSL_32(A, 33-(C)))
  258. /* ------------------------------ CPU Access ------------------------------ */
  259. /* Access the CPU registers */
  260. #define CPU_TYPE m68ki_cpu.cpu_type
  261. #define REG_DA m68ki_cpu.dar /* easy access to data and address regs */
  262. #define REG_D m68ki_cpu.dar
  263. #define REG_A (m68ki_cpu.dar+8)
  264. #define REG_PPC m68ki_cpu.ppc
  265. #define REG_PC m68ki_cpu.pc
  266. #define REG_SP_BASE m68ki_cpu.sp
  267. #define REG_USP m68ki_cpu.sp[0]
  268. #define REG_ISP m68ki_cpu.sp[4]
  269. #define REG_MSP m68ki_cpu.sp[6]
  270. #define REG_SP m68ki_cpu.dar[15]
  271. #define REG_VBR m68ki_cpu.vbr
  272. #define REG_SFC m68ki_cpu.sfc
  273. #define REG_DFC m68ki_cpu.dfc
  274. #define REG_CACR m68ki_cpu.cacr
  275. #define REG_CAAR m68ki_cpu.caar
  276. #define REG_IR m68ki_cpu.ir
  277. #define REG_FP m68ki_cpu.fpr
  278. #define REG_FPCR m68ki_cpu.fpcr
  279. #define REG_FPSR m68ki_cpu.fpsr
  280. #define REG_FPIAR m68ki_cpu.fpiar
  281. #define FLAG_T1 m68ki_cpu.t1_flag
  282. #define FLAG_T0 m68ki_cpu.t0_flag
  283. #define FLAG_S m68ki_cpu.s_flag
  284. #define FLAG_M m68ki_cpu.m_flag
  285. #define FLAG_X m68ki_cpu.x_flag
  286. #define FLAG_N m68ki_cpu.n_flag
  287. #define FLAG_Z m68ki_cpu.not_z_flag
  288. #define FLAG_V m68ki_cpu.v_flag
  289. #define FLAG_C m68ki_cpu.c_flag
  290. #define FLAG_INT_MASK m68ki_cpu.int_mask
  291. #define CPU_INT_LEVEL m68ki_cpu.int_level /* ASG: changed from CPU_INTS_PENDING */
  292. #define CPU_INT_CYCLES m68ki_cpu.int_cycles /* ASG */
  293. #define CPU_STOPPED m68ki_cpu.stopped
  294. #define CPU_PREF_ADDR m68ki_cpu.pref_addr
  295. #define CPU_PREF_DATA m68ki_cpu.pref_data
  296. #define CPU_ADDRESS_MASK m68ki_cpu.address_mask
  297. #define CPU_SR_MASK m68ki_cpu.sr_mask
  298. #define CPU_INSTR_MODE m68ki_cpu.instr_mode
  299. #define CPU_RUN_MODE m68ki_cpu.run_mode
  300. #define CYC_INSTRUCTION m68ki_cpu.cyc_instruction
  301. #define CYC_EXCEPTION m68ki_cpu.cyc_exception
  302. #define CYC_BCC_NOTAKE_B m68ki_cpu.cyc_bcc_notake_b
  303. #define CYC_BCC_NOTAKE_W m68ki_cpu.cyc_bcc_notake_w
  304. #define CYC_DBCC_F_NOEXP m68ki_cpu.cyc_dbcc_f_noexp
  305. #define CYC_DBCC_F_EXP m68ki_cpu.cyc_dbcc_f_exp
  306. #define CYC_SCC_R_TRUE m68ki_cpu.cyc_scc_r_true
  307. #define CYC_MOVEM_W m68ki_cpu.cyc_movem_w
  308. #define CYC_MOVEM_L m68ki_cpu.cyc_movem_l
  309. #define CYC_SHIFT m68ki_cpu.cyc_shift
  310. #define CYC_RESET m68ki_cpu.cyc_reset
  311. #define CALLBACK_INT_ACK m68ki_cpu.int_ack_callback
  312. #define CALLBACK_BKPT_ACK m68ki_cpu.bkpt_ack_callback
  313. #define CALLBACK_RESET_INSTR m68ki_cpu.reset_instr_callback
  314. #define CALLBACK_CMPILD_INSTR m68ki_cpu.cmpild_instr_callback
  315. #define CALLBACK_RTE_INSTR m68ki_cpu.rte_instr_callback
  316. #define CALLBACK_TAS_INSTR m68ki_cpu.tas_instr_callback
  317. #define CALLBACK_PC_CHANGED m68ki_cpu.pc_changed_callback
  318. #define CALLBACK_SET_FC m68ki_cpu.set_fc_callback
  319. #define CALLBACK_INSTR_HOOK m68ki_cpu.instr_hook_callback
  320. /* ----------------------------- Configuration ---------------------------- */
  321. /* These defines are dependant on the configuration defines in m68kconf.h */
  322. /* Disable certain comparisons if we're not using all CPU types */
  323. #if M68K_EMULATE_040
  324. #define CPU_TYPE_IS_040_PLUS(A) ((A) & CPU_TYPE_040)
  325. #define CPU_TYPE_IS_040_LESS(A) 1
  326. #else
  327. #define CPU_TYPE_IS_040_PLUS(A) 0
  328. #define CPU_TYPE_IS_040_LESS(A) 1
  329. #endif
  330. #if M68K_EMULATE_020
  331. #define CPU_TYPE_IS_020_PLUS(A) ((A) & (CPU_TYPE_020 | CPU_TYPE_040))
  332. #define CPU_TYPE_IS_020_LESS(A) 1
  333. #else
  334. #define CPU_TYPE_IS_020_PLUS(A) 0
  335. #define CPU_TYPE_IS_020_LESS(A) 1
  336. #endif
  337. #if M68K_EMULATE_EC020
  338. #define CPU_TYPE_IS_EC020_PLUS(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_040))
  339. #define CPU_TYPE_IS_EC020_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020))
  340. #else
  341. #define CPU_TYPE_IS_EC020_PLUS(A) CPU_TYPE_IS_020_PLUS(A)
  342. #define CPU_TYPE_IS_EC020_LESS(A) CPU_TYPE_IS_020_LESS(A)
  343. #endif
  344. #if M68K_EMULATE_010
  345. #define CPU_TYPE_IS_010(A) ((A) == CPU_TYPE_010)
  346. #define CPU_TYPE_IS_010_PLUS(A) ((A) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_040))
  347. #define CPU_TYPE_IS_010_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010))
  348. #else
  349. #define CPU_TYPE_IS_010(A) 0
  350. #define CPU_TYPE_IS_010_PLUS(A) CPU_TYPE_IS_EC020_PLUS(A)
  351. #define CPU_TYPE_IS_010_LESS(A) CPU_TYPE_IS_EC020_LESS(A)
  352. #endif
  353. #if M68K_EMULATE_020 || M68K_EMULATE_EC020
  354. #define CPU_TYPE_IS_020_VARIANT(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020))
  355. #else
  356. #define CPU_TYPE_IS_020_VARIANT(A) 0
  357. #endif
  358. #if M68K_EMULATE_040 || M68K_EMULATE_020 || M68K_EMULATE_EC020 || M68K_EMULATE_010
  359. #define CPU_TYPE_IS_000(A) ((A) == CPU_TYPE_000 || (A) == CPU_TYPE_008)
  360. #else
  361. #define CPU_TYPE_IS_000(A) 1
  362. #endif
  363. #if !M68K_SEPARATE_READS
  364. #define m68k_read_immediate_16(A) m68ki_read_program_16(A)
  365. #define m68k_read_immediate_32(A) m68ki_read_program_32(A)
  366. #define m68k_read_pcrelative_8(A) m68ki_read_program_8(A)
  367. #define m68k_read_pcrelative_16(A) m68ki_read_program_16(A)
  368. #define m68k_read_pcrelative_32(A) m68ki_read_program_32(A)
  369. #endif /* M68K_SEPARATE_READS */
  370. /* Enable or disable callback functions */
  371. #if M68K_EMULATE_INT_ACK
  372. #if M68K_EMULATE_INT_ACK == OPT_SPECIFY_HANDLER
  373. #define m68ki_int_ack(A) M68K_INT_ACK_CALLBACK(A)
  374. #else
  375. #define m68ki_int_ack(A) CALLBACK_INT_ACK(A)
  376. #endif
  377. #else
  378. /* Default action is to used autovector mode, which is most common */
  379. #define m68ki_int_ack(A) M68K_INT_ACK_AUTOVECTOR
  380. #endif /* M68K_EMULATE_INT_ACK */
  381. #if M68K_EMULATE_BKPT_ACK
  382. #if M68K_EMULATE_BKPT_ACK == OPT_SPECIFY_HANDLER
  383. #define m68ki_bkpt_ack(A) M68K_BKPT_ACK_CALLBACK(A)
  384. #else
  385. #define m68ki_bkpt_ack(A) CALLBACK_BKPT_ACK(A)
  386. #endif
  387. #else
  388. #define m68ki_bkpt_ack(A)
  389. #endif /* M68K_EMULATE_BKPT_ACK */
  390. #if M68K_EMULATE_RESET
  391. #if M68K_EMULATE_RESET == OPT_SPECIFY_HANDLER
  392. #define m68ki_output_reset() M68K_RESET_CALLBACK()
  393. #else
  394. #define m68ki_output_reset() CALLBACK_RESET_INSTR()
  395. #endif
  396. #else
  397. #define m68ki_output_reset()
  398. #endif /* M68K_EMULATE_RESET */
  399. #if M68K_CMPILD_HAS_CALLBACK
  400. #if M68K_CMPILD_HAS_CALLBACK == OPT_SPECIFY_HANDLER
  401. #define m68ki_cmpild_callback(v,r) M68K_CMPILD_CALLBACK(v,r)
  402. #else
  403. #define m68ki_cmpild_callback(v,r) CALLBACK_CMPILD_INSTR(v,r)
  404. #endif
  405. #else
  406. #define m68ki_cmpild_callback(v,r)
  407. #endif /* M68K_CMPILD_HAS_CALLBACK */
  408. #if M68K_RTE_HAS_CALLBACK
  409. #if M68K_RTE_HAS_CALLBACK == OPT_SPECIFY_HANDLER
  410. #define m68ki_rte_callback() M68K_RTE_CALLBACK()
  411. #else
  412. #define m68ki_rte_callback() CALLBACK_RTE_INSTR()
  413. #endif
  414. #else
  415. #define m68ki_rte_callback()
  416. #endif /* M68K_RTE_HAS_CALLBACK */
  417. #if M68K_TAS_HAS_CALLBACK
  418. #if M68K_TAS_HAS_CALLBACK == OPT_SPECIFY_HANDLER
  419. #define m68ki_tas_callback() M68K_TAS_CALLBACK()
  420. #else
  421. #define m68ki_tas_callback() CALLBACK_TAS_INSTR()
  422. #endif
  423. #else
  424. #define m68ki_tas_callback()
  425. #endif /* M68K_TAS_HAS_CALLBACK */
  426. #if M68K_INSTRUCTION_HOOK
  427. #if M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER
  428. #define m68ki_instr_hook() M68K_INSTRUCTION_CALLBACK()
  429. #else
  430. #define m68ki_instr_hook() CALLBACK_INSTR_HOOK()
  431. #endif
  432. #else
  433. #define m68ki_instr_hook()
  434. #endif /* M68K_INSTRUCTION_HOOK */
  435. #if M68K_MONITOR_PC
  436. #if M68K_MONITOR_PC == OPT_SPECIFY_HANDLER
  437. #define m68ki_pc_changed(A) M68K_SET_PC_CALLBACK(ADDRESS_68K(A))
  438. #else
  439. #define m68ki_pc_changed(A) CALLBACK_PC_CHANGED(ADDRESS_68K(A))
  440. #endif
  441. #else
  442. #define m68ki_pc_changed(A)
  443. #endif /* M68K_MONITOR_PC */
  444. /* Enable or disable function code emulation */
  445. #if M68K_EMULATE_FC
  446. #if M68K_EMULATE_FC == OPT_SPECIFY_HANDLER
  447. #define m68ki_set_fc(A) M68K_SET_FC_CALLBACK(A)
  448. #else
  449. #define m68ki_set_fc(A) CALLBACK_SET_FC(A)
  450. #endif
  451. #define m68ki_use_data_space() m68ki_address_space = FUNCTION_CODE_USER_DATA
  452. #define m68ki_use_program_space() m68ki_address_space = FUNCTION_CODE_USER_PROGRAM
  453. #define m68ki_get_address_space() m68ki_address_space
  454. #else
  455. #define m68ki_set_fc(A)
  456. #define m68ki_use_data_space()
  457. #define m68ki_use_program_space()
  458. #define m68ki_get_address_space() FUNCTION_CODE_USER_DATA
  459. #endif /* M68K_EMULATE_FC */
  460. /* Enable or disable trace emulation */
  461. #if M68K_EMULATE_TRACE
  462. /* Initiates trace checking before each instruction (t1) */
  463. #define m68ki_trace_t1() m68ki_tracing = FLAG_T1
  464. /* adds t0 to trace checking if we encounter change of flow */
  465. #define m68ki_trace_t0() m68ki_tracing |= FLAG_T0
  466. /* Clear all tracing */
  467. #define m68ki_clear_trace() m68ki_tracing = 0
  468. /* Cause a trace exception if we are tracing */
  469. #define m68ki_exception_if_trace() if(m68ki_tracing) m68ki_exception_trace()
  470. #else
  471. #define m68ki_trace_t1()
  472. #define m68ki_trace_t0()
  473. #define m68ki_clear_trace()
  474. #define m68ki_exception_if_trace()
  475. #endif /* M68K_EMULATE_TRACE */
  476. /* Address error */
  477. #if M68K_EMULATE_ADDRESS_ERROR
  478. #include <setjmp.h>
  479. extern jmp_buf m68ki_aerr_trap;
  480. #define m68ki_set_address_error_trap() \
  481. if(setjmp(m68ki_aerr_trap) != 0) \
  482. { \
  483. m68ki_exception_address_error(); \
  484. if(CPU_STOPPED) \
  485. { \
  486. SET_CYCLES(0); \
  487. CPU_INT_CYCLES = 0; \
  488. return m68ki_initial_cycles; \
  489. } \
  490. }
  491. #define m68ki_check_address_error(ADDR, WRITE_MODE, FC) \
  492. if((ADDR)&1) \
  493. { \
  494. m68ki_aerr_address = ADDR; \
  495. m68ki_aerr_write_mode = WRITE_MODE; \
  496. m68ki_aerr_fc = FC; \
  497. longjmp(m68ki_aerr_trap, 1); \
  498. }
  499. #define m68ki_check_address_error_010_less(ADDR, WRITE_MODE, FC) \
  500. if (CPU_TYPE_IS_010_LESS(CPU_TYPE)) \
  501. { \
  502. m68ki_check_address_error(ADDR, WRITE_MODE, FC) \
  503. }
  504. #else
  505. #define m68ki_set_address_error_trap()
  506. #define m68ki_check_address_error(ADDR, WRITE_MODE, FC)
  507. #define m68ki_check_address_error_010_less(ADDR, WRITE_MODE, FC)
  508. #endif /* M68K_ADDRESS_ERROR */
  509. /* Logging */
  510. #if M68K_LOG_ENABLE
  511. #include <stdio.h>
  512. extern FILE* M68K_LOG_FILEHANDLE
  513. extern char* m68ki_cpu_names[];
  514. #define M68K_DO_LOG(A) if(M68K_LOG_FILEHANDLE) fprintf A
  515. #if M68K_LOG_1010_1111
  516. #define M68K_DO_LOG_EMU(A) if(M68K_LOG_FILEHANDLE) fprintf A
  517. #else
  518. #define M68K_DO_LOG_EMU(A)
  519. #endif
  520. #else
  521. #define M68K_DO_LOG(A)
  522. #define M68K_DO_LOG_EMU(A)
  523. #endif
  524. /* -------------------------- EA / Operand Access ------------------------- */
  525. /*
  526. * The general instruction format follows this pattern:
  527. * .... XXX. .... .YYY
  528. * where XXX is register X and YYY is register Y
  529. */
  530. /* Data Register Isolation */
  531. #define DX (REG_D[(REG_IR >> 9) & 7])
  532. #define DY (REG_D[REG_IR & 7])
  533. /* Address Register Isolation */
  534. #define AX (REG_A[(REG_IR >> 9) & 7])
  535. #define AY (REG_A[REG_IR & 7])
  536. /* Effective Address Calculations */
  537. #define EA_AY_AI_8() AY /* address register indirect */
  538. #define EA_AY_AI_16() EA_AY_AI_8()
  539. #define EA_AY_AI_32() EA_AY_AI_8()
  540. #define EA_AY_PI_8() (AY++) /* postincrement (size = byte) */
  541. #define EA_AY_PI_16() ((AY+=2)-2) /* postincrement (size = word) */
  542. #define EA_AY_PI_32() ((AY+=4)-4) /* postincrement (size = long) */
  543. #define EA_AY_PD_8() (--AY) /* predecrement (size = byte) */
  544. #define EA_AY_PD_16() (AY-=2) /* predecrement (size = word) */
  545. #define EA_AY_PD_32() (AY-=4) /* predecrement (size = long) */
  546. #define EA_AY_DI_8() (AY+MAKE_INT_16(m68ki_read_imm_16())) /* displacement */
  547. #define EA_AY_DI_16() EA_AY_DI_8()
  548. #define EA_AY_DI_32() EA_AY_DI_8()
  549. #define EA_AY_IX_8() m68ki_get_ea_ix(AY) /* indirect + index */
  550. #define EA_AY_IX_16() EA_AY_IX_8()
  551. #define EA_AY_IX_32() EA_AY_IX_8()
  552. #define EA_AX_AI_8() AX
  553. #define EA_AX_AI_16() EA_AX_AI_8()
  554. #define EA_AX_AI_32() EA_AX_AI_8()
  555. #define EA_AX_PI_8() (AX++)
  556. #define EA_AX_PI_16() ((AX+=2)-2)
  557. #define EA_AX_PI_32() ((AX+=4)-4)
  558. #define EA_AX_PD_8() (--AX)
  559. #define EA_AX_PD_16() (AX-=2)
  560. #define EA_AX_PD_32() (AX-=4)
  561. #define EA_AX_DI_8() (AX+MAKE_INT_16(m68ki_read_imm_16()))
  562. #define EA_AX_DI_16() EA_AX_DI_8()
  563. #define EA_AX_DI_32() EA_AX_DI_8()
  564. #define EA_AX_IX_8() m68ki_get_ea_ix(AX)
  565. #define EA_AX_IX_16() EA_AX_IX_8()
  566. #define EA_AX_IX_32() EA_AX_IX_8()
  567. #define EA_A7_PI_8() ((REG_A[7]+=2)-2)
  568. #define EA_A7_PD_8() (REG_A[7]-=2)
  569. #define EA_AW_8() MAKE_INT_16(m68ki_read_imm_16()) /* absolute word */
  570. #define EA_AW_16() EA_AW_8()
  571. #define EA_AW_32() EA_AW_8()
  572. #define EA_AL_8() m68ki_read_imm_32() /* absolute long */
  573. #define EA_AL_16() EA_AL_8()
  574. #define EA_AL_32() EA_AL_8()
  575. #define EA_PCDI_8() m68ki_get_ea_pcdi() /* pc indirect + displacement */
  576. #define EA_PCDI_16() EA_PCDI_8()
  577. #define EA_PCDI_32() EA_PCDI_8()
  578. #define EA_PCIX_8() m68ki_get_ea_pcix() /* pc indirect + index */
  579. #define EA_PCIX_16() EA_PCIX_8()
  580. #define EA_PCIX_32() EA_PCIX_8()
  581. #define OPER_I_8() m68ki_read_imm_8()
  582. #define OPER_I_16() m68ki_read_imm_16()
  583. #define OPER_I_32() m68ki_read_imm_32()
  584. /* --------------------------- Status Register ---------------------------- */
  585. /* Flag Calculation Macros */
  586. #define CFLAG_8(A) (A)
  587. #define CFLAG_16(A) ((A)>>8)
  588. #if M68K_INT_GT_32_BIT
  589. #define CFLAG_ADD_32(S, D, R) ((R)>>24)
  590. #define CFLAG_SUB_32(S, D, R) ((R)>>24)
  591. #else
  592. #define CFLAG_ADD_32(S, D, R) (((S & D) | (~R & (S | D)))>>23)
  593. #define CFLAG_SUB_32(S, D, R) (((S & R) | (~D & (S | R)))>>23)
  594. #endif /* M68K_INT_GT_32_BIT */
  595. #define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R))
  596. #define VFLAG_ADD_16(S, D, R) (((S^R) & (D^R))>>8)
  597. #define VFLAG_ADD_32(S, D, R) (((S^R) & (D^R))>>24)
  598. #define VFLAG_SUB_8(S, D, R) ((S^D) & (R^D))
  599. #define VFLAG_SUB_16(S, D, R) (((S^D) & (R^D))>>8)
  600. #define VFLAG_SUB_32(S, D, R) (((S^D) & (R^D))>>24)
  601. #define NFLAG_8(A) (A)
  602. #define NFLAG_16(A) ((A)>>8)
  603. #define NFLAG_32(A) ((A)>>24)
  604. #define NFLAG_64(A) ((A)>>56)
  605. #define ZFLAG_8(A) MASK_OUT_ABOVE_8(A)
  606. #define ZFLAG_16(A) MASK_OUT_ABOVE_16(A)
  607. #define ZFLAG_32(A) MASK_OUT_ABOVE_32(A)
  608. /* Flag values */
  609. #define NFLAG_SET 0x80
  610. #define NFLAG_CLEAR 0
  611. #define CFLAG_SET 0x100
  612. #define CFLAG_CLEAR 0
  613. #define XFLAG_SET 0x100
  614. #define XFLAG_CLEAR 0
  615. #define VFLAG_SET 0x80
  616. #define VFLAG_CLEAR 0
  617. #define ZFLAG_SET 0
  618. #define ZFLAG_CLEAR 0xffffffff
  619. #define SFLAG_SET 4
  620. #define SFLAG_CLEAR 0
  621. #define MFLAG_SET 2
  622. #define MFLAG_CLEAR 0
  623. /* Turn flag values into 1 or 0 */
  624. #define XFLAG_AS_1() ((FLAG_X>>8)&1)
  625. #define NFLAG_AS_1() ((FLAG_N>>7)&1)
  626. #define VFLAG_AS_1() ((FLAG_V>>7)&1)
  627. #define ZFLAG_AS_1() (!FLAG_Z)
  628. #define CFLAG_AS_1() ((FLAG_C>>8)&1)
  629. /* Conditions */
  630. #define COND_CS() (FLAG_C&0x100)
  631. #define COND_CC() (!COND_CS())
  632. #define COND_VS() (FLAG_V&0x80)
  633. #define COND_VC() (!COND_VS())
  634. #define COND_NE() FLAG_Z
  635. #define COND_EQ() (!COND_NE())
  636. #define COND_MI() (FLAG_N&0x80)
  637. #define COND_PL() (!COND_MI())
  638. #define COND_LT() ((FLAG_N^FLAG_V)&0x80)
  639. #define COND_GE() (!COND_LT())
  640. #define COND_HI() (COND_CC() && COND_NE())
  641. #define COND_LS() (COND_CS() || COND_EQ())
  642. #define COND_GT() (COND_GE() && COND_NE())
  643. #define COND_LE() (COND_LT() || COND_EQ())
  644. /* Reversed conditions */
  645. #define COND_NOT_CS() COND_CC()
  646. #define COND_NOT_CC() COND_CS()
  647. #define COND_NOT_VS() COND_VC()
  648. #define COND_NOT_VC() COND_VS()
  649. #define COND_NOT_NE() COND_EQ()
  650. #define COND_NOT_EQ() COND_NE()
  651. #define COND_NOT_MI() COND_PL()
  652. #define COND_NOT_PL() COND_MI()
  653. #define COND_NOT_LT() COND_GE()
  654. #define COND_NOT_GE() COND_LT()
  655. #define COND_NOT_HI() COND_LS()
  656. #define COND_NOT_LS() COND_HI()
  657. #define COND_NOT_GT() COND_LE()
  658. #define COND_NOT_LE() COND_GT()
  659. /* Not real conditions, but here for convenience */
  660. #define COND_XS() (FLAG_X&0x100)
  661. #define COND_XC() (!COND_XS)
  662. /* Get the condition code register */
  663. #define m68ki_get_ccr() ((COND_XS() >> 4) | \
  664. (COND_MI() >> 4) | \
  665. (COND_EQ() << 2) | \
  666. (COND_VS() >> 6) | \
  667. (COND_CS() >> 8))
  668. /* Get the status register */
  669. #define m68ki_get_sr() ( FLAG_T1 | \
  670. FLAG_T0 | \
  671. (FLAG_S << 11) | \
  672. (FLAG_M << 11) | \
  673. FLAG_INT_MASK | \
  674. m68ki_get_ccr())
  675. /* ---------------------------- Cycle Counting ---------------------------- */
  676. #define ADD_CYCLES(A) m68ki_remaining_cycles += (A)
  677. #define USE_CYCLES(A) m68ki_remaining_cycles -= (A)
  678. #define SET_CYCLES(A) m68ki_remaining_cycles = A
  679. #define GET_CYCLES() m68ki_remaining_cycles
  680. #define USE_ALL_CYCLES() m68ki_remaining_cycles = 0
  681. /* ----------------------------- Read / Write ----------------------------- */
  682. /* Read from the current address space */
  683. #define m68ki_read_8(A) m68ki_read_8_fc (A, FLAG_S | m68ki_get_address_space())
  684. #define m68ki_read_16(A) m68ki_read_16_fc(A, FLAG_S | m68ki_get_address_space())
  685. #define m68ki_read_32(A) m68ki_read_32_fc(A, FLAG_S | m68ki_get_address_space())
  686. /* Write to the current data space */
  687. #define m68ki_write_8(A, V) m68ki_write_8_fc (A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
  688. #define m68ki_write_16(A, V) m68ki_write_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
  689. #define m68ki_write_32(A, V) m68ki_write_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
  690. #if M68K_SIMULATE_PD_WRITES
  691. #define m68ki_write_32_pd(A, V) m68ki_write_32_pd_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
  692. #else
  693. #define m68ki_write_32_pd(A, V) m68ki_write_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
  694. #endif
  695. /* map read immediate 8 to read immediate 16 */
  696. #define m68ki_read_imm_8() MASK_OUT_ABOVE_8(m68ki_read_imm_16())
  697. /* Map PC-relative reads */
  698. #define m68ki_read_pcrel_8(A) m68k_read_pcrelative_8(A)
  699. #define m68ki_read_pcrel_16(A) m68k_read_pcrelative_16(A)
  700. #define m68ki_read_pcrel_32(A) m68k_read_pcrelative_32(A)
  701. /* Read from the program space */
  702. #define m68ki_read_program_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
  703. #define m68ki_read_program_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
  704. #define m68ki_read_program_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
  705. /* Read from the data space */
  706. #define m68ki_read_data_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
  707. #define m68ki_read_data_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
  708. #define m68ki_read_data_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
  709. /* ======================================================================== */
  710. /* =============================== PROTOTYPES ============================= */
  711. /* ======================================================================== */
  712. typedef union
  713. {
  714. UINT64 i;
  715. double f;
  716. } fp_reg;
  717. typedef struct
  718. {
  719. uint cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, or 68020 */
  720. uint dar[16]; /* Data and Address Registers */
  721. uint ppc; /* Previous program counter */
  722. uint pc; /* Program Counter */
  723. uint sp[7]; /* User, Interrupt, and Master Stack Pointers */
  724. uint vbr; /* Vector Base Register (m68010+) */
  725. uint sfc; /* Source Function Code Register (m68010+) */
  726. uint dfc; /* Destination Function Code Register (m68010+) */
  727. uint cacr; /* Cache Control Register (m68020, unemulated) */
  728. uint caar; /* Cache Address Register (m68020, unemulated) */
  729. uint ir; /* Instruction Register */
  730. fp_reg fpr[8]; /* FPU Data Register (m68040) */
  731. uint fpiar; /* FPU Instruction Address Register (m68040) */
  732. uint fpsr; /* FPU Status Register (m68040) */
  733. uint fpcr; /* FPU Control Register (m68040) */
  734. uint t1_flag; /* Trace 1 */
  735. uint t0_flag; /* Trace 0 */
  736. uint s_flag; /* Supervisor */
  737. uint m_flag; /* Master/Interrupt state */
  738. uint x_flag; /* Extend */
  739. uint n_flag; /* Negative */
  740. uint not_z_flag; /* Zero, inverted for speedups */
  741. uint v_flag; /* Overflow */
  742. uint c_flag; /* Carry */
  743. uint int_mask; /* I0-I2 */
  744. uint int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
  745. uint int_cycles; /* ASG: extra cycles from generated interrupts */
  746. uint stopped; /* Stopped state */
  747. uint pref_addr; /* Last prefetch address */
  748. uint pref_data; /* Data in the prefetch queue */
  749. uint address_mask; /* Available address pins */
  750. uint sr_mask; /* Implemented status register bits */
  751. uint instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
  752. uint run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
  753. /* Clocks required for instructions / exceptions */
  754. uint cyc_bcc_notake_b;
  755. uint cyc_bcc_notake_w;
  756. uint cyc_dbcc_f_noexp;
  757. uint cyc_dbcc_f_exp;
  758. uint cyc_scc_r_true;
  759. uint cyc_movem_w;
  760. uint cyc_movem_l;
  761. uint cyc_shift;
  762. uint cyc_reset;
  763. uint8* cyc_instruction;
  764. uint8* cyc_exception;
  765. /* Callbacks to host */
  766. int (*int_ack_callback)(int int_line); /* Interrupt Acknowledge */
  767. void (*bkpt_ack_callback)(unsigned int data); /* Breakpoint Acknowledge */
  768. void (*reset_instr_callback)(void); /* Called when a RESET instruction is encountered */
  769. void (*cmpild_instr_callback)(unsigned int, int); /* Called when a CMPI.L #v, Dn instruction is encountered */
  770. void (*rte_instr_callback)(void); /* Called when a RTE instruction is encountered */
  771. int (*tas_instr_callback)(void); /* Called when a TAS instruction is encountered, allows / disallows writeback */
  772. void (*pc_changed_callback)(unsigned int new_pc); /* Called when the PC changes by a large amount */
  773. void (*set_fc_callback)(unsigned int new_fc); /* Called when the CPU function code changes */
  774. void (*instr_hook_callback)(void); /* Called every instruction cycle prior to execution */
  775. // notaz
  776. sint cyc_remaining_cycles;
  777. sint not_polling;
  778. } m68ki_cpu_core;
  779. // notaz
  780. extern m68ki_cpu_core *m68ki_cpu_p;
  781. #define m68ki_cpu (*m68ki_cpu_p)
  782. #define m68ki_remaining_cycles m68ki_cpu_p->cyc_remaining_cycles
  783. //extern m68ki_cpu_core m68ki_cpu;
  784. //extern sint m68ki_remaining_cycles;
  785. extern uint m68ki_tracing;
  786. extern uint8 m68ki_shift_8_table[];
  787. extern uint16 m68ki_shift_16_table[];
  788. extern uint m68ki_shift_32_table[];
  789. extern uint8 m68ki_exception_cycle_table[][256];
  790. extern uint m68ki_address_space;
  791. extern uint8 m68ki_ea_idx_cycle_table[];
  792. extern uint m68ki_aerr_address;
  793. extern uint m68ki_aerr_write_mode;
  794. extern uint m68ki_aerr_fc;
  795. /* Read data immediately after the program counter */
  796. INLINE uint m68ki_read_imm_16(void);
  797. INLINE uint m68ki_read_imm_32(void);
  798. /* Read data with specific function code */
  799. INLINE uint m68ki_read_8_fc (uint address, uint fc);
  800. INLINE uint m68ki_read_16_fc (uint address, uint fc);
  801. INLINE uint m68ki_read_32_fc (uint address, uint fc);
  802. /* Write data with specific function code */
  803. INLINE void m68ki_write_8_fc (uint address, uint fc, uint value);
  804. INLINE void m68ki_write_16_fc(uint address, uint fc, uint value);
  805. INLINE void m68ki_write_32_fc(uint address, uint fc, uint value);
  806. #if M68K_SIMULATE_PD_WRITES
  807. INLINE void m68ki_write_32_pd_fc(uint address, uint fc, uint value);
  808. #endif /* M68K_SIMULATE_PD_WRITES */
  809. /* Indexed and PC-relative ea fetching */
  810. INLINE uint m68ki_get_ea_pcdi(void);
  811. INLINE uint m68ki_get_ea_pcix(void);
  812. INLINE uint m68ki_get_ea_ix(uint An);
  813. /* Operand fetching */
  814. INLINE uint OPER_AY_AI_8(void);
  815. INLINE uint OPER_AY_AI_16(void);
  816. INLINE uint OPER_AY_AI_32(void);
  817. INLINE uint OPER_AY_PI_8(void);
  818. INLINE uint OPER_AY_PI_16(void);
  819. INLINE uint OPER_AY_PI_32(void);
  820. INLINE uint OPER_AY_PD_8(void);
  821. INLINE uint OPER_AY_PD_16(void);
  822. INLINE uint OPER_AY_PD_32(void);
  823. INLINE uint OPER_AY_DI_8(void);
  824. INLINE uint OPER_AY_DI_16(void);
  825. INLINE uint OPER_AY_DI_32(void);
  826. INLINE uint OPER_AY_IX_8(void);
  827. INLINE uint OPER_AY_IX_16(void);
  828. INLINE uint OPER_AY_IX_32(void);
  829. INLINE uint OPER_AX_AI_8(void);
  830. INLINE uint OPER_AX_AI_16(void);
  831. INLINE uint OPER_AX_AI_32(void);
  832. INLINE uint OPER_AX_PI_8(void);
  833. INLINE uint OPER_AX_PI_16(void);
  834. INLINE uint OPER_AX_PI_32(void);
  835. INLINE uint OPER_AX_PD_8(void);
  836. INLINE uint OPER_AX_PD_16(void);
  837. INLINE uint OPER_AX_PD_32(void);
  838. INLINE uint OPER_AX_DI_8(void);
  839. INLINE uint OPER_AX_DI_16(void);
  840. INLINE uint OPER_AX_DI_32(void);
  841. INLINE uint OPER_AX_IX_8(void);
  842. INLINE uint OPER_AX_IX_16(void);
  843. INLINE uint OPER_AX_IX_32(void);
  844. INLINE uint OPER_A7_PI_8(void);
  845. INLINE uint OPER_A7_PD_8(void);
  846. INLINE uint OPER_AW_8(void);
  847. INLINE uint OPER_AW_16(void);
  848. INLINE uint OPER_AW_32(void);
  849. INLINE uint OPER_AL_8(void);
  850. INLINE uint OPER_AL_16(void);
  851. INLINE uint OPER_AL_32(void);
  852. INLINE uint OPER_PCDI_8(void);
  853. INLINE uint OPER_PCDI_16(void);
  854. INLINE uint OPER_PCDI_32(void);
  855. INLINE uint OPER_PCIX_8(void);
  856. INLINE uint OPER_PCIX_16(void);
  857. INLINE uint OPER_PCIX_32(void);
  858. /* Stack operations */
  859. INLINE void m68ki_push_16(uint value);
  860. INLINE void m68ki_push_32(uint value);
  861. INLINE uint m68ki_pull_16(void);
  862. INLINE uint m68ki_pull_32(void);
  863. /* Program flow operations */
  864. INLINE void m68ki_jump(uint new_pc);
  865. INLINE void m68ki_jump_vector(uint vector);
  866. INLINE void m68ki_branch_8(uint offset);
  867. INLINE void m68ki_branch_16(uint offset);
  868. INLINE void m68ki_branch_32(uint offset);
  869. /* Status register operations. */
  870. INLINE void m68ki_set_s_flag(uint value); /* Only bit 2 of value should be set (i.e. 4 or 0) */
  871. INLINE void m68ki_set_sm_flag(uint value); /* only bits 1 and 2 of value should be set */
  872. INLINE void m68ki_set_ccr(uint value); /* set the condition code register */
  873. INLINE void m68ki_set_sr(uint value); /* set the status register */
  874. INLINE void m68ki_set_sr_noint(uint value); /* set the status register */
  875. /* Exception processing */
  876. INLINE uint m68ki_init_exception(void); /* Initial exception processing */
  877. INLINE void m68ki_stack_frame_3word(uint pc, uint sr); /* Stack various frame types */
  878. INLINE void m68ki_stack_frame_buserr(uint sr);
  879. INLINE void m68ki_stack_frame_0000(uint pc, uint sr, uint vector);
  880. INLINE void m68ki_stack_frame_0001(uint pc, uint sr, uint vector);
  881. INLINE void m68ki_stack_frame_0010(uint sr, uint vector);
  882. INLINE void m68ki_stack_frame_1000(uint pc, uint sr, uint vector);
  883. INLINE void m68ki_stack_frame_1010(uint sr, uint vector, uint pc);
  884. INLINE void m68ki_stack_frame_1011(uint sr, uint vector, uint pc);
  885. INLINE void m68ki_exception_trap(uint vector);
  886. INLINE void m68ki_exception_trapN(uint vector);
  887. INLINE void m68ki_exception_trace(void);
  888. INLINE void m68ki_exception_privilege_violation(void);
  889. INLINE void m68ki_exception_1010(void);
  890. INLINE void m68ki_exception_1111(void);
  891. INLINE void m68ki_exception_illegal(void);
  892. INLINE void m68ki_exception_format_error(void);
  893. INLINE void m68ki_exception_address_error(void);
  894. INLINE void m68ki_exception_interrupt(uint int_level);
  895. INLINE void m68ki_check_interrupts(void); /* ASG: check for interrupts */
  896. /* quick disassembly (used for logging) */
  897. char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type);
  898. /* ======================================================================== */
  899. /* =========================== UTILITY FUNCTIONS ========================== */
  900. /* ======================================================================== */
  901. /* ---------------------------- Read Immediate ---------------------------- */
  902. /* Handles all immediate reads, does address error check, function code setting,
  903. * and prefetching if they are enabled in m68kconf.h
  904. */
  905. INLINE uint m68ki_read_imm_16(void)
  906. {
  907. m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
  908. m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
  909. #if M68K_EMULATE_PREFETCH
  910. if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
  911. {
  912. CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
  913. CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
  914. }
  915. REG_PC += 2;
  916. return MASK_OUT_ABOVE_16(CPU_PREF_DATA >> ((2-((REG_PC-2)&2))<<3));
  917. #else
  918. REG_PC += 2;
  919. return m68k_read_immediate_16(ADDRESS_68K(REG_PC-2));
  920. #endif /* M68K_EMULATE_PREFETCH */
  921. }
  922. INLINE uint m68ki_read_imm_32(void)
  923. {
  924. #if M68K_EMULATE_PREFETCH
  925. uint temp_val;
  926. m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
  927. m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
  928. if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
  929. {
  930. CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
  931. CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
  932. }
  933. temp_val = CPU_PREF_DATA;
  934. REG_PC += 2;
  935. if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
  936. {
  937. CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
  938. CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
  939. temp_val = MASK_OUT_ABOVE_32((temp_val << 16) | (CPU_PREF_DATA >> 16));
  940. }
  941. REG_PC += 2;
  942. return temp_val;
  943. #else
  944. m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
  945. m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
  946. REG_PC += 4;
  947. return m68k_read_immediate_32(ADDRESS_68K(REG_PC-4));
  948. #endif /* M68K_EMULATE_PREFETCH */
  949. }
  950. /* ------------------------- Top level read/write ------------------------- */
  951. /* Handles all memory accesses (except for immediate reads if they are
  952. * configured to use separate functions in m68kconf.h).
  953. * All memory accesses must go through these top level functions.
  954. * These functions will also check for address error and set the function
  955. * code if they are enabled in m68kconf.h.
  956. */
  957. INLINE uint m68ki_read_8_fc(uint address, uint fc)
  958. {
  959. m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
  960. return m68k_read_memory_8(ADDRESS_68K(address));
  961. }
  962. INLINE uint m68ki_read_16_fc(uint address, uint fc)
  963. {
  964. m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
  965. m68ki_check_address_error_010_less(address, MODE_READ, fc); /* auto-disable (see m68kcpu.h) */
  966. return m68k_read_memory_16(ADDRESS_68K(address));
  967. }
  968. INLINE uint m68ki_read_32_fc(uint address, uint fc)
  969. {
  970. m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
  971. m68ki_check_address_error_010_less(address, MODE_READ, fc); /* auto-disable (see m68kcpu.h) */
  972. return m68k_read_memory_32(ADDRESS_68K(address));
  973. }
  974. INLINE void m68ki_write_8_fc(uint address, uint fc, uint value)
  975. {
  976. m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
  977. m68k_write_memory_8(ADDRESS_68K(address), value);
  978. }
  979. INLINE void m68ki_write_16_fc(uint address, uint fc, uint value)
  980. {
  981. m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
  982. m68ki_check_address_error_010_less(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
  983. m68k_write_memory_16(ADDRESS_68K(address), value);
  984. }
  985. INLINE void m68ki_write_32_fc(uint address, uint fc, uint value)
  986. {
  987. m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
  988. m68ki_check_address_error_010_less(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
  989. m68k_write_memory_32(ADDRESS_68K(address), value);
  990. }
  991. #if M68K_SIMULATE_PD_WRITES
  992. INLINE void m68ki_write_32_pd_fc(uint address, uint fc, uint value)
  993. {
  994. m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
  995. m68ki_check_address_error_010_less(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
  996. m68k_write_memory_32_pd(ADDRESS_68K(address), value);
  997. }
  998. #endif
  999. /* --------------------- Effective Address Calculation -------------------- */
  1000. /* The program counter relative addressing modes cause operands to be
  1001. * retrieved from program space, not data space.
  1002. */
  1003. INLINE uint m68ki_get_ea_pcdi(void)
  1004. {
  1005. uint old_pc = REG_PC;
  1006. m68ki_use_program_space(); /* auto-disable */
  1007. return old_pc + MAKE_INT_16(m68ki_read_imm_16());
  1008. }
  1009. INLINE uint m68ki_get_ea_pcix(void)
  1010. {
  1011. m68ki_use_program_space(); /* auto-disable */
  1012. return m68ki_get_ea_ix(REG_PC);
  1013. }
  1014. /* Indexed addressing modes are encoded as follows:
  1015. *
  1016. * Base instruction format:
  1017. * F E D C B A 9 8 7 6 | 5 4 3 | 2 1 0
  1018. * x x x x x x x x x x | 1 1 0 | BASE REGISTER (An)
  1019. *
  1020. * Base instruction format for destination EA in move instructions:
  1021. * F E D C | B A 9 | 8 7 6 | 5 4 3 2 1 0
  1022. * x x x x | BASE REG | 1 1 0 | X X X X X X (An)
  1023. *
  1024. * Brief extension format:
  1025. * F | E D C | B | A 9 | 8 | 7 6 5 4 3 2 1 0
  1026. * D/A | REGISTER | W/L | SCALE | 0 | DISPLACEMENT
  1027. *
  1028. * Full extension format:
  1029. * F E D C B A 9 8 7 6 5 4 3 2 1 0
  1030. * D/A | REGISTER | W/L | SCALE | 1 | BS | IS | BD SIZE | 0 | I/IS
  1031. * BASE DISPLACEMENT (0, 16, 32 bit) (bd)
  1032. * OUTER DISPLACEMENT (0, 16, 32 bit) (od)
  1033. *
  1034. * D/A: 0 = Dn, 1 = An (Xn)
  1035. * W/L: 0 = W (sign extend), 1 = L (.SIZE)
  1036. * SCALE: 00=1, 01=2, 10=4, 11=8 (*SCALE)
  1037. * BS: 0=add base reg, 1=suppress base reg (An suppressed)
  1038. * IS: 0=add index, 1=suppress index (Xn suppressed)
  1039. * BD SIZE: 00=reserved, 01=NULL, 10=Word, 11=Long (size of bd)
  1040. *
  1041. * IS I/IS Operation
  1042. * 0 000 No Memory Indirect
  1043. * 0 001 indir prex with null outer
  1044. * 0 010 indir prex with word outer
  1045. * 0 011 indir prex with long outer
  1046. * 0 100 reserved
  1047. * 0 101 indir postx with null outer
  1048. * 0 110 indir postx with word outer
  1049. * 0 111 indir postx with long outer
  1050. * 1 000 no memory indirect
  1051. * 1 001 mem indir with null outer
  1052. * 1 010 mem indir with word outer
  1053. * 1 011 mem indir with long outer
  1054. * 1 100-111 reserved
  1055. */
  1056. INLINE uint m68ki_get_ea_ix(uint An)
  1057. {
  1058. /* An = base register */
  1059. uint extension = m68ki_read_imm_16();
  1060. uint Xn = 0; /* Index register */
  1061. uint bd = 0; /* Base Displacement */
  1062. uint od = 0; /* Outer Displacement */
  1063. if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
  1064. {
  1065. /* Calculate index */
  1066. Xn = REG_DA[extension>>12]; /* Xn */
  1067. if(!BIT_B(extension)) /* W/L */
  1068. Xn = MAKE_INT_16(Xn);
  1069. /* Add base register and displacement and return */
  1070. return An + Xn + MAKE_INT_8(extension);
  1071. }
  1072. /* Brief extension format */
  1073. if(!BIT_8(extension))
  1074. {
  1075. /* Calculate index */
  1076. Xn = REG_DA[extension>>12]; /* Xn */
  1077. if(!BIT_B(extension)) /* W/L */
  1078. Xn = MAKE_INT_16(Xn);
  1079. /* Add scale if proper CPU type */
  1080. if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
  1081. Xn <<= (extension>>9) & 3; /* SCALE */
  1082. /* Add base register and displacement and return */
  1083. return An + Xn + MAKE_INT_8(extension);
  1084. }
  1085. /* Full extension format */
  1086. USE_CYCLES(m68ki_ea_idx_cycle_table[extension&0x3f]);
  1087. /* Check if base register is present */
  1088. if(BIT_7(extension)) /* BS */
  1089. An = 0; /* An */
  1090. /* Check if index is present */
  1091. if(!BIT_6(extension)) /* IS */
  1092. {
  1093. Xn = REG_DA[extension>>12]; /* Xn */
  1094. if(!BIT_B(extension)) /* W/L */
  1095. Xn = MAKE_INT_16(Xn);
  1096. Xn <<= (extension>>9) & 3; /* SCALE */
  1097. }
  1098. /* Check if base displacement is present */
  1099. if(BIT_5(extension)) /* BD SIZE */
  1100. bd = BIT_4(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16());
  1101. /* If no indirect action, we are done */
  1102. if(!(extension&7)) /* No Memory Indirect */
  1103. return An + bd + Xn;
  1104. /* Check if outer displacement is present */
  1105. if(BIT_1(extension)) /* I/IS: od */
  1106. od = BIT_0(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16());
  1107. /* Postindex */
  1108. if(BIT_2(extension)) /* I/IS: 0 = preindex, 1 = postindex */
  1109. return m68ki_read_32(An + bd) + Xn + od;
  1110. /* Preindex */
  1111. return m68ki_read_32(An + bd + Xn) + od;
  1112. }
  1113. /* Fetch operands */
  1114. INLINE uint OPER_AY_AI_8(void) {uint ea = EA_AY_AI_8(); return m68ki_read_8(ea); }
  1115. INLINE uint OPER_AY_AI_16(void) {uint ea = EA_AY_AI_16(); return m68ki_read_16(ea);}
  1116. INLINE uint OPER_AY_AI_32(void) {uint ea = EA_AY_AI_32(); return m68ki_read_32(ea);}
  1117. INLINE uint OPER_AY_PI_8(void) {uint ea = EA_AY_PI_8(); return m68ki_read_8(ea); }
  1118. INLINE uint OPER_AY_PI_16(void) {uint ea = EA_AY_PI_16(); return m68ki_read_16(ea);}
  1119. INLINE uint OPER_AY_PI_32(void) {uint ea = EA_AY_PI_32(); return m68ki_read_32(ea);}
  1120. INLINE uint OPER_AY_PD_8(void) {uint ea = EA_AY_PD_8(); return m68ki_read_8(ea); }
  1121. INLINE uint OPER_AY_PD_16(void) {uint ea = EA_AY_PD_16(); return m68ki_read_16(ea);}
  1122. INLINE uint OPER_AY_PD_32(void) {uint ea = EA_AY_PD_32(); return m68ki_read_32(ea);}
  1123. INLINE uint OPER_AY_DI_8(void) {uint ea = EA_AY_DI_8(); return m68ki_read_8(ea); }
  1124. INLINE uint OPER_AY_DI_16(void) {uint ea = EA_AY_DI_16(); return m68ki_read_16(ea);}
  1125. INLINE uint OPER_AY_DI_32(void) {uint ea = EA_AY_DI_32(); return m68ki_read_32(ea);}
  1126. INLINE uint OPER_AY_IX_8(void) {uint ea = EA_AY_IX_8(); return m68ki_read_8(ea); }
  1127. INLINE uint OPER_AY_IX_16(void) {uint ea = EA_AY_IX_16(); return m68ki_read_16(ea);}
  1128. INLINE uint OPER_AY_IX_32(void) {uint ea = EA_AY_IX_32(); return m68ki_read_32(ea);}
  1129. INLINE uint OPER_AX_AI_8(void) {uint ea = EA_AX_AI_8(); return m68ki_read_8(ea); }
  1130. INLINE uint OPER_AX_AI_16(void) {uint ea = EA_AX_AI_16(); return m68ki_read_16(ea);}
  1131. INLINE uint OPER_AX_AI_32(void) {uint ea = EA_AX_AI_32(); return m68ki_read_32(ea);}
  1132. INLINE uint OPER_AX_PI_8(void) {uint ea = EA_AX_PI_8(); return m68ki_read_8(ea); }
  1133. INLINE uint OPER_AX_PI_16(void) {uint ea = EA_AX_PI_16(); return m68ki_read_16(ea);}
  1134. INLINE uint OPER_AX_PI_32(void) {uint ea = EA_AX_PI_32(); return m68ki_read_32(ea);}
  1135. INLINE uint OPER_AX_PD_8(void) {uint ea = EA_AX_PD_8(); return m68ki_read_8(ea); }
  1136. INLINE uint OPER_AX_PD_16(void) {uint ea = EA_AX_PD_16(); return m68ki_read_16(ea);}
  1137. INLINE uint OPER_AX_PD_32(void) {uint ea = EA_AX_PD_32(); return m68ki_read_32(ea);}
  1138. INLINE uint OPER_AX_DI_8(void) {uint ea = EA_AX_DI_8(); return m68ki_read_8(ea); }
  1139. INLINE uint OPER_AX_DI_16(void) {uint ea = EA_AX_DI_16(); return m68ki_read_16(ea);}
  1140. INLINE uint OPER_AX_DI_32(void) {uint ea = EA_AX_DI_32(); return m68ki_read_32(ea);}
  1141. INLINE uint OPER_AX_IX_8(void) {uint ea = EA_AX_IX_8(); return m68ki_read_8(ea); }
  1142. INLINE uint OPER_AX_IX_16(void) {uint ea = EA_AX_IX_16(); return m68ki_read_16(ea);}
  1143. INLINE uint OPER_AX_IX_32(void) {uint ea = EA_AX_IX_32(); return m68ki_read_32(ea);}
  1144. INLINE uint OPER_A7_PI_8(void) {uint ea = EA_A7_PI_8(); return m68ki_read_8(ea); }
  1145. INLINE uint OPER_A7_PD_8(void) {uint ea = EA_A7_PD_8(); return m68ki_read_8(ea); }
  1146. INLINE uint OPER_AW_8(void) {uint ea = EA_AW_8(); return m68ki_read_8(ea); }
  1147. INLINE uint OPER_AW_16(void) {uint ea = EA_AW_16(); return m68ki_read_16(ea);}
  1148. INLINE uint OPER_AW_32(void) {uint ea = EA_AW_32(); return m68ki_read_32(ea);}
  1149. INLINE uint OPER_AL_8(void) {uint ea = EA_AL_8(); return m68ki_read_8(ea); }
  1150. INLINE uint OPER_AL_16(void) {uint ea = EA_AL_16(); return m68ki_read_16(ea);}
  1151. INLINE uint OPER_AL_32(void) {uint ea = EA_AL_32(); return m68ki_read_32(ea);}
  1152. INLINE uint OPER_PCDI_8(void) {uint ea = EA_PCDI_8(); return m68ki_read_pcrel_8(ea); }
  1153. INLINE uint OPER_PCDI_16(void) {uint ea = EA_PCDI_16(); return m68ki_read_pcrel_16(ea);}
  1154. INLINE uint OPER_PCDI_32(void) {uint ea = EA_PCDI_32(); return m68ki_read_pcrel_32(ea);}
  1155. INLINE uint OPER_PCIX_8(void) {uint ea = EA_PCIX_8(); return m68ki_read_pcrel_8(ea); }
  1156. INLINE uint OPER_PCIX_16(void) {uint ea = EA_PCIX_16(); return m68ki_read_pcrel_16(ea);}
  1157. INLINE uint OPER_PCIX_32(void) {uint ea = EA_PCIX_32(); return m68ki_read_pcrel_32(ea);}
  1158. /* ---------------------------- Stack Functions --------------------------- */
  1159. /* Push/pull data from the stack */
  1160. INLINE void m68ki_push_16(uint value)
  1161. {
  1162. REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
  1163. m68ki_write_16(REG_SP, value);
  1164. }
  1165. INLINE void m68ki_push_32(uint value)
  1166. {
  1167. REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
  1168. m68ki_write_32(REG_SP, value);
  1169. }
  1170. INLINE uint m68ki_pull_16(void)
  1171. {
  1172. REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
  1173. return m68ki_read_16(REG_SP-2);
  1174. }
  1175. INLINE uint m68ki_pull_32(void)
  1176. {
  1177. REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
  1178. return m68ki_read_32(REG_SP-4);
  1179. }
  1180. /* Increment/decrement the stack as if doing a push/pull but
  1181. * don't do any memory access.
  1182. */
  1183. INLINE void m68ki_fake_push_16(void)
  1184. {
  1185. REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
  1186. }
  1187. INLINE void m68ki_fake_push_32(void)
  1188. {
  1189. REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
  1190. }
  1191. INLINE void m68ki_fake_pull_16(void)
  1192. {
  1193. REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
  1194. }
  1195. INLINE void m68ki_fake_pull_32(void)
  1196. {
  1197. REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
  1198. }
  1199. /* ----------------------------- Program Flow ----------------------------- */
  1200. /* Jump to a new program location or vector.
  1201. * These functions will also call the pc_changed callback if it was enabled
  1202. * in m68kconf.h.
  1203. */
  1204. INLINE void m68ki_jump(uint new_pc)
  1205. {
  1206. REG_PC = new_pc;
  1207. m68ki_pc_changed(REG_PC);
  1208. }
  1209. INLINE void m68ki_jump_vector(uint vector)
  1210. {
  1211. REG_PC = (vector<<2) + REG_VBR;
  1212. REG_PC = m68ki_read_data_32(REG_PC);
  1213. m68ki_pc_changed(REG_PC);
  1214. }
  1215. /* Branch to a new memory location.
  1216. * The 32-bit branch will call pc_changed if it was enabled in m68kconf.h.
  1217. * So far I've found no problems with not calling pc_changed for 8 or 16
  1218. * bit branches.
  1219. */
  1220. INLINE void m68ki_branch_8(uint offset)
  1221. {
  1222. REG_PC += MAKE_INT_8(offset);
  1223. }
  1224. INLINE void m68ki_branch_16(uint offset)
  1225. {
  1226. REG_PC += MAKE_INT_16(offset);
  1227. }
  1228. INLINE void m68ki_branch_32(uint offset)
  1229. {
  1230. REG_PC += offset;
  1231. m68ki_pc_changed(REG_PC);
  1232. }
  1233. /* ---------------------------- Status Register --------------------------- */
  1234. /* Set the S flag and change the active stack pointer.
  1235. * Note that value MUST be 4 or 0.
  1236. */
  1237. INLINE void m68ki_set_s_flag(uint value)
  1238. {
  1239. /* Backup the old stack pointer */
  1240. REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
  1241. /* Set the S flag */
  1242. FLAG_S = value;
  1243. /* Set the new stack pointer */
  1244. REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
  1245. }
  1246. /* Set the S and M flags and change the active stack pointer.
  1247. * Note that value MUST be 0, 2, 4, or 6 (bit2 = S, bit1 = M).
  1248. */
  1249. INLINE void m68ki_set_sm_flag(uint value)
  1250. {
  1251. /* Backup the old stack pointer */
  1252. REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
  1253. /* Set the S and M flags */
  1254. FLAG_S = value & SFLAG_SET;
  1255. FLAG_M = value & MFLAG_SET;
  1256. /* Set the new stack pointer */
  1257. REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
  1258. }
  1259. /* Set the S and M flags. Don't touch the stack pointer. */
  1260. INLINE void m68ki_set_sm_flag_nosp(uint value)
  1261. {
  1262. /* Set the S and M flags */
  1263. FLAG_S = value & SFLAG_SET;
  1264. FLAG_M = value & MFLAG_SET;
  1265. }
  1266. /* Set the condition code register */
  1267. INLINE void m68ki_set_ccr(uint value)
  1268. {
  1269. FLAG_X = BIT_4(value) << 4;
  1270. FLAG_N = BIT_3(value) << 4;
  1271. FLAG_Z = !BIT_2(value);
  1272. FLAG_V = BIT_1(value) << 6;
  1273. FLAG_C = BIT_0(value) << 8;
  1274. }
  1275. /* Set the status register but don't check for interrupts */
  1276. INLINE void m68ki_set_sr_noint(uint value)
  1277. {
  1278. /* Mask out the "unimplemented" bits */
  1279. value &= CPU_SR_MASK;
  1280. /* Now set the status register */
  1281. FLAG_T1 = BIT_F(value);
  1282. FLAG_T0 = BIT_E(value);
  1283. FLAG_INT_MASK = value & 0x0700;
  1284. m68ki_set_ccr(value);
  1285. m68ki_set_sm_flag((value >> 11) & 6);
  1286. }
  1287. /* Set the status register but don't check for interrupts nor
  1288. * change the stack pointer
  1289. */
  1290. INLINE void m68ki_set_sr_noint_nosp(uint value)
  1291. {
  1292. /* Mask out the "unimplemented" bits */
  1293. value &= CPU_SR_MASK;
  1294. /* Now set the status register */
  1295. FLAG_T1 = BIT_F(value);
  1296. FLAG_T0 = BIT_E(value);
  1297. FLAG_INT_MASK = value & 0x0700;
  1298. m68ki_set_ccr(value);
  1299. m68ki_set_sm_flag_nosp((value >> 11) & 6);
  1300. }
  1301. /* Set the status register and check for interrupts */
  1302. INLINE void m68ki_set_sr(uint value)
  1303. {
  1304. m68ki_set_sr_noint(value);
  1305. if (GET_CYCLES() >= 0) // notaz
  1306. m68ki_check_interrupts();
  1307. }
  1308. /* ------------------------- Exception Processing ------------------------- */
  1309. /* Initiate exception processing */
  1310. INLINE uint m68ki_init_exception(void)
  1311. {
  1312. /* Save the old status register */
  1313. uint sr = m68ki_get_sr();
  1314. /* Turn off trace flag, clear pending traces */
  1315. FLAG_T1 = FLAG_T0 = 0;
  1316. m68ki_clear_trace();
  1317. /* Enter supervisor mode */
  1318. m68ki_set_s_flag(SFLAG_SET);
  1319. return sr;
  1320. }
  1321. /* 3 word stack frame (68000 only) */
  1322. INLINE void m68ki_stack_frame_3word(uint pc, uint sr)
  1323. {
  1324. m68ki_push_32(pc);
  1325. m68ki_push_16(sr);
  1326. }
  1327. /* Format 0 stack frame.
  1328. * This is the standard stack frame for 68010+.
  1329. */
  1330. INLINE void m68ki_stack_frame_0000(uint pc, uint sr, uint vector)
  1331. {
  1332. /* Stack a 3-word frame if we are 68000 */
  1333. if(CPU_TYPE == CPU_TYPE_000 || CPU_TYPE == CPU_TYPE_008)
  1334. {
  1335. m68ki_stack_frame_3word(pc, sr);
  1336. return;
  1337. }
  1338. m68ki_push_16(vector<<2);
  1339. m68ki_push_32(pc);
  1340. m68ki_push_16(sr);
  1341. }
  1342. /* Format 1 stack frame (68020).
  1343. * For 68020, this is the 4 word throwaway frame.
  1344. */
  1345. INLINE void m68ki_stack_frame_0001(uint pc, uint sr, uint vector)
  1346. {
  1347. m68ki_push_16(0x1000 | (vector<<2));
  1348. m68ki_push_32(pc);
  1349. m68ki_push_16(sr);
  1350. }
  1351. /* Format 2 stack frame.
  1352. * This is used only by 68020 for trap exceptions.
  1353. */
  1354. INLINE void m68ki_stack_frame_0010(uint sr, uint vector)
  1355. {
  1356. m68ki_push_32(REG_PPC);
  1357. m68ki_push_16(0x2000 | (vector<<2));
  1358. m68ki_push_32(REG_PC);
  1359. m68ki_push_16(sr);
  1360. }
  1361. /* Bus error stack frame (68000 only).
  1362. */
  1363. INLINE void m68ki_stack_frame_buserr(uint sr)
  1364. {
  1365. m68ki_push_32(REG_PC);
  1366. m68ki_push_16(sr);
  1367. m68ki_push_16(REG_IR);
  1368. m68ki_push_32(m68ki_aerr_address); /* access address */
  1369. /* 0 0 0 0 0 0 0 0 0 0 0 R/W I/N FC
  1370. * R/W 0 = write, 1 = read
  1371. * I/N 0 = instruction, 1 = not
  1372. * FC 3-bit function code
  1373. */
  1374. m68ki_push_16(m68ki_aerr_write_mode | CPU_INSTR_MODE | m68ki_aerr_fc);
  1375. }
  1376. /* Format 8 stack frame (68010).
  1377. * 68010 only. This is the 29 word bus/address error frame.
  1378. */
  1379. INLINE void m68ki_stack_frame_1000(uint pc, uint sr, uint vector)
  1380. {
  1381. /* VERSION
  1382. * NUMBER
  1383. * INTERNAL INFORMATION, 16 WORDS
  1384. */
  1385. m68ki_fake_push_32();
  1386. m68ki_fake_push_32();
  1387. m68ki_fake_push_32();
  1388. m68ki_fake_push_32();
  1389. m68ki_fake_push_32();
  1390. m68ki_fake_push_32();
  1391. m68ki_fake_push_32();
  1392. m68ki_fake_push_32();
  1393. /* INSTRUCTION INPUT BUFFER */
  1394. m68ki_push_16(0);
  1395. /* UNUSED, RESERVED (not written) */
  1396. m68ki_fake_push_16();
  1397. /* DATA INPUT BUFFER */
  1398. m68ki_push_16(0);
  1399. /* UNUSED, RESERVED (not written) */
  1400. m68ki_fake_push_16();
  1401. /* DATA OUTPUT BUFFER */
  1402. m68ki_push_16(0);
  1403. /* UNUSED, RESERVED (not written) */
  1404. m68ki_fake_push_16();
  1405. /* FAULT ADDRESS */
  1406. m68ki_push_32(0);
  1407. /* SPECIAL STATUS WORD */
  1408. m68ki_push_16(0);
  1409. /* 1000, VECTOR OFFSET */
  1410. m68ki_push_16(0x8000 | (vector<<2));
  1411. /* PROGRAM COUNTER */
  1412. m68ki_push_32(pc);
  1413. /* STATUS REGISTER */
  1414. m68ki_push_16(sr);
  1415. }
  1416. /* Format A stack frame (short bus fault).
  1417. * This is used only by 68020 for bus fault and address error
  1418. * if the error happens at an instruction boundary.
  1419. * PC stacked is address of next instruction.
  1420. */
  1421. INLINE void m68ki_stack_frame_1010(uint sr, uint vector, uint pc)
  1422. {
  1423. /* INTERNAL REGISTER */
  1424. m68ki_push_16(0);
  1425. /* INTERNAL REGISTER */
  1426. m68ki_push_16(0);
  1427. /* DATA OUTPUT BUFFER (2 words) */
  1428. m68ki_push_32(0);
  1429. /* INTERNAL REGISTER */
  1430. m68ki_push_16(0);
  1431. /* INTERNAL REGISTER */
  1432. m68ki_push_16(0);
  1433. /* DATA CYCLE FAULT ADDRESS (2 words) */
  1434. m68ki_push_32(0);
  1435. /* INSTRUCTION PIPE STAGE B */
  1436. m68ki_push_16(0);
  1437. /* INSTRUCTION PIPE STAGE C */
  1438. m68ki_push_16(0);
  1439. /* SPECIAL STATUS REGISTER */
  1440. m68ki_push_16(0);
  1441. /* INTERNAL REGISTER */
  1442. m68ki_push_16(0);
  1443. /* 1010, VECTOR OFFSET */
  1444. m68ki_push_16(0xa000 | (vector<<2));
  1445. /* PROGRAM COUNTER */
  1446. m68ki_push_32(pc);
  1447. /* STATUS REGISTER */
  1448. m68ki_push_16(sr);
  1449. }
  1450. /* Format B stack frame (long bus fault).
  1451. * This is used only by 68020 for bus fault and address error
  1452. * if the error happens during instruction execution.
  1453. * PC stacked is address of instruction in progress.
  1454. */
  1455. INLINE void m68ki_stack_frame_1011(uint sr, uint vector, uint pc)
  1456. {
  1457. /* INTERNAL REGISTERS (18 words) */
  1458. m68ki_push_32(0);
  1459. m68ki_push_32(0);
  1460. m68ki_push_32(0);
  1461. m68ki_push_32(0);
  1462. m68ki_push_32(0);
  1463. m68ki_push_32(0);
  1464. m68ki_push_32(0);
  1465. m68ki_push_32(0);
  1466. m68ki_push_32(0);
  1467. /* VERSION# (4 bits), INTERNAL INFORMATION */
  1468. m68ki_push_16(0);
  1469. /* INTERNAL REGISTERS (3 words) */
  1470. m68ki_push_32(0);
  1471. m68ki_push_16(0);
  1472. /* DATA INTPUT BUFFER (2 words) */
  1473. m68ki_push_32(0);
  1474. /* INTERNAL REGISTERS (2 words) */
  1475. m68ki_push_32(0);
  1476. /* STAGE B ADDRESS (2 words) */
  1477. m68ki_push_32(0);
  1478. /* INTERNAL REGISTER (4 words) */
  1479. m68ki_push_32(0);
  1480. m68ki_push_32(0);
  1481. /* DATA OUTPUT BUFFER (2 words) */
  1482. m68ki_push_32(0);
  1483. /* INTERNAL REGISTER */
  1484. m68ki_push_16(0);
  1485. /* INTERNAL REGISTER */
  1486. m68ki_push_16(0);
  1487. /* DATA CYCLE FAULT ADDRESS (2 words) */
  1488. m68ki_push_32(0);
  1489. /* INSTRUCTION PIPE STAGE B */
  1490. m68ki_push_16(0);
  1491. /* INSTRUCTION PIPE STAGE C */
  1492. m68ki_push_16(0);
  1493. /* SPECIAL STATUS REGISTER */
  1494. m68ki_push_16(0);
  1495. /* INTERNAL REGISTER */
  1496. m68ki_push_16(0);
  1497. /* 1011, VECTOR OFFSET */
  1498. m68ki_push_16(0xb000 | (vector<<2));
  1499. /* PROGRAM COUNTER */
  1500. m68ki_push_32(pc);
  1501. /* STATUS REGISTER */
  1502. m68ki_push_16(sr);
  1503. }
  1504. /* Used for Group 2 exceptions.
  1505. * These stack a type 2 frame on the 020.
  1506. */
  1507. INLINE void m68ki_exception_trap(uint vector)
  1508. {
  1509. uint sr = m68ki_init_exception();
  1510. if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
  1511. m68ki_stack_frame_0000(REG_PC, sr, vector);
  1512. else
  1513. m68ki_stack_frame_0010(sr, vector);
  1514. m68ki_jump_vector(vector);
  1515. /* Use up some clock cycles */
  1516. USE_CYCLES(CYC_EXCEPTION[vector]);
  1517. }
  1518. /* Trap#n stacks a 0 frame but behaves like group2 otherwise */
  1519. INLINE void m68ki_exception_trapN(uint vector)
  1520. {
  1521. uint sr = m68ki_init_exception();
  1522. m68ki_stack_frame_0000(REG_PC, sr, vector);
  1523. m68ki_jump_vector(vector);
  1524. /* Use up some clock cycles */
  1525. USE_CYCLES(CYC_EXCEPTION[vector]);
  1526. }
  1527. /* Exception for trace mode */
  1528. INLINE void m68ki_exception_trace(void)
  1529. {
  1530. uint sr = m68ki_init_exception();
  1531. if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
  1532. {
  1533. #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
  1534. if(CPU_TYPE_IS_000(CPU_TYPE))
  1535. {
  1536. CPU_INSTR_MODE = INSTRUCTION_NO;
  1537. }
  1538. #endif /* M68K_EMULATE_ADDRESS_ERROR */
  1539. m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_TRACE);
  1540. }
  1541. else
  1542. m68ki_stack_frame_0010(sr, EXCEPTION_TRACE);
  1543. m68ki_jump_vector(EXCEPTION_TRACE);
  1544. /* Trace nullifies a STOP instruction */
  1545. CPU_STOPPED &= ~STOP_LEVEL_STOP;
  1546. /* Use up some clock cycles */
  1547. USE_CYCLES(CYC_EXCEPTION[EXCEPTION_TRACE]);
  1548. }
  1549. /* Exception for privilege violation */
  1550. INLINE void m68ki_exception_privilege_violation(void)
  1551. {
  1552. uint sr = m68ki_init_exception();
  1553. #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
  1554. if(CPU_TYPE_IS_000(CPU_TYPE))
  1555. {
  1556. CPU_INSTR_MODE = INSTRUCTION_NO;
  1557. }
  1558. #endif /* M68K_EMULATE_ADDRESS_ERROR */
  1559. m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_PRIVILEGE_VIOLATION);
  1560. m68ki_jump_vector(EXCEPTION_PRIVILEGE_VIOLATION);
  1561. /* Use up some clock cycles and undo the instruction's cycles */
  1562. USE_CYCLES(CYC_EXCEPTION[EXCEPTION_PRIVILEGE_VIOLATION] - CYC_INSTRUCTION[REG_IR]);
  1563. }
  1564. /* Exception for A-Line instructions */
  1565. INLINE void m68ki_exception_1010(void)
  1566. {
  1567. uint sr;
  1568. #if M68K_LOG_1010_1111 == OPT_ON
  1569. M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1010 instruction %04x (%s)\n",
  1570. m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
  1571. m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
  1572. #endif
  1573. sr = m68ki_init_exception();
  1574. m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_1010);
  1575. m68ki_jump_vector(EXCEPTION_1010);
  1576. /* Use up some clock cycles and undo the instruction's cycles */
  1577. USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1010] - CYC_INSTRUCTION[REG_IR]);
  1578. }
  1579. /* Exception for F-Line instructions */
  1580. INLINE void m68ki_exception_1111(void)
  1581. {
  1582. uint sr;
  1583. #if M68K_LOG_1010_1111 == OPT_ON
  1584. M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1111 instruction %04x (%s)\n",
  1585. m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
  1586. m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
  1587. #endif
  1588. sr = m68ki_init_exception();
  1589. m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_1111);
  1590. m68ki_jump_vector(EXCEPTION_1111);
  1591. /* Use up some clock cycles and undo the instruction's cycles */
  1592. USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1111] - CYC_INSTRUCTION[REG_IR]);
  1593. }
  1594. /* Exception for illegal instructions */
  1595. INLINE void m68ki_exception_illegal(void)
  1596. {
  1597. uint sr;
  1598. M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: illegal instruction %04x (%s)\n",
  1599. m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
  1600. m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
  1601. sr = m68ki_init_exception();
  1602. #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
  1603. if(CPU_TYPE_IS_000(CPU_TYPE))
  1604. {
  1605. CPU_INSTR_MODE = INSTRUCTION_NO;
  1606. }
  1607. #endif /* M68K_EMULATE_ADDRESS_ERROR */
  1608. m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_ILLEGAL_INSTRUCTION);
  1609. m68ki_jump_vector(EXCEPTION_ILLEGAL_INSTRUCTION);
  1610. /* Use up some clock cycles and undo the instruction's cycles */
  1611. USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ILLEGAL_INSTRUCTION] - CYC_INSTRUCTION[REG_IR]);
  1612. }
  1613. /* Exception for format errror in RTE */
  1614. INLINE void m68ki_exception_format_error(void)
  1615. {
  1616. uint sr = m68ki_init_exception();
  1617. m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_FORMAT_ERROR);
  1618. m68ki_jump_vector(EXCEPTION_FORMAT_ERROR);
  1619. /* Use up some clock cycles and undo the instruction's cycles */
  1620. USE_CYCLES(CYC_EXCEPTION[EXCEPTION_FORMAT_ERROR] - CYC_INSTRUCTION[REG_IR]);
  1621. }
  1622. /* Exception for address error */
  1623. INLINE void m68ki_exception_address_error(void)
  1624. {
  1625. uint sr = m68ki_init_exception();
  1626. /* If we were processing a bus error, address error, or reset,
  1627. * this is a catastrophic failure.
  1628. * Halt the CPU
  1629. */
  1630. if(CPU_RUN_MODE == RUN_MODE_BERR_AERR_RESET)
  1631. {
  1632. m68k_read_memory_8(0x00ffff01);
  1633. CPU_STOPPED = STOP_LEVEL_HALT;
  1634. return;
  1635. }
  1636. CPU_RUN_MODE = RUN_MODE_BERR_AERR_RESET;
  1637. /* Note: This is implemented for 68000 only! */
  1638. m68ki_stack_frame_buserr(sr);
  1639. m68ki_jump_vector(EXCEPTION_ADDRESS_ERROR);
  1640. /* Use up some clock cycles and undo the instruction's cycles */
  1641. USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ADDRESS_ERROR] - CYC_INSTRUCTION[REG_IR]);
  1642. }
  1643. /* Service an interrupt request and start exception processing */
  1644. INLINE void m68ki_exception_interrupt(uint int_level)
  1645. {
  1646. uint vector;
  1647. uint sr;
  1648. uint new_pc;
  1649. #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
  1650. if(CPU_TYPE_IS_000(CPU_TYPE))
  1651. {
  1652. CPU_INSTR_MODE = INSTRUCTION_NO;
  1653. }
  1654. #endif /* M68K_EMULATE_ADDRESS_ERROR */
  1655. /* Turn off the stopped state */
  1656. CPU_STOPPED &= ~STOP_LEVEL_STOP;
  1657. /* If we are halted, don't do anything */
  1658. if(CPU_STOPPED)
  1659. return;
  1660. /* Acknowledge the interrupt */
  1661. vector = m68ki_int_ack(int_level);
  1662. /* Get the interrupt vector */
  1663. if(vector == M68K_INT_ACK_AUTOVECTOR)
  1664. /* Use the autovectors. This is the most commonly used implementation */
  1665. vector = EXCEPTION_INTERRUPT_AUTOVECTOR+int_level;
  1666. else if(vector == M68K_INT_ACK_SPURIOUS)
  1667. /* Called if no devices respond to the interrupt acknowledge */
  1668. vector = EXCEPTION_SPURIOUS_INTERRUPT;
  1669. else if(vector > 255)
  1670. {
  1671. M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: Interrupt acknowledge returned invalid vector $%x\n",
  1672. m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC), vector));
  1673. return;
  1674. }
  1675. /* Start exception processing */
  1676. sr = m68ki_init_exception();
  1677. /* Set the interrupt mask to the level of the one being serviced */
  1678. FLAG_INT_MASK = int_level<<8;
  1679. /* Get the new PC */
  1680. new_pc = m68ki_read_data_32((vector<<2) + REG_VBR);
  1681. //new_pc = m68k_read_immediate_32((vector<<2) + REG_VBR); // notaz hack
  1682. /* If vector is uninitialized, call the uninitialized interrupt vector */
  1683. if(new_pc == 0)
  1684. new_pc = m68ki_read_data_32((EXCEPTION_UNINITIALIZED_INTERRUPT<<2) + REG_VBR);
  1685. /* Generate a stack frame */
  1686. m68ki_stack_frame_0000(REG_PC, sr, vector);
  1687. if(FLAG_M && CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
  1688. {
  1689. /* Create throwaway frame */
  1690. m68ki_set_sm_flag(FLAG_S); /* clear M */
  1691. sr |= 0x2000; /* Same as SR in master stack frame except S is forced high */
  1692. m68ki_stack_frame_0001(REG_PC, sr, vector);
  1693. }
  1694. m68ki_jump(new_pc);
  1695. /* Defer cycle counting until later */
  1696. CPU_INT_CYCLES += CYC_EXCEPTION[vector];
  1697. #if !M68K_EMULATE_INT_ACK
  1698. /* Automatically clear IRQ if we are not using an acknowledge scheme */
  1699. CPU_INT_LEVEL = 0;
  1700. #endif /* M68K_EMULATE_INT_ACK */
  1701. }
  1702. /* ASG: Check for interrupts */
  1703. INLINE void m68ki_check_interrupts(void)
  1704. {
  1705. if(CPU_INT_LEVEL > FLAG_INT_MASK)
  1706. m68ki_exception_interrupt(CPU_INT_LEVEL>>8);
  1707. }
  1708. /* ======================================================================== */
  1709. /* ============================== END OF FILE ============================= */
  1710. /* ======================================================================== */
  1711. #endif /* M68KCPU__HEADER */